linux/drivers/crypto/ccree/cc_lli_defs.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */

#ifndef _CC_LLI_DEFS_H_
#define _CC_LLI_DEFS_H_

#include <linux/types.h>

/* Max DLLI size
 *  AKA CC_DSCRPTR_QUEUE_WORD1_DIN_SIZE_BIT_SIZE
 */
#define DLLI_SIZE_BIT_SIZE

#define CC_MAX_MLLI_ENTRY_SIZE

#define LLI_MAX_NUM_OF_DATA_ENTRIES
#define LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES
#define MLLI_TABLE_MIN_ALIGNMENT
#define MAX_NUM_OF_BUFFERS_IN_MLLI
#define MAX_NUM_OF_TOTAL_MLLI_ENTRIES

/* Size of entry */
#define LLI_ENTRY_WORD_SIZE
#define LLI_ENTRY_BYTE_SIZE

/* Word0[31:0] = ADDR[31:0] */
#define LLI_WORD0_OFFSET
#define LLI_LADDR_BIT_OFFSET
#define LLI_LADDR_BIT_SIZE
/* Word1[31:16] = ADDR[47:32]; Word1[15:0] = SIZE */
#define LLI_WORD1_OFFSET
#define LLI_SIZE_BIT_OFFSET
#define LLI_SIZE_BIT_SIZE
#define LLI_HADDR_BIT_OFFSET
#define LLI_HADDR_BIT_SIZE

#define LLI_SIZE_MASK
#define LLI_HADDR_MASK

static inline void cc_lli_set_addr(u32 *lli_p, dma_addr_t addr)
{}

static inline void cc_lli_set_size(u32 *lli_p, u16 size)
{}

#endif /*_CC_LLI_DEFS_H_*/