/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ /* * Copyright 2013-2016 Freescale Semiconductor Inc. * Copyright 2017-2018 NXP */ #ifndef _DPSECI_CMD_H_ #define _DPSECI_CMD_H_ /* DPSECI Version */ #define DPSECI_VER_MAJOR … #define DPSECI_VER_MINOR … #define DPSECI_VER(maj, min) … #define DPSECI_VERSION … /* Command versioning */ #define DPSECI_CMD_BASE_VERSION … #define DPSECI_CMD_BASE_VERSION_V2 … #define DPSECI_CMD_ID_OFFSET … #define DPSECI_CMD_V1(id) … #define DPSECI_CMD_V2(id) … /* Command IDs */ #define DPSECI_CMDID_CLOSE … #define DPSECI_CMDID_OPEN … #define DPSECI_CMDID_GET_API_VERSION … #define DPSECI_CMDID_ENABLE … #define DPSECI_CMDID_DISABLE … #define DPSECI_CMDID_GET_ATTR … #define DPSECI_CMDID_RESET … #define DPSECI_CMDID_IS_ENABLED … #define DPSECI_CMDID_SET_RX_QUEUE … #define DPSECI_CMDID_GET_RX_QUEUE … #define DPSECI_CMDID_GET_TX_QUEUE … #define DPSECI_CMDID_GET_SEC_ATTR … #define DPSECI_CMDID_SET_CONGESTION_NOTIFICATION … #define DPSECI_CMDID_GET_CONGESTION_NOTIFICATION … /* Macros for accessing command fields smaller than 1 byte */ #define DPSECI_MASK(field) … #define dpseci_set_field(var, field, val) … #define dpseci_get_field(var, field) … struct dpseci_cmd_open { … }; #define DPSECI_ENABLE_SHIFT … #define DPSECI_ENABLE_SIZE … struct dpseci_rsp_is_enabled { … }; struct dpseci_rsp_get_attributes { … }; #define DPSECI_DEST_TYPE_SHIFT … #define DPSECI_DEST_TYPE_SIZE … #define DPSECI_ORDER_PRESERVATION_SHIFT … #define DPSECI_ORDER_PRESERVATION_SIZE … struct dpseci_cmd_queue { … }; struct dpseci_rsp_get_tx_queue { … }; struct dpseci_rsp_get_sec_attr { … }; struct dpseci_rsp_get_api_version { … }; #define DPSECI_CGN_DEST_TYPE_SHIFT … #define DPSECI_CGN_DEST_TYPE_SIZE … #define DPSECI_CGN_UNITS_SHIFT … #define DPSECI_CGN_UNITS_SIZE … struct dpseci_cmd_congestion_notification { … }; #endif /* _DPSECI_CMD_H_ */
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