/* SPDX-License-Identifier: GPL-2.0-only * Copyright (C) 2020 Marvell. */ #ifndef __OTX2_CPTLF_H #define __OTX2_CPTLF_H #include <linux/soc/marvell/octeontx2/asm.h> #include <linux/bitfield.h> #include <mbox.h> #include <rvu.h> #include "otx2_cpt_common.h" #include "otx2_cpt_reqmgr.h" /* * CPT instruction and pending queues user requested length in CPT_INST_S msgs */ #define OTX2_CPT_USER_REQUESTED_QLEN_MSGS … /* * CPT instruction queue size passed to HW is in units of 40*CPT_INST_S * messages. */ #define OTX2_CPT_SIZE_DIV40 … /* * CPT instruction and pending queues length in CPT_INST_S messages */ #define OTX2_CPT_INST_QLEN_MSGS … /* * LDWB is getting incorrectly used when IQB_LDWB = 1 and CPT instruction * queue has less than 320 free entries. So, increase HW instruction queue * size by 320 and give 320 entries less for SW/NIX RX as a workaround. */ #define OTX2_CPT_INST_QLEN_EXTRA_BYTES … #define OTX2_CPT_EXTRA_SIZE_DIV40 … /* CPT instruction queue length in bytes */ #define OTX2_CPT_INST_QLEN_BYTES … /* CPT instruction group queue length in bytes */ #define OTX2_CPT_INST_GRP_QLEN_BYTES … /* CPT FC length in bytes */ #define OTX2_CPT_Q_FC_LEN … /* CPT instruction queue alignment */ #define OTX2_CPT_INST_Q_ALIGNMENT … /* Mask which selects all engine groups */ #define OTX2_CPT_ALL_ENG_GRPS_MASK … /* Maximum LFs supported in OcteonTX2 for CPT */ #define OTX2_CPT_MAX_LFS_NUM … /* Queue priority */ #define OTX2_CPT_QUEUE_HI_PRIO … #define OTX2_CPT_QUEUE_LOW_PRIO … enum otx2_cptlf_state { … }; struct otx2_cpt_inst_queue { … }; struct otx2_cptlfs_info; struct otx2_cptlf_wqe { … }; struct otx2_cptlf_info { … }; struct cpt_hw_ops { … }; struct otx2_cptlfs_info { … }; static inline void otx2_cpt_free_instruction_queues( struct otx2_cptlfs_info *lfs) { … } static inline int otx2_cpt_alloc_instruction_queues( struct otx2_cptlfs_info *lfs) { … } static inline void otx2_cptlf_set_iqueues_base_addr( struct otx2_cptlfs_info *lfs) { … } static inline void otx2_cptlf_do_set_iqueue_size(struct otx2_cptlf_info *lf) { … } static inline void otx2_cptlf_set_iqueues_size(struct otx2_cptlfs_info *lfs) { … } #define INFLIGHT … #define GRB_CNT … #define GWB_CNT … #define XQ_XOR … #define DQPTR … #define NQPTR … static inline void otx2_cptlf_do_disable_iqueue(struct otx2_cptlf_info *lf) { … } static inline void otx2_cptlf_disable_iqueues(struct otx2_cptlfs_info *lfs) { … } static inline void otx2_cptlf_set_iqueue_enq(struct otx2_cptlf_info *lf, bool enable) { … } static inline void otx2_cptlf_enable_iqueue_enq(struct otx2_cptlf_info *lf) { … } static inline void otx2_cptlf_set_iqueue_exec(struct otx2_cptlf_info *lf, bool enable) { … } static inline void otx2_cptlf_set_ctx_flr_flush(struct otx2_cptlf_info *lf) { … } static inline void otx2_cptlf_enable_iqueue_exec(struct otx2_cptlf_info *lf) { … } static inline void otx2_cptlf_disable_iqueue_exec(struct otx2_cptlf_info *lf) { … } static inline void otx2_cptlf_enable_iqueues(struct otx2_cptlfs_info *lfs) { … } static inline void otx2_cpt_fill_inst(union otx2_cpt_inst_s *cptinst, struct otx2_cpt_iq_command *iq_cmd, u64 comp_baddr) { … } /* * On OcteonTX2 platform the parameter insts_num is used as a count of * instructions to be enqueued. The valid values for insts_num are: * 1 - 1 CPT instruction will be enqueued during LMTST operation * 2 - 2 CPT instructions will be enqueued during LMTST operation */ static inline void otx2_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num, struct otx2_cptlf_info *lf) { … } static inline bool otx2_cptlf_started(struct otx2_cptlfs_info *lfs) { … } static inline void otx2_cptlf_set_dev_info(struct otx2_cptlfs_info *lfs, struct pci_dev *pdev, void __iomem *reg_base, struct otx2_mbox *mbox, int blkaddr) { … } int otx2_cptlf_init(struct otx2_cptlfs_info *lfs, u8 eng_grp_msk, int pri, int lfs_num); void otx2_cptlf_shutdown(struct otx2_cptlfs_info *lfs); int otx2_cptlf_register_misc_interrupts(struct otx2_cptlfs_info *lfs); int otx2_cptlf_register_done_interrupts(struct otx2_cptlfs_info *lfs); void otx2_cptlf_unregister_misc_interrupts(struct otx2_cptlfs_info *lfs); void otx2_cptlf_unregister_done_interrupts(struct otx2_cptlfs_info *lfs); void otx2_cptlf_free_irqs_affinity(struct otx2_cptlfs_info *lfs); int otx2_cptlf_set_irqs_affinity(struct otx2_cptlfs_info *lfs); #endif /* __OTX2_CPTLF_H */
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