linux/drivers/crypto/inside-secure/safexcel.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (C) 2017 Marvell
 *
 * Antoine Tenart <[email protected]>
 */

#ifndef __SAFEXCEL_H__
#define __SAFEXCEL_H__

#include <crypto/aead.h>
#include <crypto/algapi.h>
#include <crypto/internal/hash.h>
#include <crypto/sha1.h>
#include <crypto/sha2.h>
#include <crypto/sha3.h>
#include <crypto/skcipher.h>
#include <linux/types.h>

#define EIP197_HIA_VERSION_BE
#define EIP197_HIA_VERSION_LE
#define EIP97_VERSION_LE
#define EIP196_VERSION_LE
#define EIP197_VERSION_LE
#define EIP96_VERSION_LE
#define EIP201_VERSION_LE
#define EIP206_VERSION_LE
#define EIP207_VERSION_LE
#define EIP197_REG_LO16(reg)
#define EIP197_REG_HI16(reg)
#define EIP197_VERSION_MASK(reg)
#define EIP197_VERSION_SWAP(reg)

/* EIP197 HIA OPTIONS ENCODING */
#define EIP197_HIA_OPT_HAS_PE_ARB

/* EIP206 OPTIONS ENCODING */
#define EIP206_OPT_ICE_TYPE(n)
#define EIP206_OPT_OCE_TYPE(n)

/* EIP197 OPTIONS ENCODING */
#define EIP197_OPT_HAS_TRC

/* Static configuration */
#define EIP197_DEFAULT_RING_SIZE
#define EIP197_EMB_TOKENS
#define EIP197_MAX_TOKENS
#define EIP197_MAX_RINGS
#define EIP197_FETCH_DEPTH
#define EIP197_MAX_BATCH_SZ
#define EIP197_MAX_RING_AIC

#define EIP197_GFP_FLAGS(base)

/* Custom on-stack requests (for invalidation) */
#define EIP197_SKCIPHER_REQ_SIZE
#define EIP197_AHASH_REQ_SIZE
#define EIP197_AEAD_REQ_SIZE
#define EIP197_REQUEST_ON_STACK(name, type, size)

/* Xilinx dev board base offsets */
#define EIP197_XLX_GPIO_BASE
#define EIP197_XLX_IRQ_BLOCK_ID_ADDR
#define EIP197_XLX_IRQ_BLOCK_ID_VALUE
#define EIP197_XLX_USER_INT_ENB_MSK
#define EIP197_XLX_USER_INT_ENB_SET
#define EIP197_XLX_USER_INT_ENB_CLEAR
#define EIP197_XLX_USER_INT_BLOCK
#define EIP197_XLX_USER_INT_PEND
#define EIP197_XLX_USER_VECT_LUT0_ADDR
#define EIP197_XLX_USER_VECT_LUT0_IDENT
#define EIP197_XLX_USER_VECT_LUT1_ADDR
#define EIP197_XLX_USER_VECT_LUT1_IDENT
#define EIP197_XLX_USER_VECT_LUT2_ADDR
#define EIP197_XLX_USER_VECT_LUT2_IDENT
#define EIP197_XLX_USER_VECT_LUT3_ADDR
#define EIP197_XLX_USER_VECT_LUT3_IDENT

/* Helper defines for probe function */
#define EIP197_IRQ_NUMBER(i, is_pci)

/* Register base offsets */
#define EIP197_HIA_AIC(priv)
#define EIP197_HIA_AIC_G(priv)
#define EIP197_HIA_AIC_R(priv)
#define EIP197_HIA_AIC_xDR(priv)
#define EIP197_HIA_DFE(priv)
#define EIP197_HIA_DFE_THR(priv)
#define EIP197_HIA_DSE(priv)
#define EIP197_HIA_DSE_THR(priv)
#define EIP197_HIA_GEN_CFG(priv)
#define EIP197_PE(priv)
#define EIP197_GLOBAL(priv)

/* EIP197 base offsets */
#define EIP197_HIA_AIC_BASE
#define EIP197_HIA_AIC_G_BASE
#define EIP197_HIA_AIC_R_BASE
#define EIP197_HIA_AIC_xDR_BASE
#define EIP197_HIA_DFE_BASE
#define EIP197_HIA_DFE_THR_BASE
#define EIP197_HIA_DSE_BASE
#define EIP197_HIA_DSE_THR_BASE
#define EIP197_HIA_GEN_CFG_BASE
#define EIP197_PE_BASE
#define EIP197_GLOBAL_BASE

/* EIP97 base offsets */
#define EIP97_HIA_AIC_BASE
#define EIP97_HIA_AIC_G_BASE
#define EIP97_HIA_AIC_R_BASE
#define EIP97_HIA_AIC_xDR_BASE
#define EIP97_HIA_DFE_BASE
#define EIP97_HIA_DFE_THR_BASE
#define EIP97_HIA_DSE_BASE
#define EIP97_HIA_DSE_THR_BASE
#define EIP97_HIA_GEN_CFG_BASE
#define EIP97_PE_BASE
#define EIP97_GLOBAL_BASE

/* CDR/RDR register offsets */
#define EIP197_HIA_xDR_OFF(priv, r)
#define EIP197_HIA_CDR(priv, r)
#define EIP197_HIA_RDR(priv, r)
#define EIP197_HIA_xDR_RING_BASE_ADDR_LO
#define EIP197_HIA_xDR_RING_BASE_ADDR_HI
#define EIP197_HIA_xDR_RING_SIZE
#define EIP197_HIA_xDR_DESC_SIZE
#define EIP197_HIA_xDR_CFG
#define EIP197_HIA_xDR_DMA_CFG
#define EIP197_HIA_xDR_THRESH
#define EIP197_HIA_xDR_PREP_COUNT
#define EIP197_HIA_xDR_PROC_COUNT
#define EIP197_HIA_xDR_PREP_PNTR
#define EIP197_HIA_xDR_PROC_PNTR
#define EIP197_HIA_xDR_STAT

/* register offsets */
#define EIP197_HIA_DFE_CFG(n)
#define EIP197_HIA_DFE_THR_CTRL(n)
#define EIP197_HIA_DFE_THR_STAT(n)
#define EIP197_HIA_DSE_CFG(n)
#define EIP197_HIA_DSE_THR_CTRL(n)
#define EIP197_HIA_DSE_THR_STAT(n)
#define EIP197_HIA_RA_PE_CTRL(n)
#define EIP197_HIA_RA_PE_STAT
#define EIP197_HIA_AIC_R_OFF(r)
#define EIP197_HIA_AIC_R_ENABLE_CTRL(r)
#define EIP197_HIA_AIC_R_ENABLED_STAT(r)
#define EIP197_HIA_AIC_R_ACK(r)
#define EIP197_HIA_AIC_R_ENABLE_CLR(r)
#define EIP197_HIA_AIC_R_VERSION(r)
#define EIP197_HIA_AIC_G_ENABLE_CTRL
#define EIP197_HIA_AIC_G_ENABLED_STAT
#define EIP197_HIA_AIC_G_ACK
#define EIP197_HIA_MST_CTRL
#define EIP197_HIA_OPTIONS
#define EIP197_HIA_VERSION
#define EIP197_PE_IN_DBUF_THRES(n)
#define EIP197_PE_IN_TBUF_THRES(n)
#define EIP197_PE_ICE_SCRATCH_RAM(n)
#define EIP197_PE_ICE_PUE_CTRL(n)
#define EIP197_PE_ICE_PUTF_CTRL(n)
#define EIP197_PE_ICE_SCRATCH_CTRL(n)
#define EIP197_PE_ICE_FPP_CTRL(n)
#define EIP197_PE_ICE_PPTF_CTRL(n)
#define EIP197_PE_ICE_RAM_CTRL(n)
#define EIP197_PE_ICE_VERSION(n)
#define EIP197_PE_EIP96_TOKEN_CTRL(n)
#define EIP197_PE_EIP96_FUNCTION_EN(n)
#define EIP197_PE_EIP96_CONTEXT_CTRL(n)
#define EIP197_PE_EIP96_CONTEXT_STAT(n)
#define EIP197_PE_EIP96_TOKEN_CTRL2(n)
#define EIP197_PE_EIP96_FUNCTION2_EN(n)
#define EIP197_PE_EIP96_OPTIONS(n)
#define EIP197_PE_EIP96_VERSION(n)
#define EIP197_PE_OCE_VERSION(n)
#define EIP197_PE_OUT_DBUF_THRES(n)
#define EIP197_PE_OUT_TBUF_THRES(n)
#define EIP197_PE_PSE_VERSION(n)
#define EIP197_PE_DEBUG(n)
#define EIP197_PE_OPTIONS(n)
#define EIP197_PE_VERSION(n)
#define EIP197_MST_CTRL
#define EIP197_OPTIONS
#define EIP197_VERSION

/* EIP197-specific registers, no indirection */
#define EIP197_CLASSIFICATION_RAMS
#define EIP197_TRC_CTRL
#define EIP197_TRC_LASTRES
#define EIP197_TRC_REGINDEX
#define EIP197_TRC_PARAMS
#define EIP197_TRC_FREECHAIN
#define EIP197_TRC_PARAMS2
#define EIP197_TRC_ECCCTRL
#define EIP197_TRC_ECCSTAT
#define EIP197_TRC_ECCADMINSTAT
#define EIP197_TRC_ECCDATASTAT
#define EIP197_TRC_ECCDATA
#define EIP197_STRC_CONFIG
#define EIP197_FLUE_CACHEBASE_LO(n)
#define EIP197_FLUE_CACHEBASE_HI(n)
#define EIP197_FLUE_CONFIG(n)
#define EIP197_FLUE_OFFSETS
#define EIP197_FLUE_ARC4_OFFSET
#define EIP197_FLUE_IFC_LUT(n)
#define EIP197_CS_RAM_CTRL

/* EIP197_HIA_xDR_DESC_SIZE */
#define EIP197_xDR_DESC_MODE_64BIT
#define EIP197_CDR_DESC_MODE_ADCP

/* EIP197_HIA_xDR_DMA_CFG */
#define EIP197_HIA_xDR_WR_RES_BUF
#define EIP197_HIA_xDR_WR_CTRL_BUF
#define EIP197_HIA_xDR_WR_OWN_BUF
#define EIP197_HIA_xDR_CFG_WR_CACHE(n)
#define EIP197_HIA_xDR_CFG_RD_CACHE(n)

/* EIP197_HIA_CDR_THRESH */
#define EIP197_HIA_CDR_THRESH_PROC_PKT(n)
#define EIP197_HIA_CDR_THRESH_PROC_MODE
#define EIP197_HIA_CDR_THRESH_PKT_MODE
#define EIP197_HIA_CDR_THRESH_TIMEOUT(n)

/* EIP197_HIA_RDR_THRESH */
#define EIP197_HIA_RDR_THRESH_PROC_PKT(n)
#define EIP197_HIA_RDR_THRESH_PKT_MODE
#define EIP197_HIA_RDR_THRESH_TIMEOUT(n)

/* EIP197_HIA_xDR_PREP_COUNT */
#define EIP197_xDR_PREP_CLR_COUNT

/* EIP197_HIA_xDR_PROC_COUNT */
#define EIP197_xDR_PROC_xD_PKT_OFFSET
#define EIP197_xDR_PROC_xD_PKT_MASK
#define EIP197_xDR_PROC_xD_PKT(n)
#define EIP197_xDR_PROC_CLR_COUNT

/* EIP197_HIA_xDR_STAT */
#define EIP197_xDR_DMA_ERR
#define EIP197_xDR_PREP_CMD_THRES
#define EIP197_xDR_ERR
#define EIP197_xDR_THRESH
#define EIP197_xDR_TIMEOUT

#define EIP197_HIA_RA_PE_CTRL_RESET
#define EIP197_HIA_RA_PE_CTRL_EN

/* EIP197_HIA_OPTIONS */
#define EIP197_N_RINGS_OFFSET
#define EIP197_N_RINGS_MASK
#define EIP197_N_PES_OFFSET
#define EIP197_N_PES_MASK
#define EIP97_N_PES_MASK
#define EIP197_HWDATAW_OFFSET
#define EIP197_HWDATAW_MASK
#define EIP97_HWDATAW_MASK
#define EIP197_CFSIZE_OFFSET
#define EIP197_CFSIZE_ADJUST
#define EIP97_CFSIZE_OFFSET
#define EIP197_CFSIZE_MASK
#define EIP97_CFSIZE_MASK
#define EIP197_RFSIZE_OFFSET
#define EIP197_RFSIZE_ADJUST
#define EIP97_RFSIZE_OFFSET
#define EIP197_RFSIZE_MASK
#define EIP97_RFSIZE_MASK

/* EIP197_HIA_AIC_R_ENABLE_CTRL */
#define EIP197_CDR_IRQ(n)
#define EIP197_RDR_IRQ(n)

/* EIP197_HIA_DFE/DSE_CFG */
#define EIP197_HIA_DxE_CFG_MIN_DATA_SIZE(n)
#define EIP197_HIA_DxE_CFG_DATA_CACHE_CTRL(n)
#define EIP197_HIA_DxE_CFG_MAX_DATA_SIZE(n)
#define EIP197_HIA_DSE_CFG_ALWAYS_BUFFERABLE
#define EIP197_HIA_DxE_CFG_MIN_CTRL_SIZE(n)
#define EIP197_HIA_DxE_CFG_CTRL_CACHE_CTRL(n)
#define EIP197_HIA_DxE_CFG_MAX_CTRL_SIZE(n)
#define EIP197_HIA_DFE_CFG_DIS_DEBUG
#define EIP197_HIA_DSE_CFG_EN_SINGLE_WR
#define EIP197_HIA_DSE_CFG_DIS_DEBUG

/* EIP197_HIA_DFE/DSE_THR_CTRL */
#define EIP197_DxE_THR_CTRL_EN
#define EIP197_DxE_THR_CTRL_RESET_PE

/* EIP197_PE_ICE_PUE/FPP_CTRL */
#define EIP197_PE_ICE_UENG_START_OFFSET(n)
#define EIP197_PE_ICE_UENG_INIT_ALIGN_MASK
#define EIP197_PE_ICE_UENG_DEBUG_RESET

/* EIP197_HIA_AIC_G_ENABLED_STAT */
#define EIP197_G_IRQ_DFE(n)
#define EIP197_G_IRQ_DSE(n)
#define EIP197_G_IRQ_RING
#define EIP197_G_IRQ_PE(n)

/* EIP197_HIA_MST_CTRL */
#define RD_CACHE_3BITS
#define WR_CACHE_3BITS
#define RD_CACHE_4BITS
#define WR_CACHE_4BITS
#define EIP197_MST_CTRL_RD_CACHE(n)
#define EIP197_MST_CTRL_WD_CACHE(n)
#define EIP197_MST_CTRL_TX_MAX_CMD(n)
#define EIP197_MST_CTRL_BYTE_SWAP
#define EIP197_MST_CTRL_NO_BYTE_SWAP
#define EIP197_MST_CTRL_BYTE_SWAP_BITS

/* EIP197_PE_IN_DBUF/TBUF_THRES */
#define EIP197_PE_IN_xBUF_THRES_MIN(n)
#define EIP197_PE_IN_xBUF_THRES_MAX(n)

/* EIP197_PE_OUT_DBUF_THRES */
#define EIP197_PE_OUT_DBUF_THRES_MIN(n)
#define EIP197_PE_OUT_DBUF_THRES_MAX(n)

/* EIP197_PE_ICE_SCRATCH_CTRL */
#define EIP197_PE_ICE_SCRATCH_CTRL_CHANGE_TIMER
#define EIP197_PE_ICE_SCRATCH_CTRL_TIMER_EN
#define EIP197_PE_ICE_SCRATCH_CTRL_CHANGE_ACCESS
#define EIP197_PE_ICE_SCRATCH_CTRL_SCRATCH_ACCESS

/* EIP197_PE_ICE_SCRATCH_RAM */
#define EIP197_NUM_OF_SCRATCH_BLOCKS

/* EIP197_PE_ICE_PUE/FPP_CTRL */
#define EIP197_PE_ICE_x_CTRL_SW_RESET
#define EIP197_PE_ICE_x_CTRL_CLR_ECC_NON_CORR
#define EIP197_PE_ICE_x_CTRL_CLR_ECC_CORR

/* EIP197_PE_ICE_RAM_CTRL */
#define EIP197_PE_ICE_RAM_CTRL_PUE_PROG_EN
#define EIP197_PE_ICE_RAM_CTRL_FPP_PROG_EN

/* EIP197_PE_EIP96_TOKEN_CTRL */
#define EIP197_PE_EIP96_TOKEN_CTRL_CTX_UPDATES
#define EIP197_PE_EIP96_TOKEN_CTRL_NO_TOKEN_WAIT
#define EIP197_PE_EIP96_TOKEN_CTRL_ENABLE_TIMEOUT

/* EIP197_PE_EIP96_FUNCTION_EN */
#define EIP197_FUNCTION_ALL

/* EIP197_PE_EIP96_CONTEXT_CTRL */
#define EIP197_CONTEXT_SIZE(n)
#define EIP197_ADDRESS_MODE
#define EIP197_CONTROL_MODE

/* EIP197_PE_EIP96_TOKEN_CTRL2 */
#define EIP197_PE_EIP96_TOKEN_CTRL2_CTX_DONE

/* EIP197_PE_DEBUG */
#define EIP197_DEBUG_OCE_BYPASS

/* EIP197_STRC_CONFIG */
#define EIP197_STRC_CONFIG_INIT
#define EIP197_STRC_CONFIG_LARGE_REC(s)
#define EIP197_STRC_CONFIG_SMALL_REC(s)

/* EIP197_FLUE_CONFIG */
#define EIP197_FLUE_CONFIG_MAGIC

/* Context Control */
struct safexcel_context_record {} __packed;

/* control0 */
#define CONTEXT_CONTROL_TYPE_NULL_OUT
#define CONTEXT_CONTROL_TYPE_NULL_IN
#define CONTEXT_CONTROL_TYPE_HASH_OUT
#define CONTEXT_CONTROL_TYPE_HASH_IN
#define CONTEXT_CONTROL_TYPE_CRYPTO_OUT
#define CONTEXT_CONTROL_TYPE_CRYPTO_IN
#define CONTEXT_CONTROL_TYPE_ENCRYPT_HASH_OUT
#define CONTEXT_CONTROL_TYPE_DECRYPT_HASH_IN
#define CONTEXT_CONTROL_TYPE_HASH_ENCRYPT_OUT
#define CONTEXT_CONTROL_TYPE_HASH_DECRYPT_IN
#define CONTEXT_CONTROL_RESTART_HASH
#define CONTEXT_CONTROL_NO_FINISH_HASH
#define CONTEXT_CONTROL_SIZE(n)
#define CONTEXT_CONTROL_KEY_EN
#define CONTEXT_CONTROL_CRYPTO_ALG_DES
#define CONTEXT_CONTROL_CRYPTO_ALG_3DES
#define CONTEXT_CONTROL_CRYPTO_ALG_AES128
#define CONTEXT_CONTROL_CRYPTO_ALG_AES192
#define CONTEXT_CONTROL_CRYPTO_ALG_AES256
#define CONTEXT_CONTROL_CRYPTO_ALG_CHACHA20
#define CONTEXT_CONTROL_CRYPTO_ALG_SM4
#define CONTEXT_CONTROL_DIGEST_INITIAL
#define CONTEXT_CONTROL_DIGEST_PRECOMPUTED
#define CONTEXT_CONTROL_DIGEST_XCM
#define CONTEXT_CONTROL_DIGEST_HMAC
#define CONTEXT_CONTROL_CRYPTO_ALG_MD5
#define CONTEXT_CONTROL_CRYPTO_ALG_CRC32
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA1
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA224
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA256
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA384
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA512
#define CONTEXT_CONTROL_CRYPTO_ALG_GHASH
#define CONTEXT_CONTROL_CRYPTO_ALG_XCBC128
#define CONTEXT_CONTROL_CRYPTO_ALG_XCBC192
#define CONTEXT_CONTROL_CRYPTO_ALG_XCBC256
#define CONTEXT_CONTROL_CRYPTO_ALG_SM3
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA3_256
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA3_224
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA3_512
#define CONTEXT_CONTROL_CRYPTO_ALG_SHA3_384
#define CONTEXT_CONTROL_CRYPTO_ALG_POLY1305
#define CONTEXT_CONTROL_INV_FR
#define CONTEXT_CONTROL_INV_TR

/* control1 */
#define CONTEXT_CONTROL_CRYPTO_MODE_ECB
#define CONTEXT_CONTROL_CRYPTO_MODE_CBC
#define CONTEXT_CONTROL_CHACHA20_MODE_256_32
#define CONTEXT_CONTROL_CRYPTO_MODE_OFB
#define CONTEXT_CONTROL_CRYPTO_MODE_CFB
#define CONTEXT_CONTROL_CRYPTO_MODE_CTR_LOAD
#define CONTEXT_CONTROL_CRYPTO_MODE_XTS
#define CONTEXT_CONTROL_CRYPTO_MODE_XCM
#define CONTEXT_CONTROL_CHACHA20_MODE_CALC_OTK
#define CONTEXT_CONTROL_IV0
#define CONTEXT_CONTROL_IV1
#define CONTEXT_CONTROL_IV2
#define CONTEXT_CONTROL_IV3
#define CONTEXT_CONTROL_DIGEST_CNT
#define CONTEXT_CONTROL_COUNTER_MODE
#define CONTEXT_CONTROL_CRYPTO_STORE
#define CONTEXT_CONTROL_HASH_STORE

#define EIP197_XCM_MODE_GCM
#define EIP197_XCM_MODE_CCM

#define EIP197_AEAD_TYPE_IPSEC_ESP
#define EIP197_AEAD_TYPE_IPSEC_ESP_GMAC
#define EIP197_AEAD_IPSEC_IV_SIZE
#define EIP197_AEAD_IPSEC_NONCE_SIZE
#define EIP197_AEAD_IPSEC_COUNTER_SIZE
#define EIP197_AEAD_IPSEC_CCM_NONCE_SIZE

/* The hash counter given to the engine in the context has a granularity of
 * 64 bits.
 */
#define EIP197_COUNTER_BLOCK_SIZE

/* EIP197_CS_RAM_CTRL */
#define EIP197_TRC_ENABLE_0
#define EIP197_TRC_ENABLE_1
#define EIP197_TRC_ENABLE_2
#define EIP197_TRC_ENABLE_MASK
#define EIP197_CS_BANKSEL_MASK
#define EIP197_CS_BANKSEL_OFS

/* EIP197_TRC_PARAMS */
#define EIP197_TRC_PARAMS_SW_RESET
#define EIP197_TRC_PARAMS_DATA_ACCESS
#define EIP197_TRC_PARAMS_HTABLE_SZ(x)
#define EIP197_TRC_PARAMS_BLK_TIMER_SPEED(x)
#define EIP197_TRC_PARAMS_RC_SZ_LARGE(n)

/* EIP197_TRC_FREECHAIN */
#define EIP197_TRC_FREECHAIN_HEAD_PTR(p)
#define EIP197_TRC_FREECHAIN_TAIL_PTR(p)

/* EIP197_TRC_PARAMS2 */
#define EIP197_TRC_PARAMS2_HTABLE_PTR(p)
#define EIP197_TRC_PARAMS2_RC_SZ_SMALL(n)

/* Cache helpers */
#define EIP197_MIN_DSIZE
#define EIP197_MIN_ASIZE
#define EIP197_CS_TRC_REC_WC
#define EIP197_CS_RC_SIZE
#define EIP197_CS_RC_NEXT(x)
#define EIP197_CS_RC_PREV(x)
#define EIP197_RC_NULL

/* Result data */
struct result_data_desc {} __packed;


/* Basic Result Descriptor format */
struct safexcel_result_desc {} __packed;

/*
 * The EIP(1)97 only needs to fetch the descriptor part of
 * the result descriptor, not the result token part!
 */
#define EIP197_RD64_FETCH_SIZE
#define EIP197_RD64_RESULT_SIZE

struct safexcel_token {} __packed;

#define EIP197_TOKEN_HASH_RESULT_VERIFY

#define EIP197_TOKEN_CTX_OFFSET(x)
#define EIP197_TOKEN_DIRECTION_EXTERNAL
#define EIP197_TOKEN_EXEC_IF_SUCCESSFUL

#define EIP197_TOKEN_STAT_LAST_HASH
#define EIP197_TOKEN_STAT_LAST_PACKET
#define EIP197_TOKEN_OPCODE_DIRECTION
#define EIP197_TOKEN_OPCODE_INSERT
#define EIP197_TOKEN_OPCODE_NOOP
#define EIP197_TOKEN_OPCODE_RETRIEVE
#define EIP197_TOKEN_OPCODE_INSERT_REMRES
#define EIP197_TOKEN_OPCODE_VERIFY
#define EIP197_TOKEN_OPCODE_CTX_ACCESS
#define EIP197_TOKEN_OPCODE_BYPASS

static inline void eip197_noop_token(struct safexcel_token *token)
{}

/* Instructions */
#define EIP197_TOKEN_INS_INSERT_HASH_DIGEST
#define EIP197_TOKEN_INS_ORIGIN_IV0
#define EIP197_TOKEN_INS_ORIGIN_TOKEN
#define EIP197_TOKEN_INS_ORIGIN_LEN(x)
#define EIP197_TOKEN_INS_TYPE_OUTPUT
#define EIP197_TOKEN_INS_TYPE_HASH
#define EIP197_TOKEN_INS_TYPE_CRYPTO
#define EIP197_TOKEN_INS_LAST

/* Processing Engine Control Data  */
struct safexcel_control_data_desc {} __packed;

#define EIP197_OPTION_MAGIC_VALUE
#define EIP197_OPTION_64BIT_CTX
#define EIP197_OPTION_RC_AUTO
#define EIP197_OPTION_CTX_CTRL_IN_CMD
#define EIP197_OPTION_2_TOKEN_IV_CMD
#define EIP197_OPTION_4_TOKEN_IV_CMD

#define EIP197_TYPE_BCLA
#define EIP197_TYPE_EXTENDED
#define EIP197_CONTEXT_SMALL
#define EIP197_CONTEXT_SIZE_MASK

/* Basic Command Descriptor format */
struct safexcel_command_desc {} __packed;

#define EIP197_CD64_FETCH_SIZE

/*
 * Internal structures & functions
 */

#define EIP197_FW_TERMINAL_NOPS
#define EIP197_FW_START_POLLCNT
#define EIP197_FW_PUE_READY
#define EIP197_FW_FPP_READY

enum eip197_fw {};

struct safexcel_desc_ring {};

enum safexcel_alg_type {};

struct safexcel_config {};

struct safexcel_work_data {};

struct safexcel_ring {};

/* EIP integration context flags */
enum safexcel_eip_version {};

struct safexcel_priv_data {};

/* Priority we use for advertising our algorithms */
#define SAFEXCEL_CRA_PRIORITY

/* SM3 digest result for zero length message */
#define EIP197_SM3_ZEROM_HASH

/* EIP algorithm presence flags */
enum safexcel_eip_algorithms {};

struct safexcel_register_offsets {};

enum safexcel_flags {};

struct safexcel_hwconfig {};

struct safexcel_crypto_priv {};

struct safexcel_context {};

#define HASH_CACHE_SIZE

struct safexcel_ahash_export_state {};

/*
 * Template structure to describe the algorithms in order to register them.
 * It also has the purpose to contain our private structure and is actually
 * the only way I know in this framework to avoid having global pointers...
 */
struct safexcel_alg_template {};

void safexcel_dequeue(struct safexcel_crypto_priv *priv, int ring);
int safexcel_rdesc_check_errors(struct safexcel_crypto_priv *priv,
				void *rdp);
void safexcel_complete(struct safexcel_crypto_priv *priv, int ring);
int safexcel_invalidate_cache(struct crypto_async_request *async,
			      struct safexcel_crypto_priv *priv,
			      dma_addr_t ctxr_dma, int ring);
int safexcel_init_ring_descriptors(struct safexcel_crypto_priv *priv,
				   struct safexcel_desc_ring *cdr,
				   struct safexcel_desc_ring *rdr);
int safexcel_select_ring(struct safexcel_crypto_priv *priv);
void *safexcel_ring_next_rptr(struct safexcel_crypto_priv *priv,
			      struct safexcel_desc_ring *ring);
void *safexcel_ring_first_rptr(struct safexcel_crypto_priv *priv, int  ring);
void safexcel_ring_rollback_wptr(struct safexcel_crypto_priv *priv,
				 struct safexcel_desc_ring *ring);
struct safexcel_command_desc *safexcel_add_cdesc(struct safexcel_crypto_priv *priv,
						 int ring_id,
						 bool first, bool last,
						 dma_addr_t data, u32 len,
						 u32 full_data_len,
						 dma_addr_t context,
						 struct safexcel_token **atoken);
struct safexcel_result_desc *safexcel_add_rdesc(struct safexcel_crypto_priv *priv,
						 int ring_id,
						bool first, bool last,
						dma_addr_t data, u32 len);
int safexcel_ring_first_rdr_index(struct safexcel_crypto_priv *priv,
				  int ring);
int safexcel_ring_rdr_rdesc_index(struct safexcel_crypto_priv *priv,
				  int ring,
				  struct safexcel_result_desc *rdesc);
void safexcel_rdr_req_set(struct safexcel_crypto_priv *priv,
			  int ring,
			  struct safexcel_result_desc *rdesc,
			  struct crypto_async_request *req);
inline struct crypto_async_request *
safexcel_rdr_req_get(struct safexcel_crypto_priv *priv, int ring);
int safexcel_hmac_setkey(struct safexcel_context *base, const u8 *key,
			 unsigned int keylen, const char *alg,
			 unsigned int state_sz);

/* available algorithms */
extern struct safexcel_alg_template safexcel_alg_ecb_des;
extern struct safexcel_alg_template safexcel_alg_cbc_des;
extern struct safexcel_alg_template safexcel_alg_ecb_des3_ede;
extern struct safexcel_alg_template safexcel_alg_cbc_des3_ede;
extern struct safexcel_alg_template safexcel_alg_ecb_aes;
extern struct safexcel_alg_template safexcel_alg_cbc_aes;
extern struct safexcel_alg_template safexcel_alg_ctr_aes;
extern struct safexcel_alg_template safexcel_alg_md5;
extern struct safexcel_alg_template safexcel_alg_sha1;
extern struct safexcel_alg_template safexcel_alg_sha224;
extern struct safexcel_alg_template safexcel_alg_sha256;
extern struct safexcel_alg_template safexcel_alg_sha384;
extern struct safexcel_alg_template safexcel_alg_sha512;
extern struct safexcel_alg_template safexcel_alg_hmac_md5;
extern struct safexcel_alg_template safexcel_alg_hmac_sha1;
extern struct safexcel_alg_template safexcel_alg_hmac_sha224;
extern struct safexcel_alg_template safexcel_alg_hmac_sha256;
extern struct safexcel_alg_template safexcel_alg_hmac_sha384;
extern struct safexcel_alg_template safexcel_alg_hmac_sha512;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha1_cbc_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha224_cbc_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha256_cbc_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha384_cbc_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha512_cbc_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha1_cbc_des3_ede;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha1_ctr_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha224_ctr_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha256_ctr_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha384_ctr_aes;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha512_ctr_aes;
extern struct safexcel_alg_template safexcel_alg_xts_aes;
extern struct safexcel_alg_template safexcel_alg_gcm;
extern struct safexcel_alg_template safexcel_alg_ccm;
extern struct safexcel_alg_template safexcel_alg_crc32;
extern struct safexcel_alg_template safexcel_alg_cbcmac;
extern struct safexcel_alg_template safexcel_alg_xcbcmac;
extern struct safexcel_alg_template safexcel_alg_cmac;
extern struct safexcel_alg_template safexcel_alg_chacha20;
extern struct safexcel_alg_template safexcel_alg_chachapoly;
extern struct safexcel_alg_template safexcel_alg_chachapoly_esp;
extern struct safexcel_alg_template safexcel_alg_sm3;
extern struct safexcel_alg_template safexcel_alg_hmac_sm3;
extern struct safexcel_alg_template safexcel_alg_ecb_sm4;
extern struct safexcel_alg_template safexcel_alg_cbc_sm4;
extern struct safexcel_alg_template safexcel_alg_ctr_sm4;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha1_cbc_sm4;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sm3_cbc_sm4;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha1_ctr_sm4;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sm3_ctr_sm4;
extern struct safexcel_alg_template safexcel_alg_sha3_224;
extern struct safexcel_alg_template safexcel_alg_sha3_256;
extern struct safexcel_alg_template safexcel_alg_sha3_384;
extern struct safexcel_alg_template safexcel_alg_sha3_512;
extern struct safexcel_alg_template safexcel_alg_hmac_sha3_224;
extern struct safexcel_alg_template safexcel_alg_hmac_sha3_256;
extern struct safexcel_alg_template safexcel_alg_hmac_sha3_384;
extern struct safexcel_alg_template safexcel_alg_hmac_sha3_512;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha1_cbc_des;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha256_cbc_des3_ede;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha224_cbc_des3_ede;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha512_cbc_des3_ede;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha384_cbc_des3_ede;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha256_cbc_des;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha224_cbc_des;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha512_cbc_des;
extern struct safexcel_alg_template safexcel_alg_authenc_hmac_sha384_cbc_des;
extern struct safexcel_alg_template safexcel_alg_rfc4106_gcm;
extern struct safexcel_alg_template safexcel_alg_rfc4543_gcm;
extern struct safexcel_alg_template safexcel_alg_rfc4309_ccm;

#endif