linux/drivers/crypto/hisilicon/hpre/hpre.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2019 HiSilicon Limited. */
#ifndef __HISI_HPRE_H
#define __HISI_HPRE_H

#include <linux/list.h>
#include <linux/hisi_acc_qm.h>

#define HPRE_SQE_SIZE …
#define HPRE_PF_DEF_Q_NUM …
#define HPRE_PF_DEF_Q_BASE …

/*
 * type used in qm sqc DW6.
 * 0 - Algorithm which has been supported in V2, like RSA, DH and so on;
 * 1 - ECC algorithm in V3.
 */
#define HPRE_V2_ALG_TYPE …
#define HPRE_V3_ECC_ALG_TYPE …

enum { … };

enum hpre_ctrl_dbgfs_file { … };

enum hpre_dfx_dbgfs_file { … };

#define HPRE_DEBUGFS_FILE_NUM …

struct hpre_debugfs_file { … };

struct hpre_dfx { … };

/*
 * One HPRE controller has one PF and multiple VFs, some global configurations
 * which PF has need this structure.
 * Just relevant for PF.
 */
struct hpre_debug { … };

struct hpre { … };

enum hpre_alg_type { … };

struct hpre_sqe { … };

struct hisi_qp *hpre_create_qp(u8 type);
int hpre_algs_register(struct hisi_qm *qm);
void hpre_algs_unregister(struct hisi_qm *qm);
bool hpre_check_alg_support(struct hisi_qm *qm, u32 alg);
#endif