// SPDX-License-Identifier: GPL-2.0 /* Copyright (c) 2018-2019 HiSilicon Limited. */ #include <linux/acpi.h> #include <linux/bitops.h> #include <linux/debugfs.h> #include <linux/init.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/pm_runtime.h> #include <linux/topology.h> #include <linux/uacce.h> #include "hpre.h" #define HPRE_QM_ABNML_INT_MASK … #define HPRE_CTRL_CNT_CLR_CE_BIT … #define HPRE_COMM_CNT_CLR_CE … #define HPRE_CTRL_CNT_CLR_CE … #define HPRE_FSM_MAX_CNT … #define HPRE_VFG_AXQOS … #define HPRE_VFG_AXCACHE … #define HPRE_RDCHN_INI_CFG … #define HPRE_AWUSR_FP_CFG … #define HPRE_BD_ENDIAN … #define HPRE_ECC_BYPASS … #define HPRE_RAS_WIDTH_CFG … #define HPRE_POISON_BYPASS … #define HPRE_BD_ARUSR_CFG … #define HPRE_BD_AWUSR_CFG … #define HPRE_TYPES_ENB … #define HPRE_RSA_ENB … #define HPRE_ECC_ENB … #define HPRE_DATA_RUSER_CFG … #define HPRE_DATA_WUSER_CFG … #define HPRE_INT_MASK … #define HPRE_INT_STATUS … #define HPRE_HAC_INT_MSK … #define HPRE_HAC_RAS_CE_ENB … #define HPRE_HAC_RAS_NFE_ENB … #define HPRE_HAC_RAS_FE_ENB … #define HPRE_HAC_INT_SET … #define HPRE_RNG_TIMEOUT_NUM … #define HPRE_CORE_INT_ENABLE … #define HPRE_CORE_INT_DISABLE … #define HPRE_RDCHN_INI_ST … #define HPRE_CLSTR_BASE … #define HPRE_CORE_EN_OFFSET … #define HPRE_CORE_INI_CFG_OFFSET … #define HPRE_CORE_INI_STATUS_OFFSET … #define HPRE_CORE_HTBT_WARN_OFFSET … #define HPRE_CORE_IS_SCHD_OFFSET … #define HPRE_RAS_CE_ENB … #define HPRE_RAS_NFE_ENB … #define HPRE_RAS_FE_ENB … #define HPRE_OOO_SHUTDOWN_SEL … #define HPRE_HAC_RAS_FE_ENABLE … #define HPRE_CORE_ENB … #define HPRE_CORE_INI_CFG … #define HPRE_CORE_INI_STATUS … #define HPRE_HAC_ECC1_CNT … #define HPRE_HAC_ECC2_CNT … #define HPRE_HAC_SOURCE_INT … #define HPRE_CLSTR_ADDR_INTRVL … #define HPRE_CLUSTER_INQURY … #define HPRE_CLSTR_ADDR_INQRY_RSLT … #define HPRE_TIMEOUT_ABNML_BIT … #define HPRE_PASID_EN_BIT … #define HPRE_REG_RD_INTVRL_US … #define HPRE_REG_RD_TMOUT_US … #define HPRE_DBGFS_VAL_MAX_LEN … #define PCI_DEVICE_ID_HUAWEI_HPRE_PF … #define HPRE_QM_USR_CFG_MASK … #define HPRE_QM_AXI_CFG_MASK … #define HPRE_QM_VFG_AX_MASK … #define HPRE_BD_USR_MASK … #define HPRE_PREFETCH_CFG … #define HPRE_SVA_PREFTCH_DFX … #define HPRE_PREFETCH_ENABLE … #define HPRE_PREFETCH_DISABLE … #define HPRE_SVA_DISABLE_READY … /* clock gate */ #define HPRE_CLKGATE_CTL … #define HPRE_PEH_CFG_AUTO_GATE … #define HPRE_CLUSTER_DYN_CTL … #define HPRE_CORE_SHB_CFG … #define HPRE_CLKGATE_CTL_EN … #define HPRE_PEH_CFG_AUTO_GATE_EN … #define HPRE_CLUSTER_DYN_CTL_EN … #define HPRE_CORE_GATE_EN … #define HPRE_AM_OOO_SHUTDOWN_ENB … #define HPRE_AM_OOO_SHUTDOWN_ENABLE … #define HPRE_WR_MSI_PORT … #define HPRE_CORE_ECC_2BIT_ERR … #define HPRE_OOO_ECC_2BIT_ERR … #define HPRE_QM_BME_FLR … #define HPRE_QM_PM_FLR … #define HPRE_QM_SRIOV_FLR … #define HPRE_SHAPER_TYPE_RATE … #define HPRE_VIA_MSI_DSM … #define HPRE_SQE_MASK_OFFSET … #define HPRE_SQE_MASK_LEN … #define HPRE_CTX_Q_NUM_DEF … #define HPRE_DFX_BASE … #define HPRE_DFX_COMMON1 … #define HPRE_DFX_COMMON2 … #define HPRE_DFX_CORE … #define HPRE_DFX_BASE_LEN … #define HPRE_DFX_COMMON1_LEN … #define HPRE_DFX_COMMON2_LEN … #define HPRE_DFX_CORE_LEN … static const char hpre_name[] = …; static struct dentry *hpre_debugfs_root; static const struct pci_device_id hpre_dev_ids[] = …; MODULE_DEVICE_TABLE(pci, hpre_dev_ids); struct hpre_hw_error { … }; static const struct qm_dev_alg hpre_dev_algs[] = …; static struct hisi_qm_list hpre_devices = …; static const char * const hpre_debug_file_name[] = …; enum hpre_cap_type { … }; static const struct hisi_qm_cap_info hpre_basic_info[] = …; enum hpre_pre_store_cap_idx { … }; static const u32 hpre_pre_store_caps[] = …; static const struct hpre_hw_error hpre_hw_errors[] = …; static const u64 hpre_cluster_offsets[] = …; static const struct debugfs_reg32 hpre_cluster_dfx_regs[] = …; static const struct debugfs_reg32 hpre_com_dfx_regs[] = …; static const char *hpre_dfx_files[HPRE_DFX_FILE_NUM] = …; /* define the HPRE's dfx regs region and region length */ static struct dfx_diff_registers hpre_diff_regs[] = …; bool hpre_check_alg_support(struct hisi_qm *qm, u32 alg) { … } static int hpre_diff_regs_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static int hpre_com_regs_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static int hpre_cluster_regs_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static const struct kernel_param_ops hpre_uacce_mode_ops = …; /* * uacce_mode = 0 means hpre only register to crypto, * uacce_mode = 1 means hpre both register to crypto and uacce. */ static u32 uacce_mode = …; module_param_cb(…); MODULE_PARM_DESC(uacce_mode, UACCE_MODE_DESC); static bool pf_q_num_flag; static int pf_q_num_set(const char *val, const struct kernel_param *kp) { … } static const struct kernel_param_ops hpre_pf_q_num_ops = …; static u32 pf_q_num = …; module_param_cb(…); MODULE_PARM_DESC(…) …; static const struct kernel_param_ops vfs_num_ops = …; static u32 vfs_num; module_param_cb(…); MODULE_PARM_DESC(…) …; struct hisi_qp *hpre_create_qp(u8 type) { … } static void hpre_config_pasid(struct hisi_qm *qm) { … } static int hpre_cfg_by_dsm(struct hisi_qm *qm) { … } static int hpre_set_cluster(struct hisi_qm *qm) { … } /* * For Kunpeng 920, we should disable FLR triggered by hardware (BME/PM/SRIOV). * Or it may stay in D3 state when we bind and unbind hpre quickly, * as it does FLR triggered by hardware. */ static void disable_flr_of_bme(struct hisi_qm *qm) { … } static void hpre_open_sva_prefetch(struct hisi_qm *qm) { … } static void hpre_close_sva_prefetch(struct hisi_qm *qm) { … } static void hpre_enable_clock_gate(struct hisi_qm *qm) { … } static void hpre_disable_clock_gate(struct hisi_qm *qm) { … } static int hpre_set_user_domain_and_cache(struct hisi_qm *qm) { … } static void hpre_cnt_regs_clear(struct hisi_qm *qm) { … } static void hpre_master_ooo_ctrl(struct hisi_qm *qm, bool enable) { … } static void hpre_hw_error_disable(struct hisi_qm *qm) { … } static void hpre_hw_error_enable(struct hisi_qm *qm) { … } static inline struct hisi_qm *hpre_file_to_qm(struct hpre_debugfs_file *file) { … } static u32 hpre_clear_enable_read(struct hpre_debugfs_file *file) { … } static int hpre_clear_enable_write(struct hpre_debugfs_file *file, u32 val) { … } static u32 hpre_cluster_inqry_read(struct hpre_debugfs_file *file) { … } static void hpre_cluster_inqry_write(struct hpre_debugfs_file *file, u32 val) { … } static ssize_t hpre_ctrl_debug_read(struct file *filp, char __user *buf, size_t count, loff_t *pos) { … } static ssize_t hpre_ctrl_debug_write(struct file *filp, const char __user *buf, size_t count, loff_t *pos) { … } static const struct file_operations hpre_ctrl_debug_fops = …; static int hpre_debugfs_atomic64_get(void *data, u64 *val) { … } static int hpre_debugfs_atomic64_set(void *data, u64 val) { … } DEFINE_DEBUGFS_ATTRIBUTE(…); static int hpre_create_debugfs_file(struct hisi_qm *qm, struct dentry *dir, enum hpre_ctrl_dbgfs_file type, int indx) { … } static int hpre_pf_comm_regs_debugfs_init(struct hisi_qm *qm) { … } static int hpre_cluster_debugfs_init(struct hisi_qm *qm) { … } static int hpre_ctrl_debug_init(struct hisi_qm *qm) { … } static void hpre_dfx_debug_init(struct hisi_qm *qm) { … } static int hpre_debugfs_init(struct hisi_qm *qm) { … } static void hpre_debugfs_exit(struct hisi_qm *qm) { … } static int hpre_pre_store_cap_reg(struct hisi_qm *qm) { … } static int hpre_qm_init(struct hisi_qm *qm, struct pci_dev *pdev) { … } static int hpre_show_last_regs_init(struct hisi_qm *qm) { … } static void hpre_show_last_regs_uninit(struct hisi_qm *qm) { … } static void hpre_show_last_dfx_regs(struct hisi_qm *qm) { … } static void hpre_log_hw_error(struct hisi_qm *qm, u32 err_sts) { … } static u32 hpre_get_hw_err_status(struct hisi_qm *qm) { … } static void hpre_clear_hw_err_status(struct hisi_qm *qm, u32 err_sts) { … } static void hpre_open_axi_master_ooo(struct hisi_qm *qm) { … } static void hpre_err_info_init(struct hisi_qm *qm) { … } static const struct hisi_qm_err_ini hpre_err_ini = …; static int hpre_pf_probe_init(struct hpre *hpre) { … } static int hpre_probe_init(struct hpre *hpre) { … } static int hpre_probe(struct pci_dev *pdev, const struct pci_device_id *id) { … } static void hpre_remove(struct pci_dev *pdev) { … } static const struct dev_pm_ops hpre_pm_ops = …; static const struct pci_error_handlers hpre_err_handler = …; static struct pci_driver hpre_pci_driver = …; struct pci_driver *hisi_hpre_get_pf_driver(void) { … } EXPORT_SYMBOL_GPL(…); static void hpre_register_debugfs(void) { … } static void hpre_unregister_debugfs(void) { … } static int __init hpre_init(void) { … } static void __exit hpre_exit(void) { … } module_init(…) …; module_exit(hpre_exit); MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …;
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