linux/drivers/crypto/xilinx/zynqmp-sha.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Xilinx ZynqMP SHA Driver.
 * Copyright (c) 2022 Xilinx Inc.
 */
#include <linux/cacheflush.h>
#include <crypto/hash.h>
#include <crypto/internal/hash.h>
#include <crypto/sha3.h>
#include <linux/crypto.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/firmware/xlnx-zynqmp.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>

#define ZYNQMP_DMA_BIT_MASK …
#define ZYNQMP_DMA_ALLOC_FIXED_SIZE …

enum zynqmp_sha_op { … };

struct zynqmp_sha_drv_ctx { … };

struct zynqmp_sha_tfm_ctx { … };

struct zynqmp_sha_desc_ctx { … };

static dma_addr_t update_dma_addr, final_dma_addr;
static char *ubuf, *fbuf;

static int zynqmp_sha_init_tfm(struct crypto_shash *hash)
{ … }

static void zynqmp_sha_exit_tfm(struct crypto_shash *hash)
{ … }

static int zynqmp_sha_init(struct shash_desc *desc)
{ … }

static int zynqmp_sha_update(struct shash_desc *desc, const u8 *data, unsigned int length)
{ … }

static int zynqmp_sha_final(struct shash_desc *desc, u8 *out)
{ … }

static int zynqmp_sha_finup(struct shash_desc *desc, const u8 *data, unsigned int length, u8 *out)
{ … }

static int zynqmp_sha_import(struct shash_desc *desc, const void *in)
{ … }

static int zynqmp_sha_export(struct shash_desc *desc, void *out)
{ … }

static int zynqmp_sha_digest(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out)
{ … }

static struct zynqmp_sha_drv_ctx sha3_drv_ctx = …;

static int zynqmp_sha_probe(struct platform_device *pdev)
{ … }

static void zynqmp_sha_remove(struct platform_device *pdev)
{ … }

static struct platform_driver zynqmp_sha_driver = …;

module_platform_driver(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
MODULE_AUTHOR(…) …;