linux/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c

// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
/* Copyright(c) 2020 Intel Corporation */
#include <linux/iopoll.h>
#include <asm/div64.h>
#include "adf_accel_devices.h"
#include "adf_cfg_services.h"
#include "adf_common_drv.h"
#include "adf_fw_config.h"
#include "adf_gen4_hw_data.h"
#include "adf_gen4_pm.h"

u32 adf_gen4_get_accel_mask(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

u32 adf_gen4_get_num_accels(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

u32 adf_gen4_get_num_aes(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

u32 adf_gen4_get_misc_bar_id(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

u32 adf_gen4_get_etr_bar_id(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

u32 adf_gen4_get_sram_bar_id(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

enum dev_sku_info adf_gen4_get_sku(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

void adf_gen4_get_arb_info(struct arb_info *arb_info)
{ … }
EXPORT_SYMBOL_GPL(…);

void adf_gen4_get_admin_info(struct admin_info *admin_csrs_info)
{ … }
EXPORT_SYMBOL_GPL(…);

u32 adf_gen4_get_heartbeat_clock(struct adf_hw_device_data *self)
{ … }
EXPORT_SYMBOL_GPL(…);

void adf_gen4_enable_error_correction(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

void adf_gen4_enable_ints(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

int adf_gen4_init_device(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

static inline void adf_gen4_unpack_ssm_wdtimer(u64 value, u32 *upper,
					       u32 *lower)
{ … }

void adf_gen4_set_ssm_wdtimer(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

/*
 * The vector routing table is used to select the MSI-X entry to use for each
 * interrupt source.
 * The first ADF_GEN4_ETR_MAX_BANKS entries correspond to ring interrupts.
 * The final entry corresponds to VF2PF or error interrupts.
 * This vector table could be used to configure one MSI-X entry to be shared
 * between multiple interrupt sources.
 *
 * The default routing is set to have a one to one correspondence between the
 * interrupt source and the MSI-X entry used.
 */
void adf_gen4_set_msix_default_rttable(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

static int reset_ring_pair(void __iomem *csr, u32 bank_number)
{ … }

int adf_gen4_ring_pair_reset(struct adf_accel_dev *accel_dev, u32 bank_number)
{ … }
EXPORT_SYMBOL_GPL(…);

static const u32 thrd_to_arb_map_dcc[] = …;

static const u16 rp_group_to_arb_mask[] = …;

static bool is_single_service(int service_id)
{ … }

int adf_gen4_init_thd2arb_map(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

u16 adf_gen4_get_ring_to_svc_map(struct adf_accel_dev *accel_dev)
{ … }
EXPORT_SYMBOL_GPL(…);

/*
 * adf_gen4_bank_quiesce_coal_timer() - quiesce bank coalesced interrupt timer
 * @accel_dev: Pointer to the device structure
 * @bank_idx: Offset to the bank within this device
 * @timeout_ms: Timeout in milliseconds for the operation
 *
 * This function tries to quiesce the coalesced interrupt timer of a bank if
 * it has been enabled and triggered.
 *
 * Returns 0 on success, error code otherwise
 *
 */
int adf_gen4_bank_quiesce_coal_timer(struct adf_accel_dev *accel_dev,
				     u32 bank_idx, int timeout_ms)
{ … }
EXPORT_SYMBOL_GPL(…);

static int drain_bank(void __iomem *csr, u32 bank_number, int timeout_us)
{ … }

void adf_gen4_bank_drain_finish(struct adf_accel_dev *accel_dev,
				u32 bank_number)
{ … }

int adf_gen4_bank_drain_start(struct adf_accel_dev *accel_dev,
			      u32 bank_number, int timeout_us)
{ … }

static void bank_state_save(struct adf_hw_csr_ops *ops, void __iomem *base,
			    u32 bank, struct bank_state *state, u32 num_rings)
{ … }

#define CHECK_STAT(op, expect_val, name, args...) …

static int bank_state_restore(struct adf_hw_csr_ops *ops, void __iomem *base,
			      u32 bank, struct bank_state *state, u32 num_rings,
			      int tx_rx_gap)
{ … }

int adf_gen4_bank_state_save(struct adf_accel_dev *accel_dev, u32 bank_number,
			     struct bank_state *state)
{ … }
EXPORT_SYMBOL_GPL(…);

int adf_gen4_bank_state_restore(struct adf_accel_dev *accel_dev, u32 bank_number,
				struct bank_state *state)
{ … }
EXPORT_SYMBOL_GPL(…);