linux/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h

/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
/* Copyright(c) 2014 - 2020 Intel Corporation */
#ifndef ADF_DH895x_HW_DATA_H_
#define ADF_DH895x_HW_DATA_H_

#include <linux/units.h>

/* PCIe configuration space */
#define ADF_DH895XCC_SRAM_BAR …
#define ADF_DH895XCC_PMISC_BAR …
#define ADF_DH895XCC_ETR_BAR …
#define ADF_DH895XCC_FUSECTL_SKU_MASK …
#define ADF_DH895XCC_FUSECTL_SKU_SHIFT …
#define ADF_DH895XCC_FUSECTL_SKU_1 …
#define ADF_DH895XCC_FUSECTL_SKU_2 …
#define ADF_DH895XCC_FUSECTL_SKU_3 …
#define ADF_DH895XCC_FUSECTL_SKU_4 …
#define ADF_DH895XCC_MAX_ACCELERATORS …
#define ADF_DH895XCC_MAX_ACCELENGINES …
#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET …
#define ADF_DH895XCC_ACCELERATORS_MASK …
#define ADF_DH895XCC_ACCELENGINES_MASK …
#define ADF_DH895XCC_ETR_MAX_BANKS …

/* Masks for VF2PF interrupts */
#define ADF_DH895XCC_ERR_REG_VF2PF_L(vf_src) …
#define ADF_DH895XCC_ERR_MSK_VF2PF_L(vf_mask) …
#define ADF_DH895XCC_ERR_REG_VF2PF_U(vf_src) …
#define ADF_DH895XCC_ERR_MSK_VF2PF_U(vf_mask) …

/* AE to function mapping */
#define ADF_DH895XCC_AE2FUNC_MAP_GRP_A_NUM_REGS …
#define ADF_DH895XCC_AE2FUNC_MAP_GRP_B_NUM_REGS …

/* Clocks frequency */
#define ADF_DH895X_AE_FREQ …

/* FW names */
#define ADF_DH895XCC_FW …
#define ADF_DH895XCC_MMP …

void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data);
void adf_clean_hw_data_dh895xcc(struct adf_hw_device_data *hw_data);
#endif