linux/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h

/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
/* Copyright(c) 2014 - 2020 Intel Corporation */
#ifndef ADF_4XXX_HW_DATA_H_
#define ADF_4XXX_HW_DATA_H_

#include <linux/units.h>
#include <adf_accel_devices.h>

#define ADF_4XXX_MAX_ACCELENGINES …

#define ADF_4XXX_ACCELENGINES_MASK …
#define ADF_4XXX_ADMIN_AE_MASK …

#define ADF_4XXX_HICPPAGENTCMDPARERRLOG_MASK …
#define ADF_4XXX_PARITYERRORMASK_ATH_CPH_MASK …
#define ADF_4XXX_PARITYERRORMASK_CPR_XLT_MASK …
#define ADF_4XXX_PARITYERRORMASK_DCPR_UCS_MASK …
#define ADF_4XXX_PARITYERRORMASK_PKE_MASK …

/*
 * SSMFEATREN bit mask
 * BIT(4) - enables parity detection on CPP
 * BIT(12) - enables the logging of push/pull data errors
 *	     in pperr register
 * BIT(16) - BIT(23) - enable parity detection on SPPs
 */
#define ADF_4XXX_SSMFEATREN_MASK …

/* Firmware Binaries */
#define ADF_4XXX_FW …
#define ADF_4XXX_MMP …
#define ADF_4XXX_SYM_OBJ …
#define ADF_4XXX_DC_OBJ …
#define ADF_4XXX_ASYM_OBJ …
#define ADF_4XXX_ADMIN_OBJ …
/* Firmware for 402XXX */
#define ADF_402XX_FW …
#define ADF_402XX_MMP …
#define ADF_402XX_SYM_OBJ …
#define ADF_402XX_DC_OBJ …
#define ADF_402XX_ASYM_OBJ …
#define ADF_402XX_ADMIN_OBJ …

/* RL constants */
#define ADF_4XXX_RL_PCIE_SCALE_FACTOR_DIV …
#define ADF_4XXX_RL_PCIE_SCALE_FACTOR_MUL …
#define ADF_4XXX_RL_DCPR_CORRECTION …
#define ADF_4XXX_RL_SCANS_PER_SEC …
#define ADF_4XXX_RL_MAX_TP_ASYM …
#define ADF_4XXX_RL_MAX_TP_SYM …
#define ADF_4XXX_RL_MAX_TP_DC …
#define ADF_4XXX_RL_SLICE_REF …

/* Clocks frequency */
#define ADF_4XXX_AE_FREQ …

void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id);
void adf_clean_hw_data_4xxx(struct adf_hw_device_data *hw_data);

#endif