// SPDX-License-Identifier: GPL-2.0 /* * Faraday Technology FTTMR010 timer driver * Copyright (C) 2017 Linus Walleij <[email protected]> * * Based on a rewrite of arch/arm/mach-gemini/timer.c: * Copyright (C) 2001-2006 Storlink, Corp. * Copyright (C) 2008-2009 Paulius Zaleckas <[email protected]> */ #include <linux/interrupt.h> #include <linux/io.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/clockchips.h> #include <linux/clocksource.h> #include <linux/sched_clock.h> #include <linux/clk.h> #include <linux/slab.h> #include <linux/bitops.h> #include <linux/delay.h> /* * Register definitions common for all the timer variants. */ #define TIMER1_COUNT … #define TIMER1_LOAD … #define TIMER1_MATCH1 … #define TIMER1_MATCH2 … #define TIMER2_COUNT … #define TIMER2_LOAD … #define TIMER2_MATCH1 … #define TIMER2_MATCH2 … #define TIMER3_COUNT … #define TIMER3_LOAD … #define TIMER3_MATCH1 … #define TIMER3_MATCH2 … #define TIMER_CR … /* * Control register set to clear for ast2600 only. */ #define AST2600_TIMER_CR_CLR … /* * Control register (TMC30) bit fields for fttmr010/gemini/moxart timers. */ #define TIMER_1_CR_ENABLE … #define TIMER_1_CR_CLOCK … #define TIMER_1_CR_INT … #define TIMER_2_CR_ENABLE … #define TIMER_2_CR_CLOCK … #define TIMER_2_CR_INT … #define TIMER_3_CR_ENABLE … #define TIMER_3_CR_CLOCK … #define TIMER_3_CR_INT … #define TIMER_1_CR_UPDOWN … #define TIMER_2_CR_UPDOWN … #define TIMER_3_CR_UPDOWN … /* * Control register (TMC30) bit fields for aspeed ast2400/ast2500 timers. * The aspeed timers move bits around in the control register and lacks * bits for setting the timer to count upwards. */ #define TIMER_1_CR_ASPEED_ENABLE … #define TIMER_1_CR_ASPEED_CLOCK … #define TIMER_1_CR_ASPEED_INT … #define TIMER_2_CR_ASPEED_ENABLE … #define TIMER_2_CR_ASPEED_CLOCK … #define TIMER_2_CR_ASPEED_INT … #define TIMER_3_CR_ASPEED_ENABLE … #define TIMER_3_CR_ASPEED_CLOCK … #define TIMER_3_CR_ASPEED_INT … /* * Interrupt status/mask register definitions for fttmr010/gemini/moxart * timers. * The registers don't exist and they are not needed on aspeed timers * because: * - aspeed timer overflow interrupt is controlled by bits in Control * Register (TMC30). * - aspeed timers always generate interrupt when either one of the * Match registers equals to Status register. */ #define TIMER_INTR_STATE … #define TIMER_INTR_MASK … #define TIMER_1_INT_MATCH1 … #define TIMER_1_INT_MATCH2 … #define TIMER_1_INT_OVERFLOW … #define TIMER_2_INT_MATCH1 … #define TIMER_2_INT_MATCH2 … #define TIMER_2_INT_OVERFLOW … #define TIMER_3_INT_MATCH1 … #define TIMER_3_INT_MATCH2 … #define TIMER_3_INT_OVERFLOW … #define TIMER_INT_ALL_MASK … struct fttmr010 { … }; /* * A local singleton used by sched_clock and delay timer reads, which are * fast and stateless */ static struct fttmr010 *local_fttmr; static inline struct fttmr010 *to_fttmr010(struct clock_event_device *evt) { … } static unsigned long fttmr010_read_current_timer_up(void) { … } static unsigned long fttmr010_read_current_timer_down(void) { … } static u64 notrace fttmr010_read_sched_clock_up(void) { … } static u64 notrace fttmr010_read_sched_clock_down(void) { … } static int fttmr010_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) { … } static int ast2600_timer_shutdown(struct clock_event_device *evt) { … } static int fttmr010_timer_shutdown(struct clock_event_device *evt) { … } static int fttmr010_timer_set_oneshot(struct clock_event_device *evt) { … } static int fttmr010_timer_set_periodic(struct clock_event_device *evt) { … } /* * IRQ handler for the timer */ static irqreturn_t fttmr010_timer_interrupt(int irq, void *dev_id) { … } static irqreturn_t ast2600_timer_interrupt(int irq, void *dev_id) { … } static int __init fttmr010_common_init(struct device_node *np, bool is_aspeed, bool is_ast2600) { … } static __init int ast2600_timer_init(struct device_node *np) { … } static __init int aspeed_timer_init(struct device_node *np) { … } static __init int fttmr010_timer_init(struct device_node *np) { … } TIMER_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_init); TIMER_OF_DECLARE(gemini, "cortina,gemini-timer", fttmr010_timer_init); TIMER_OF_DECLARE(moxart, "moxa,moxart-timer", fttmr010_timer_init); TIMER_OF_DECLARE(ast2400, "aspeed,ast2400-timer", aspeed_timer_init); TIMER_OF_DECLARE(ast2500, "aspeed,ast2500-timer", aspeed_timer_init); TIMER_OF_DECLARE(ast2600, "aspeed,ast2600-timer", ast2600_timer_init);
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