// SPDX-License-Identifier: GPL-2.0+ // // Copyright (C) 2000-2001 Deep Blue Solutions // Copyright (C) 2002 Shane Nay ([email protected]) // Copyright (C) 2006-2007 Pavel Pisa ([email protected]) // Copyright (C) 2008 Juergen Beisert ([email protected]) // Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved. #include <linux/err.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/clockchips.h> #include <linux/clk.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/stmp_device.h> #include <linux/sched_clock.h> /* * There are 2 versions of the timrot on Freescale MXS-based SoCs. * The v1 on MX23 only gets 16 bits counter, while v2 on MX28 * extends the counter to 32 bits. * * The implementation uses two timers, one for clock_event and * another for clocksource. MX28 uses timrot 0 and 1, while MX23 * uses 0 and 2. */ #define MX23_TIMROT_VERSION_OFFSET … #define MX28_TIMROT_VERSION_OFFSET … #define BP_TIMROT_MAJOR_VERSION … #define BV_TIMROT_VERSION_1 … #define BV_TIMROT_VERSION_2 … #define timrot_is_v1() … /* * There are 4 registers for each timrotv2 instance, and 2 registers * for each timrotv1. So address step 0x40 in macros below strides * one instance of timrotv2 while two instances of timrotv1. * * As the result, HW_TIMROT_XXXn(1) defines the address of timrot1 * on MX28 while timrot2 on MX23. */ /* common between v1 and v2 */ #define HW_TIMROT_ROTCTRL … #define HW_TIMROT_TIMCTRLn(n) … /* v1 only */ #define HW_TIMROT_TIMCOUNTn(n) … /* v2 only */ #define HW_TIMROT_RUNNING_COUNTn(n) … #define HW_TIMROT_FIXED_COUNTn(n) … #define BM_TIMROT_TIMCTRLn_RELOAD … #define BM_TIMROT_TIMCTRLn_UPDATE … #define BM_TIMROT_TIMCTRLn_IRQ_EN … #define BM_TIMROT_TIMCTRLn_IRQ … #define BP_TIMROT_TIMCTRLn_SELECT … #define BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL … #define BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL … #define BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS … static struct clock_event_device mxs_clockevent_device; static void __iomem *mxs_timrot_base; static u32 timrot_major_version; static inline void timrot_irq_disable(void) { … } static inline void timrot_irq_enable(void) { … } static void timrot_irq_acknowledge(void) { … } static u64 timrotv1_get_cycles(struct clocksource *cs) { … } static int timrotv1_set_next_event(unsigned long evt, struct clock_event_device *dev) { … } static int timrotv2_set_next_event(unsigned long evt, struct clock_event_device *dev) { … } static irqreturn_t mxs_timer_interrupt(int irq, void *dev_id) { … } static void mxs_irq_clear(char *state) { … } static int mxs_shutdown(struct clock_event_device *evt) { … } static int mxs_set_oneshot(struct clock_event_device *evt) { … } static struct clock_event_device mxs_clockevent_device = …; static int __init mxs_clockevent_init(struct clk *timer_clk) { … } static struct clocksource clocksource_mxs = …; static u64 notrace mxs_read_sched_clock_v2(void) { … } static int __init mxs_clocksource_init(struct clk *timer_clk) { … } static int __init mxs_timer_init(struct device_node *np) { … } TIMER_OF_DECLARE(mxs, "fsl,timrot", mxs_timer_init);
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