linux/drivers/clocksource/timer-tegra.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2010 Google, Inc.
 *
 * Author:
 *	Colin Cross <[email protected]>
 */

#define pr_fmt(fmt) …

#include <linux/clk.h>
#include <linux/clockchips.h>
#include <linux/cpu.h>
#include <linux/cpumask.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/percpu.h>
#include <linux/sched_clock.h>
#include <linux/time.h>

#include "timer-of.h"

#define RTC_SECONDS …
#define RTC_SHADOW_SECONDS …
#define RTC_MILLISECONDS …

#define TIMERUS_CNTR_1US …
#define TIMERUS_USEC_CFG …
#define TIMERUS_CNTR_FREEZE …

#define TIMER_PTV …
#define TIMER_PTV_EN …
#define TIMER_PTV_PER …
#define TIMER_PCR …
#define TIMER_PCR_INTR_CLR …

#define TIMER1_BASE …
#define TIMER2_BASE …
#define TIMER3_BASE …
#define TIMER4_BASE …
#define TIMER10_BASE …

#define TIMER1_IRQ_IDX …
#define TIMER10_IRQ_IDX …

#define TIMER_1MHz …

static u32 usec_config;
static void __iomem *timer_reg_base;

static int tegra_timer_set_next_event(unsigned long cycles,
				      struct clock_event_device *evt)
{ … }

static int tegra_timer_shutdown(struct clock_event_device *evt)
{ … }

static int tegra_timer_set_periodic(struct clock_event_device *evt)
{ … }

static irqreturn_t tegra_timer_isr(int irq, void *dev_id)
{ … }

static void tegra_timer_suspend(struct clock_event_device *evt)
{ … }

static void tegra_timer_resume(struct clock_event_device *evt)
{ … }

static DEFINE_PER_CPU(struct timer_of, tegra_to) = …;

static int tegra_timer_setup(unsigned int cpu)
{ … }

static int tegra_timer_stop(unsigned int cpu)
{ … }

static u64 notrace tegra_read_sched_clock(void)
{ … }

#ifdef CONFIG_ARM
static unsigned long tegra_delay_timer_read_counter_long(void)
{
	return readl_relaxed(timer_reg_base + TIMERUS_CNTR_1US);
}

static struct delay_timer tegra_delay_timer = {
	.read_current_timer = tegra_delay_timer_read_counter_long,
	.freq = TIMER_1MHz,
};
#endif

static struct timer_of suspend_rtc_to = …;

/*
 * tegra_rtc_read - Reads the Tegra RTC registers
 * Care must be taken that this function is not called while the
 * tegra_rtc driver could be executing to avoid race conditions
 * on the RTC shadow register
 */
static u64 tegra_rtc_read_ms(struct clocksource *cs)
{ … }

static struct clocksource suspend_rtc_clocksource = …;

static inline unsigned int tegra_base_for_cpu(int cpu, bool tegra20)
{ … }

static inline unsigned int tegra_irq_idx_for_cpu(int cpu, bool tegra20)
{ … }

static inline unsigned long tegra_rate_for_timer(struct timer_of *to,
						 bool tegra20)
{ … }

static int __init tegra_init_timer(struct device_node *np, bool tegra20,
				   int rating)
{ … }

static int __init tegra210_init_timer(struct device_node *np)
{ … }
TIMER_OF_DECLARE(tegra210_timer, "nvidia,tegra210-timer", tegra210_init_timer);

static int __init tegra20_init_timer(struct device_node *np)
{ … }
TIMER_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer);

static int __init tegra20_init_rtc(struct device_node *np)
{ … }
TIMER_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);