// SPDX-License-Identifier: GPL-2.0-or-later /* * Mediatek SoCs General-Purpose Timer handling. * * Copyright (C) 2014 Matthias Brugger * * Matthias Brugger <[email protected]> */ #define pr_fmt(fmt) … #include <linux/clockchips.h> #include <linux/clocksource.h> #include <linux/interrupt.h> #include <linux/irqreturn.h> #include <linux/sched_clock.h> #include <linux/slab.h> #include "timer-of.h" #define TIMER_CLK_EVT … #define TIMER_CLK_SRC … #define TIMER_SYNC_TICKS … /* gpt */ #define GPT_IRQ_EN_REG … #define GPT_IRQ_ENABLE(val) … #define GPT_IRQ_ACK_REG … #define GPT_IRQ_ACK(val) … #define GPT_CTRL_REG(val) … #define GPT_CTRL_OP(val) … #define GPT_CTRL_OP_ONESHOT … #define GPT_CTRL_OP_REPEAT … #define GPT_CTRL_OP_FREERUN … #define GPT_CTRL_CLEAR … #define GPT_CTRL_ENABLE … #define GPT_CTRL_DISABLE … #define GPT_CLK_REG(val) … #define GPT_CLK_SRC(val) … #define GPT_CLK_SRC_SYS13M … #define GPT_CLK_SRC_RTC32K … #define GPT_CLK_DIV1 … #define GPT_CLK_DIV2 … #define GPT_CNT_REG(val) … #define GPT_CMP_REG(val) … /* system timer */ #define SYST_BASE … #define SYST_CON … #define SYST_VAL … #define SYST_CON_REG(to) … #define SYST_VAL_REG(to) … /* * SYST_CON_EN: Clock enable. Shall be set to * - Start timer countdown. * - Allow timeout ticks being updated. * - Allow changing interrupt status,like clear irq pending. * * SYST_CON_IRQ_EN: Set to enable interrupt. * * SYST_CON_IRQ_CLR: Set to clear interrupt. */ #define SYST_CON_EN … #define SYST_CON_IRQ_EN … #define SYST_CON_IRQ_CLR … static void __iomem *gpt_sched_reg __read_mostly; static void mtk_syst_ack_irq(struct timer_of *to) { … } static irqreturn_t mtk_syst_handler(int irq, void *dev_id) { … } static int mtk_syst_clkevt_next_event(unsigned long ticks, struct clock_event_device *clkevt) { … } static int mtk_syst_clkevt_shutdown(struct clock_event_device *clkevt) { … } static int mtk_syst_clkevt_resume(struct clock_event_device *clkevt) { … } static int mtk_syst_clkevt_oneshot(struct clock_event_device *clkevt) { … } static u64 notrace mtk_gpt_read_sched_clock(void) { … } static void mtk_gpt_clkevt_time_stop(struct timer_of *to, u8 timer) { … } static void mtk_gpt_clkevt_time_setup(struct timer_of *to, unsigned long delay, u8 timer) { … } static void mtk_gpt_clkevt_time_start(struct timer_of *to, bool periodic, u8 timer) { … } static int mtk_gpt_clkevt_shutdown(struct clock_event_device *clk) { … } static int mtk_gpt_clkevt_set_periodic(struct clock_event_device *clk) { … } static int mtk_gpt_clkevt_next_event(unsigned long event, struct clock_event_device *clk) { … } static irqreturn_t mtk_gpt_interrupt(int irq, void *dev_id) { … } static void __init mtk_gpt_setup(struct timer_of *to, u8 timer, u8 option) { … } static void mtk_gpt_enable_irq(struct timer_of *to, u8 timer) { … } static void mtk_gpt_resume(struct clock_event_device *clk) { … } static void mtk_gpt_suspend(struct clock_event_device *clk) { … } static struct timer_of to = …; static int __init mtk_syst_init(struct device_node *node) { … } static int __init mtk_gpt_init(struct device_node *node) { … } TIMER_OF_DECLARE(mtk_mt6577, "mediatek,mt6577-timer", mtk_gpt_init); TIMER_OF_DECLARE(mtk_mt6765, "mediatek,mt6765-timer", mtk_syst_init);
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