// SPDX-License-Identifier: GPL-2.0-or-later /* * Clocksource driver for Loongson-1 SoC * * Copyright (c) 2023 Keguang Zhang <[email protected]> */ #include <linux/clockchips.h> #include <linux/interrupt.h> #include <linux/sizes.h> #include "timer-of.h" /* Loongson-1 PWM Timer Register Definitions */ #define PWM_CNTR … #define PWM_HRC … #define PWM_LRC … #define PWM_CTRL … /* PWM Control Register Bits */ #define INT_LRC_EN … #define INT_HRC_EN … #define CNTR_RST … #define INT_SR … #define INT_EN … #define PWM_SINGLE … #define PWM_OE … #define CNT_EN … #define CNTR_WIDTH … static DEFINE_RAW_SPINLOCK(ls1x_timer_lock); struct ls1x_clocksource { … }; static inline struct ls1x_clocksource *to_ls1x_clksrc(struct clocksource *c) { … } static inline void ls1x_pwmtimer_set_period(unsigned int period, struct timer_of *to) { … } static inline void ls1x_pwmtimer_clear(struct timer_of *to) { … } static inline void ls1x_pwmtimer_start(struct timer_of *to) { … } static inline void ls1x_pwmtimer_stop(struct timer_of *to) { … } static inline void ls1x_pwmtimer_irq_ack(struct timer_of *to) { … } static irqreturn_t ls1x_clockevent_isr(int irq, void *dev_id) { … } static int ls1x_clockevent_set_state_periodic(struct clock_event_device *clkevt) { … } static int ls1x_clockevent_tick_resume(struct clock_event_device *clkevt) { … } static int ls1x_clockevent_set_state_shutdown(struct clock_event_device *clkevt) { … } static int ls1x_clockevent_set_next(unsigned long evt, struct clock_event_device *clkevt) { … } static struct timer_of ls1x_to = …; /* * Since the PWM timer overflows every two ticks, its not very useful * to just read by itself. So use jiffies to emulate a free * running counter: */ static u64 ls1x_clocksource_read(struct clocksource *cs) { … } static struct ls1x_clocksource ls1x_clocksource = …; static int __init ls1x_pwm_clocksource_init(struct device_node *np) { … } TIMER_OF_DECLARE(ls1x_pwm_clocksource, "loongson,ls1b-pwmtimer", ls1x_pwm_clocksource_init);
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