#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include "clk-mtk.h"
#include "clk-gate.h"
#include "clk-mux.h"
#include "clk-pll.h"
#include <dt-bindings/clock/mediatek,mt7988-clk.h>
#define MT7988_PLL_FMAX …
#define MT7988_PCW_CHG_BIT …
#define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, _pcwbits, _pd_reg, \
_pd_shift, _tuner_reg, _tuner_en_reg, _tuner_en_bit, _pcw_reg, _pcw_shift, \
_pcw_chg_reg) …
static const struct mtk_pll_data plls[] = …;
static const struct of_device_id of_match_clk_mt7988_apmixed[] = …;
static int clk_mt7988_apmixed_probe(struct platform_device *pdev)
{ … }
static struct platform_driver clk_mt7988_apmixed_drv = …;
builtin_platform_driver(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;