linux/drivers/clk/mediatek/clk-mt7988-xfipll.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2023 Daniel Golle <[email protected]>
 */

#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include "clk-mtk.h"
#include "clk-gate.h"
#include <dt-bindings/clock/mediatek,mt7988-clk.h>

/* Register to control USXGMII XFI PLL analog */
#define XFI_PLL_ANA_GLB8 …
#define RG_XFI_PLL_ANA_SWWA …

static const struct mtk_gate_regs xfipll_cg_regs = …;

#define GATE_XFIPLL(_id, _name, _parent, _shift) …

static const struct mtk_fixed_factor xfipll_divs[] = …;

static const struct mtk_gate xfipll_clks[] = …;

static const struct mtk_clk_desc xfipll_desc = …;

static int clk_mt7988_xfipll_probe(struct platform_device *pdev)
{
	struct device_node *node = pdev->dev.of_node;
	void __iomem *base = of_iomap(node, 0);

	if (!base)
		return -ENOMEM;

	/* Apply software workaround for USXGMII PLL TCL issue */
	writel(RG_XFI_PLL_ANA_SWWA, base + XFI_PLL_ANA_GLB8);
	iounmap(base);

	return mtk_clk_simple_probe(pdev);
};

static const struct of_device_id of_match_clk_mt7988_xfipll[] = …;
MODULE_DEVICE_TABLE(of, of_match_clk_mt7988_xfipll);

static struct platform_driver clk_mt7988_xfipll_drv = …;
module_platform_driver(…) …;

MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;