linux/drivers/clk/mediatek/clk-mt7629.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2018 MediaTek Inc.
 * Author: Wenzhen Yu <Wenzhen [email protected]>
 *	   Ryder Lee <[email protected]>
 */

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "clk-cpumux.h"
#include "clk-gate.h"
#include "clk-mtk.h"
#include "clk-pll.h"

#include <dt-bindings/clock/mt7629-clk.h>

#define MT7629_PLL_FMAX …
#define CON0_MT7629_RST_BAR …

#define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,	\
			_pd_reg, _pd_shift, _tuner_reg, _pcw_reg,	\
			_pcw_shift, _div_table, _parent_name) …

#define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,	\
		_pd_reg, _pd_shift, _tuner_reg, _pcw_reg,		\
		_pcw_shift) …

#define GATE_APMIXED(_id, _name, _parent, _shift) …

#define GATE_INFRA(_id, _name, _parent, _shift) …

#define GATE_PERI0(_id, _name, _parent, _shift) …

#define GATE_PERI1(_id, _name, _parent, _shift) …

static DEFINE_SPINLOCK(mt7629_clk_lock);

static const char * const axi_parents[] = …;

static const char * const mem_parents[] = …;

static const char * const ddrphycfg_parents[] = …;

static const char * const eth_parents[] = …;

static const char * const pwm_parents[] = …;

static const char * const f10m_ref_parents[] = …;

static const char * const nfi_infra_parents[] = …;

static const char * const flash_parents[] = …;

static const char * const uart_parents[] = …;

static const char * const spi0_parents[] = …;

static const char * const spi1_parents[] = …;

static const char * const msdc30_0_parents[] = …;

static const char * const msdc30_1_parents[] = …;

static const char * const ap2wbmcu_parents[] = …;

static const char * const audio_parents[] = …;

static const char * const aud_intbus_parents[] = …;

static const char * const pmicspi_parents[] = …;

static const char * const scp_parents[] = …;

static const char * const atb_parents[] = …;

static const char * const hif_parents[] = …;

static const char * const sata_parents[] = …;

static const char * const usb20_parents[] = …;

static const char * const aud1_parents[] = …;

static const char * const irrx_parents[] = …;

static const char * const crypto_parents[] = …;

static const char * const gpt10m_parents[] = …;

static const char * const peribus_ck_parents[] = …;

static const char * const infra_mux1_parents[] = …;

static const struct mtk_gate_regs apmixed_cg_regs = …;

static const struct mtk_gate_regs infra_cg_regs = …;

static const struct mtk_gate_regs peri0_cg_regs = …;

static const struct mtk_gate_regs peri1_cg_regs = …;

static const struct mtk_pll_data plls[] = …;

static const struct mtk_gate apmixed_clks[] = …;

static const struct mtk_gate infra_clks[] = …;

static const struct mtk_fixed_clk top_fixed_clks[] = …;

static const struct mtk_fixed_factor top_divs[] = …;

static const struct mtk_gate peri_clks[] = …;

static struct mtk_composite infra_muxes[] = …;

static struct mtk_composite top_muxes[] = …;

static struct mtk_composite peri_muxes[] = …;

static int mtk_topckgen_init(struct platform_device *pdev)
{ … }

static int mtk_infrasys_init(struct platform_device *pdev)
{ … }

static int mtk_pericfg_init(struct platform_device *pdev)
{ … }

static int mtk_apmixedsys_init(struct platform_device *pdev)
{ … }


static const struct of_device_id of_match_clk_mt7629[] = …;
MODULE_DEVICE_TABLE(of, of_match_clk_mt7629);

static int clk_mt7629_probe(struct platform_device *pdev)
{ … }

static struct platform_driver clk_mt7629_drv = …;

static int clk_mt7629_init(void)
{ … }

arch_initcall(clk_mt7629_init);

MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;