/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. * * Modifications for inclusion into the Linux staging tree are * Copyright(c) 2010 Larry Finger. All rights reserved. * * Contact information: * WLAN FAE <[email protected]> * Larry Finger <[email protected]> * ******************************************************************************/ #ifndef __RTL8712_GP_BITDEF_H__ #define __RTL8712_GP_BITDEF_H__ /*GPIO_CTRL*/ #define _GPIO_MOD_MSK … #define _GPIO_MOD_SHT … #define _GPIO_IO_SEL_MSK … #define _GPIO_IO_SEL_SHT … #define _GPIO_OUT_MSK … #define _GPIO_OUT_SHT … #define _GPIO_IN_MSK … #define _GPIO_IN_SHT … /*SYS_PINMUX_CFG*/ #define _GPIOSEL_MSK … #define _GPIOSEL_SHT … /*LED_CFG*/ #define _LED1SV … #define _LED1CM_MSK … #define _LED1CM_SHT … #define _LED0SV … #define _LED0CM_MSK … #define _LED0CM_SHT … /*PHY_REG*/ #define _HST_RDRDY_SHT … #define _HST_RDRDY_MSK … #define _HST_RDRDY … #define _CPU_WTBUSY_SHT … #define _CPU_WTBUSY_MSK … #define _CPU_WTBUSY … /* 11. General Purpose Registers (Offset: 0x02E0 - 0x02FF)*/ /* 8192S GPIO Config Setting (offset 0x2F1, 1 byte)*/ /*----------------------------------------------------------------------------*/ #define GPIOMUX_EN … #define GPIOSEL_GPIO … #define GPIOSEL_PHYDBG … #define GPIOSEL_BT … #define GPIOSEL_WLANDBG … #define GPIOSEL_GPIO_MASK … /* HW Radio OFF switch (GPIO BIT) */ #define HAL_8192S_HW_GPIO_OFF_BIT … #define HAL_8192S_HW_GPIO_OFF_MASK … #define HAL_8192S_HW_GPIO_WPS_BIT … #endif /*__RTL8712_GP_BITDEF_H__*/
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