/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Common library for ADIS16XXX devices * * Copyright 2012 Analog Devices Inc. * Author: Lars-Peter Clausen <[email protected]> */ #ifndef __IIO_ADIS_H__ #define __IIO_ADIS_H__ #include <linux/cleanup.h> #include <linux/spi/spi.h> #include <linux/interrupt.h> #include <linux/iio/iio.h> #include <linux/iio/types.h> #define ADIS_WRITE_REG(reg) … #define ADIS_READ_REG(reg) … #define ADIS_PAGE_SIZE … #define ADIS_REG_PAGE_ID … struct adis; struct iio_dev_attr; /** * struct adis_timeouts - ADIS chip variant timeouts * @reset_ms - Wait time after rst pin goes inactive * @sw_reset_ms - Wait time after sw reset command * @self_test_ms - Wait time after self test command */ struct adis_timeout { … }; /** * struct adis_data - ADIS chip variant specific data * @read_delay: SPI delay for read operations in us * @write_delay: SPI delay for write operations in us * @cs_change_delay: SPI delay between CS changes in us * @glob_cmd_reg: Register address of the GLOB_CMD register * @msc_ctrl_reg: Register address of the MSC_CTRL register * @diag_stat_reg: Register address of the DIAG_STAT register * @prod_id_reg: Register address of the PROD_ID register * @prod_id: Product ID code that should be expected when reading @prod_id_reg * @self_test_mask: Bitmask of supported self-test operations * @self_test_reg: Register address to request self test command * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg * @status_error_msgs: Array of error messages * @status_error_mask: Bitmask of errors supported by the device * @timeouts: Chip specific delays * @enable_irq: Hook for ADIS devices that have a special IRQ enable/disable * @unmasked_drdy: True for devices that cannot mask/unmask the data ready pin * @has_paging: True if ADIS device has paged registers * @burst_reg_cmd: Register command that triggers burst * @burst_len: Burst size in the SPI RX buffer. If @burst_max_len is defined, * this should be the minimum size supported by the device. * @burst_max_len: Holds the maximum burst size when the device supports * more than one burst mode with different sizes * @burst_max_speed_hz: Maximum spi speed that can be used in burst mode */ struct adis_data { … }; /** * struct adis - ADIS device instance data * @spi: Reference to SPI device which owns this ADIS IIO device * @trig: IIO trigger object data * @data: ADIS chip variant specific data * @burst: ADIS burst transfer information * @burst_extra_len: Burst extra length. Should only be used by devices that can * dynamically change their burst mode length. * @state_lock: Lock used by the device to protect state * @msg: SPI message object * @xfer: SPI transfer objects to be used for a @msg * @current_page: Some ADIS devices have registers, this selects current page * @irq_flag: IRQ handling flags as passed to request_irq() * @buffer: Data buffer for information read from the device * @tx: DMA safe TX buffer for SPI transfers * @rx: DMA safe RX buffer for SPI transfers */ struct adis { … }; int adis_init(struct adis *adis, struct iio_dev *indio_dev, struct spi_device *spi, const struct adis_data *data); int __adis_reset(struct adis *adis); /** * adis_reset() - Reset the device * @adis: The adis device * * Returns 0 on success, a negative error code otherwise */ static inline int adis_reset(struct adis *adis) { … } int __adis_write_reg(struct adis *adis, unsigned int reg, unsigned int val, unsigned int size); int __adis_read_reg(struct adis *adis, unsigned int reg, unsigned int *val, unsigned int size); /** * __adis_write_reg_8() - Write single byte to a register (unlocked) * @adis: The adis device * @reg: The address of the register to be written * @value: The value to write */ static inline int __adis_write_reg_8(struct adis *adis, unsigned int reg, u8 val) { … } /** * __adis_write_reg_16() - Write 2 bytes to a pair of registers (unlocked) * @adis: The adis device * @reg: The address of the lower of the two registers * @value: Value to be written */ static inline int __adis_write_reg_16(struct adis *adis, unsigned int reg, u16 val) { … } /** * __adis_write_reg_32() - write 4 bytes to four registers (unlocked) * @adis: The adis device * @reg: The address of the lower of the four register * @value: Value to be written */ static inline int __adis_write_reg_32(struct adis *adis, unsigned int reg, u32 val) { … } /** * __adis_read_reg_16() - read 2 bytes from a 16-bit register (unlocked) * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int __adis_read_reg_16(struct adis *adis, unsigned int reg, u16 *val) { … } /** * __adis_read_reg_32() - read 4 bytes from a 32-bit register (unlocked) * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int __adis_read_reg_32(struct adis *adis, unsigned int reg, u32 *val) { … } /** * adis_write_reg() - write N bytes to register * @adis: The adis device * @reg: The address of the lower of the two registers * @value: The value to write to device (up to 4 bytes) * @size: The size of the @value (in bytes) */ static inline int adis_write_reg(struct adis *adis, unsigned int reg, unsigned int val, unsigned int size) { … } /** * adis_read_reg() - read N bytes from register * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device * @size: The size of the @val buffer */ static int adis_read_reg(struct adis *adis, unsigned int reg, unsigned int *val, unsigned int size) { … } /** * adis_write_reg_8() - Write single byte to a register * @adis: The adis device * @reg: The address of the register to be written * @value: The value to write */ static inline int adis_write_reg_8(struct adis *adis, unsigned int reg, u8 val) { … } /** * adis_write_reg_16() - Write 2 bytes to a pair of registers * @adis: The adis device * @reg: The address of the lower of the two registers * @value: Value to be written */ static inline int adis_write_reg_16(struct adis *adis, unsigned int reg, u16 val) { … } /** * adis_write_reg_32() - write 4 bytes to four registers * @adis: The adis device * @reg: The address of the lower of the four register * @value: Value to be written */ static inline int adis_write_reg_32(struct adis *adis, unsigned int reg, u32 val) { … } /** * adis_read_reg_16() - read 2 bytes from a 16-bit register * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int adis_read_reg_16(struct adis *adis, unsigned int reg, u16 *val) { … } /** * adis_read_reg_32() - read 4 bytes from a 32-bit register * @adis: The adis device * @reg: The address of the lower of the two registers * @val: The value read back from the device */ static inline int adis_read_reg_32(struct adis *adis, unsigned int reg, u32 *val) { … } int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask, const u32 val, u8 size); /** * adis_update_bits_base() - ADIS Update bits function - Locked version * @adis: The adis device * @reg: The address of the lower of the two registers * @mask: Bitmask to change * @val: Value to be written * @size: Size of the register to update * * Updates the desired bits of @reg in accordance with @mask and @val. */ static inline int adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask, const u32 val, u8 size) { … } /** * adis_update_bits() - Wrapper macro for adis_update_bits_base - Locked version * @adis: The adis device * @reg: The address of the lower of the two registers * @mask: Bitmask to change * @val: Value to be written * * This macro evaluates the sizeof of @val at compile time and calls * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for * @val can lead to undesired behavior if the register to update is 16bit. */ #define adis_update_bits(adis, reg, mask, val) … /** * adis_update_bits() - Wrapper macro for adis_update_bits_base * @adis: The adis device * @reg: The address of the lower of the two registers * @mask: Bitmask to change * @val: Value to be written * * This macro evaluates the sizeof of @val at compile time and calls * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for * @val can lead to undesired behavior if the register to update is 16bit. */ #define __adis_update_bits(adis, reg, mask, val) … int __adis_check_status(struct adis *adis); int __adis_initial_startup(struct adis *adis); int __adis_enable_irq(struct adis *adis, bool enable); static inline int adis_enable_irq(struct adis *adis, bool enable) { … } static inline int adis_check_status(struct adis *adis) { … } #define adis_dev_auto_lock(adis) … #define adis_dev_auto_scoped_lock(adis) … int adis_single_conversion(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, unsigned int error_mask, int *val); #define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) … #define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) … #define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) … #define ADIS_TEMP_CHAN(addr, si, info_all, bits) … #define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) … #define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) … #define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) … #define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) … #define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) … #define devm_adis_setup_buffer_and_trigger(adis, indio_dev, trigger_handler) … #ifdef CONFIG_IIO_ADIS_LIB_BUFFER int devm_adis_setup_buffer_and_trigger_with_attrs(struct adis *adis, struct iio_dev *indio_dev, irq_handler_t trigger_handler, const struct iio_buffer_setup_ops *ops, const struct iio_dev_attr **buffer_attrs); int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev); int adis_update_scan_mode(struct iio_dev *indio_dev, const unsigned long *scan_mask); #else /* CONFIG_IIO_BUFFER */ static inline int devm_adis_setup_buffer_and_trigger_with_attrs(struct adis *adis, struct iio_dev *indio_dev, irq_handler_t trigger_handler, const struct iio_buffer_setup_ops *ops, const struct iio_dev_attr **buffer_attrs) { return 0; } static inline int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev) { return 0; } #define adis_update_scan_mode … #endif /* CONFIG_IIO_BUFFER */ #ifdef CONFIG_DEBUG_FS int adis_debugfs_reg_access(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, unsigned int *readval); #else #define adis_debugfs_reg_access … #endif #endif
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