/****************************************************************************** * arch-x86_32.h * * Guest OS interface to x86 Xen. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to * deal in the Software without restriction, including without limitation the * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Copyright (c) 2004-2006, K A Fraser */ #ifndef _ASM_X86_XEN_INTERFACE_H #define _ASM_X86_XEN_INTERFACE_H /* * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field * in a struct in memory. * XEN_GUEST_HANDLE_PARAM represent a guest pointer, when passed as an * hypercall argument. * XEN_GUEST_HANDLE_PARAM and XEN_GUEST_HANDLE are the same on X86 but * they might not be on other architectures. */ #ifdef __XEN__ #define __DEFINE_GUEST_HANDLE … #else #define __DEFINE_GUEST_HANDLE(name, type) … #endif #define DEFINE_GUEST_HANDLE_STRUCT(name) … #define DEFINE_GUEST_HANDLE(name) … #define GUEST_HANDLE(name) … #ifdef __XEN__ #if defined(__i386__) #define set_xen_guest_handle … #elif defined(__x86_64__) #define set_xen_guest_handle … #endif #else #if defined(__i386__) #define set_xen_guest_handle … #elif defined(__x86_64__) #define set_xen_guest_handle(hnd, val) … #endif #endif #ifndef __ASSEMBLY__ /* Explicitly size integers that represent pfns in the public interface * with Xen so that on ARM we can have one ABI that works for 32 and 64 * bit guests. */ xen_pfn_t; #define PRI_xen_pfn … xen_ulong_t; #define PRI_xen_ulong … xen_long_t; #define PRI_xen_long … /* Guest handles for primitive C types. */ __DEFINE_GUEST_HANDLE(…); __DEFINE_GUEST_HANDLE(…); DEFINE_GUEST_HANDLE(…); DEFINE_GUEST_HANDLE(…); DEFINE_GUEST_HANDLE(…); DEFINE_GUEST_HANDLE(…); DEFINE_GUEST_HANDLE(…); DEFINE_GUEST_HANDLE(…); DEFINE_GUEST_HANDLE(…); #endif #ifndef HYPERVISOR_VIRT_START #define HYPERVISOR_VIRT_START … #endif #define MACH2PHYS_VIRT_START … #define MACH2PHYS_VIRT_END … #define MACH2PHYS_NR_ENTRIES … /* Maximum number of virtual CPUs in multi-processor guests. */ #define MAX_VIRT_CPUS … /* * SEGMENT DESCRIPTOR TABLES */ /* * A number of GDT entries are reserved by Xen. These are not situated at the * start of the GDT because some stupid OSes export hard-coded selector values * in their ABI. These hard-coded values are always near the start of the GDT, * so Xen places itself out of the way, at the far end of the GDT. * * NB The LDT is set using the MMUEXT_SET_LDT op of HYPERVISOR_mmuext_op */ #define FIRST_RESERVED_GDT_PAGE … #define FIRST_RESERVED_GDT_BYTE … #define FIRST_RESERVED_GDT_ENTRY … /* * Send an array of these to HYPERVISOR_set_trap_table(). * Terminate the array with a sentinel entry, with traps[].address==0. * The privilege level specifies which modes may enter a trap via a software * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate * privilege levels as follows: * Level == 0: No one may enter * Level == 1: Kernel may enter * Level == 2: Kernel may enter * Level == 3: Everyone may enter */ #define TI_GET_DPL(_ti) … #define TI_GET_IF(_ti) … #define TI_SET_DPL(_ti, _dpl) … #define TI_SET_IF(_ti, _if) … #ifndef __ASSEMBLY__ struct trap_info { … }; DEFINE_GUEST_HANDLE_STRUCT(…); struct arch_shared_info { … }; #endif /* !__ASSEMBLY__ */ #ifdef CONFIG_X86_32 #include <asm/xen/interface_32.h> #else #include <asm/xen/interface_64.h> #endif #include <asm/pvclock-abi.h> #ifndef __ASSEMBLY__ /* * The following is all CPU context. Note that the fpu_ctxt block is filled * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. * * Also note that when calling DOMCTL_setvcpucontext and VCPU_initialise * for HVM and PVH guests, not all information in this structure is updated: * * - For HVM guests, the structures read include: fpu_ctxt (if * VGCT_I387_VALID is set), flags, user_regs, debugreg[*] * * - PVH guests are the same as HVM guests, but additionally use ctrlreg[3] to * set cr3. All other fields not used should be set to 0. */ struct vcpu_guest_context { … }; DEFINE_GUEST_HANDLE_STRUCT(…); /* AMD PMU registers and structures */ struct xen_pmu_amd_ctxt { … }; /* Intel PMU registers and structures */ struct xen_pmu_cntr_pair { … }; struct xen_pmu_intel_ctxt { … }; /* Sampled domain's registers */ struct xen_pmu_regs { … }; /* PMU flags */ #define PMU_CACHED … #define PMU_SAMPLE_USER … #define PMU_SAMPLE_REAL … #define PMU_SAMPLE_PV … /* * Architecture-specific information describing state of the processor at * the time of PMU interrupt. * Fields of this structure marked as RW for guest should only be written by * the guest when PMU_CACHED bit in pmu_flags is set (which is done by the * hypervisor during PMU interrupt). Hypervisor will read updated data in * XENPMU_flush hypercall and clear PMU_CACHED bit. */ struct xen_pmu_arch { … }; #endif /* !__ASSEMBLY__ */ /* * Prefix forces emulation of some non-trapping instructions. * Currently only CPUID. */ #include <asm/emulate_prefix.h> #define XEN_EMULATE_PREFIX … #define XEN_CPUID … #endif /* _ASM_X86_XEN_INTERFACE_H */
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