// SPDX-License-Identifier: GPL-2.0 /* * AD9832 SPI DDS driver * * Copyright 2011 Analog Devices Inc. */ #include <asm/div64.h> #include <linux/clk.h> #include <linux/device.h> #include <linux/err.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/regulator/consumer.h> #include <linux/slab.h> #include <linux/spi/spi.h> #include <linux/sysfs.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> #include "ad9832.h" #include "dds.h" /* Registers */ #define AD9832_FREQ0LL … #define AD9832_FREQ0HL … #define AD9832_FREQ0LM … #define AD9832_FREQ0HM … #define AD9832_FREQ1LL … #define AD9832_FREQ1HL … #define AD9832_FREQ1LM … #define AD9832_FREQ1HM … #define AD9832_PHASE0L … #define AD9832_PHASE0H … #define AD9832_PHASE1L … #define AD9832_PHASE1H … #define AD9832_PHASE2L … #define AD9832_PHASE2H … #define AD9832_PHASE3L … #define AD9832_PHASE3H … #define AD9832_PHASE_SYM … #define AD9832_FREQ_SYM … #define AD9832_PINCTRL_EN … #define AD9832_OUTPUT_EN … /* Command Control Bits */ #define AD9832_CMD_PHA8BITSW … #define AD9832_CMD_PHA16BITSW … #define AD9832_CMD_FRE8BITSW … #define AD9832_CMD_FRE16BITSW … #define AD9832_CMD_FPSELECT … #define AD9832_CMD_SYNCSELSRC … #define AD9832_CMD_SLEEPRESCLR … #define AD9832_FREQ … #define AD9832_PHASE(x) … #define AD9832_SYNC … #define AD9832_SELSRC … #define AD9832_SLEEP … #define AD9832_RESET … #define AD9832_CLR … #define CMD_SHIFT … #define ADD_SHIFT … #define AD9832_FREQ_BITS … #define AD9832_PHASE_BITS … #define RES_MASK(bits) … /** * struct ad9832_state - driver instance specific data * @spi: spi_device * @avdd: supply regulator for the analog section * @dvdd: supply regulator for the digital section * @mclk: external master clock * @ctrl_fp: cached frequency/phase control word * @ctrl_ss: cached sync/selsrc control word * @ctrl_src: cached sleep/reset/clr word * @xfer: default spi transfer * @msg: default spi message * @freq_xfer: tuning word spi transfer * @freq_msg: tuning word spi message * @phase_xfer: tuning word spi transfer * @phase_msg: tuning word spi message * @lock: protect sensor state * @data: spi transmit buffer * @phase_data: tuning word spi transmit buffer * @freq_data: tuning word spi transmit buffer */ struct ad9832_state { … }; static unsigned long ad9832_calc_freqreg(unsigned long mclk, unsigned long fout) { … } static int ad9832_write_frequency(struct ad9832_state *st, unsigned int addr, unsigned long fout) { … } static int ad9832_write_phase(struct ad9832_state *st, unsigned long addr, unsigned long phase) { … } static ssize_t ad9832_write(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { … } /* * see dds.h for further information */ static IIO_DEV_ATTR_FREQ(0, 0, 0200, NULL, ad9832_write, AD9832_FREQ0HM); static IIO_DEV_ATTR_FREQ(0, 1, 0200, NULL, ad9832_write, AD9832_FREQ1HM); static IIO_DEV_ATTR_FREQSYMBOL(0, 0200, NULL, ad9832_write, AD9832_FREQ_SYM); static IIO_CONST_ATTR_FREQ_SCALE(0, "1"); /* 1Hz */ static IIO_DEV_ATTR_PHASE(0, 0, 0200, NULL, ad9832_write, AD9832_PHASE0H); static IIO_DEV_ATTR_PHASE(0, 1, 0200, NULL, ad9832_write, AD9832_PHASE1H); static IIO_DEV_ATTR_PHASE(0, 2, 0200, NULL, ad9832_write, AD9832_PHASE2H); static IIO_DEV_ATTR_PHASE(0, 3, 0200, NULL, ad9832_write, AD9832_PHASE3H); static IIO_DEV_ATTR_PHASESYMBOL(0, 0200, NULL, ad9832_write, AD9832_PHASE_SYM); static IIO_CONST_ATTR_PHASE_SCALE(0, "0.0015339808"); /* 2PI/2^12 rad*/ static IIO_DEV_ATTR_PINCONTROL_EN(0, 0200, NULL, ad9832_write, AD9832_PINCTRL_EN); static IIO_DEV_ATTR_OUT_ENABLE(0, 0200, NULL, ad9832_write, AD9832_OUTPUT_EN); static struct attribute *ad9832_attributes[] = …; static const struct attribute_group ad9832_attribute_group = …; static const struct iio_info ad9832_info = …; static void ad9832_reg_disable(void *reg) { … } static int ad9832_probe(struct spi_device *spi) { … } static const struct spi_device_id ad9832_id[] = …; MODULE_DEVICE_TABLE(spi, ad9832_id); static struct spi_driver ad9832_driver = …; module_spi_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux