linux/drivers/staging/rtl8723bs/include/hal_com.h

/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
 *
 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
 *
 ******************************************************************************/
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__

#include "HalVerDef.h"
#include "hal_pg.h"
#include "hal_phy.h"
#include "hal_phy_reg.h"
#include "hal_com_reg.h"
#include "hal_com_phycfg.h"

/*------------------------------ Tx Desc definition Macro ------------------------*/
/* pragma mark -- Tx Desc related definition. -- */
/*  */
/*  */
/* 	Rate */
/*  */
/*  CCK Rates, TxHT = 0 */
#define DESC_RATE1M
#define DESC_RATE2M
#define DESC_RATE5_5M
#define DESC_RATE11M

/*  OFDM Rates, TxHT = 0 */
#define DESC_RATE6M
#define DESC_RATE9M
#define DESC_RATE12M
#define DESC_RATE18M
#define DESC_RATE24M
#define DESC_RATE36M
#define DESC_RATE48M
#define DESC_RATE54M

/*  MCS Rates, TxHT = 1 */
#define DESC_RATEMCS0
#define DESC_RATEMCS1
#define DESC_RATEMCS2
#define DESC_RATEMCS3
#define DESC_RATEMCS4
#define DESC_RATEMCS5
#define DESC_RATEMCS6
#define DESC_RATEMCS7

#define HDATA_RATE(rate)

enum{};
enum rt_media_status {};

#define MAX_DLFW_PAGE_SIZE

/*  BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. */
/* define MAX_TX_QUEUE		9 */

#define TX_SELE_HQ
#define TX_SELE_LQ
#define TX_SELE_NQ
#define TX_SELE_EQ

#define PageNum_128(_Len)

u8 rtw_hal_data_init(struct adapter *padapter);
void rtw_hal_data_deinit(struct adapter *padapter);

void dump_chip_info(struct hal_version	ChipVersion);

u8 /* return the final channel plan decision */
hal_com_config_channel_plan(
struct adapter *padapter,
u8 	hw_channel_plan,	/* channel plan from HW (efuse/eeprom) */
u8 	sw_channel_plan,	/* channel plan from SW (registry/module param) */
u8 	def_channel_plan,	/* channel plan used when the former two is invalid */
bool		AutoLoadFail
	);

bool
HAL_IsLegalChannel(
struct adapter *Adapter,
u32 		Channel
	);

u8 MRateToHwRate(u8 rate);

u8 HwRateToMRate(u8 rate);

void HalSetBrateCfg(
	struct adapter *Adapter,
	u8 *mBratesOS,
	u16	*pBrateCfg);

bool
Hal_MappingOutPipe(
struct adapter *padapter,
u8 NumOutPipe
	);

void hal_init_macaddr(struct adapter *adapter);

void rtw_init_hal_com_default_value(struct adapter *Adapter);

void c2h_evt_clear(struct adapter *adapter);
s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf);

u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type);
void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta);

void hw_var_port_switch(struct adapter *adapter);

void SetHwReg(struct adapter *padapter, u8 variable, u8 *val);
void GetHwReg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_check_rxfifo_full(struct adapter *adapter);

u8 SetHalDefVar(struct adapter *adapter, enum hal_def_variable variable,
		void *value);
u8 GetHalDefVar(struct adapter *adapter, enum hal_def_variable variable,
		void *value);

bool eqNByte(u8 *str1, u8 *str2, u32 num);

bool GetU1ByteIntegerFromStringInDecimal(char *str, u8 *in);

#ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
void rtw_store_phy_info(struct adapter *padapter, union recv_frame *prframe);
void rtw_dump_raw_rssi_info(struct adapter *padapter);
#endif

#define HWSET_MAX_SIZE

void rtw_bb_rf_gain_offset(struct adapter *padapter);

void GetHalODMVar(struct adapter *Adapter,
	enum hal_odm_variable		eVariable,
	void *pValue1,
	void *pValue2);
void SetHalODMVar(
	struct adapter *Adapter,
	enum hal_odm_variable		eVariable,
	void *pValue1,
	bool					bSet);
#endif /* __HAL_COMMON_H__ */