/* SPDX-License-Identifier: GPL-2.0 */ /****************************************************************************** * * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. * ******************************************************************************/ #ifndef __HALDMOUTSRC_H__ #define __HALDMOUTSRC_H__ #include "odm_EdcaTurboCheck.h" #include "odm_DIG.h" #include "odm_DynamicBBPowerSaving.h" #include "odm_DynamicTxPower.h" #include "odm_CfoTracking.h" #define TP_MODE … #define RSSI_MODE … #define TRAFFIC_LOW … #define TRAFFIC_HIGH … #define NONE … /* 3 Tx Power Tracking */ /* 3 ============================================================ */ #define DPK_DELTA_MAPPING_NUM … #define index_mapping_HP_NUM … #define OFDM_TABLE_SIZE … #define CCK_TABLE_SIZE … #define TXSCALE_TABLE_SIZE … #define TXPWR_TRACK_TABLE_SIZE … #define DELTA_SWINGIDX_SIZE … #define BAND_NUM … /* 3 PSD Handler */ /* 3 ============================================================ */ #define AFH_PSD … #define MODE_40M … #define PSD_TH2 … #define PSD_CHMIN … #define SIR_STEP_SIZE … #define Smooth_Size_1 … #define Smooth_TH_1 … #define Smooth_Size_2 … #define Smooth_TH_2 … #define Smooth_Size_3 … #define Smooth_TH_3 … #define Smooth_Step_Size … #define Adaptive_SIR … #define PSD_RESCAN … #define PSD_SCAN_INTERVAL … /* 8723A High Power IGI Setting */ #define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND … #define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND … #define DM_DIG_HIGH_PWR_THRESHOLD … #define DM_DIG_LOW_PWR_THRESHOLD … /* ANT Test */ #define ANTTESTALL … #define ANTTESTA … #define ANTTESTB … #define PS_MODE_ACTIVE … /* for 8723A Ant Definition--2012--06--07 due to different IC may be different ANT define */ #define MAIN_ANT … #define AUX_ANT … #define MAX_ANT … /* Antenna Diversity Type */ #define SW_ANTDIV … #define HW_ANTDIV … /* structure and define */ /* Remove DIG by Yuchen */ /* Remove BB power saving by Yuchn */ /* Remove DIG by yuchen */ struct dynamic_primary_CCA { … }; struct ra_t { … }; struct rxhp_t { … }; #define ASSOCIATE_ENTRY_NUM … #define ODM_ASSOCIATE_ENTRY_NUM … /* This indicates two different the steps. */ /* In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. */ /* In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK */ /* with original RSSI to determine if it is necessary to switch antenna. */ #define SWAW_STEP_PEAK … #define SWAW_STEP_DETERMINE … #define TP_MODE … #define RSSI_MODE … #define TRAFFIC_LOW … #define TRAFFIC_HIGH … #define TRAFFIC_UltraLOW … struct swat_t { … }; /* Remove Edca by YuChen */ struct odm_rate_adaptive { … }; #define IQK_MAC_REG_NUM … #define IQK_ADDA_REG_NUM … #define IQK_BB_REG_NUM_MAX … #define IQK_BB_REG_NUM … #define HP_THERMAL_NUM … #define AVG_THERMAL_NUM … #define IQK_MATRIX_REG_NUM … #define IQK_MATRIX_SETTINGS_NUM … #define DM_Type_ByFW … #define DM_Type_ByDriver … /* */ /* Declare for common info */ /* */ #define MAX_PATH_NUM_92CS … #define MAX_PATH_NUM_8188E … #define MAX_PATH_NUM_8192E … #define MAX_PATH_NUM_8723B … #define MAX_PATH_NUM_8812A … #define MAX_PATH_NUM_8821A … #define MAX_PATH_NUM_8814A … #define MAX_PATH_NUM_8822B … #define IQK_THRESHOLD … #define DPK_THRESHOLD … struct odm_phy_info { … }; struct odm_packet_info { … }; struct odm_phy_dbg_info { … }; struct odm_mac_status_info { … }; /* */ /* 2011/10/20 MH Define Common info enum for all team. */ /* */ enum odm_cmninfo_e { … }; /* 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY */ enum { … }; /* ODM_CMNINFO_INTERFACE */ enum { … }; /* ODM_CMNINFO_IC_TYPE */ enum { … }; /* ODM_CMNINFO_CUT_VER */ enum { … }; /* ODM_CMNINFO_FAB_VER */ enum { … }; /* */ /* For example 1T2R (A+AB = BIT0|BIT4|BIT5) */ /* */ enum { … }; /* */ /* ODM Dynamic common info value definition */ /* */ /* ODM_CMNINFO_WM_MODE */ enum { … }; /* ODM_CMNINFO_BW */ enum { … }; /* For AC-series IC, external PA & LNA can be individually added on 2.4G */ enum odm_type_gpa_e { … }; enum odm_type_apa_e { … }; enum odm_type_glna_e { … }; enum odm_type_alna_e { … }; /* Remove PATHDIV_PARA struct to odm_PathDiv.h */ struct odm_rf_cal_t { … }; /* */ /* ODM Dynamic common info value definition */ /* */ struct fat_t { … }; enum { … }; struct pathdiv_t { … }; enum phy_reg_pg_type { … }; /* */ /* Antenna detection information from single tone mechanism, added by Roger, 2012.11.27. */ /* */ struct ant_detected_info { … }; /* */ /* 2011/09/22 MH Copy from SD4 defined structure. We use to support PHY DM integration. */ /* */ struct dm_odm_t { … }; enum odm_rf_content { … }; enum ODM_BB_Config_Type { … }; enum ODM_RF_Config_Type { … }; enum ODM_FW_Config_Type { … }; #ifdef REMOVE_PACK #pragma pack() #endif /* include "odm_function.h" */ /* 3 =========================================================== */ /* 3 DIG */ /* 3 =========================================================== */ /* Remove DIG by Yuchen */ /* 3 =========================================================== */ /* 3 AGC RX High Power Mode */ /* 3 =========================================================== */ #define LNA_Low_Gain_1 … #define LNA_Low_Gain_2 … #define LNA_Low_Gain_3 … #define FA_RXHP_TH1 … #define FA_RXHP_TH2 … #define FA_RXHP_TH3 … #define FA_RXHP_TH4 … #define FA_RXHP_TH5 … /* 3 =========================================================== */ /* 3 EDCA */ /* 3 =========================================================== */ /* 3 =========================================================== */ /* 3 Dynamic Tx Power */ /* 3 =========================================================== */ /* Dynamic Tx Power Control Threshold */ /* 3 =========================================================== */ /* 3 Rate Adaptive */ /* 3 =========================================================== */ #define DM_RATR_STA_INIT … #define DM_RATR_STA_HIGH … #define DM_RATR_STA_MIDDLE … #define DM_RATR_STA_LOW … /* 3 =========================================================== */ /* 3 BB Power Save */ /* 3 =========================================================== */ enum { … }; enum { … }; /* Maximal number of antenna detection mechanism needs to perform, added by Roger, 2011.12.28. */ #define MAX_ANTENNA_DETECTION_CNT … /* */ /* Extern Global Variables. */ /* */ extern u32 OFDMSwingTable[OFDM_TABLE_SIZE]; extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; extern u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8]; extern u32 OFDMSwingTable_New[OFDM_TABLE_SIZE]; extern u8 CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8]; extern u8 CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]; extern u32 TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE]; /* */ /* check Sta pointer valid or not */ /* */ #define IS_STA_VALID(pSta) … /* 20100514 Joseph: Add definition for antenna switching test after link. */ /* This indicates two different the steps. */ /* In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. */ /* In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK */ /* with original RSSI to determine if it is necessary to switch antenna. */ #define SWAW_STEP_PEAK … #define SWAW_STEP_DETERMINE … /* Remove BB power saving by Yuchen */ #define dm_CheckTXPowerTracking … void ODM_TXPowerTrackingCheck(struct dm_odm_t *pDM_Odm); bool ODM_RAStateCheck( struct dm_odm_t *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState ); #define dm_SWAW_RSSI_Check … void ODM_SwAntDivChkPerPktRssi( struct dm_odm_t *pDM_Odm, u8 StationID, struct odm_phy_info *pPhyInfo ); u32 ODM_Get_Rate_Bitmap( struct dm_odm_t *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level ); #if (BEAMFORMING_SUPPORT == 1) BEAMFORMING_CAP Beamforming_GetEntryBeamCapByMacId(PMGNT_INFO pMgntInfo, u8 MacId); #endif void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm); void ODM_DMInit(struct dm_odm_t *pDM_Odm); void ODM_DMWatchdog(struct dm_odm_t *pDM_Odm); /* For common use in the future */ void ODM_CmnInfoInit(struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, u32 Value); void ODM_CmnInfoHook(struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, void *pValue); void ODM_CmnInfoPtrArrayHook( struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, u16 Index, void *pValue ); void ODM_CmnInfoUpdate(struct dm_odm_t *pDM_Odm, u32 CmnInfo, u64 Value); void ODM_InitAllTimers(struct dm_odm_t *pDM_Odm); void ODM_CancelAllTimers(struct dm_odm_t *pDM_Odm); void ODM_ReleaseAllTimers(struct dm_odm_t *pDM_Odm); void ODM_AntselStatistics_88C( struct dm_odm_t *pDM_Odm, u8 MacId, u32 PWDBAll, bool isCCKrate ); void ODM_DynamicARFBSelect(struct dm_odm_t *pDM_Odm, u8 rate, bool Collision_State); #endif
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