/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc. * All rights reserved. * * Purpose: MAC routines * * Author: Tevin Chen * * Date: May 21, 1996 * * Revision History: * 07-01-2003 Bryan YC Fan: Re-write codes to support VT3253 spec. * 08-25-2003 Kyle Hsu: Porting MAC functions from sim53. * 09-03-2003 Bryan YC Fan: Add MACvDisableProtectMD & MACvEnableProtectMD */ #ifndef __MAC_H__ #define __MAC_H__ #include <linux/bits.h> #include "device.h" #define REV_ID_VT3253_A0 … #define REV_ID_VT3253_A1 … #define REV_ID_VT3253_B0 … #define REV_ID_VT3253_B1 … /* Registers in the MAC */ #define MAC_REG_BISTCMD … #define MAC_REG_BISTSR0 … #define MAC_REG_BISTSR1 … #define MAC_REG_BISTSR2 … #define MAC_REG_I2MCSR … #define MAC_REG_I2MTGID … #define MAC_REG_I2MTGAD … #define MAC_REG_I2MCFG … #define MAC_REG_I2MDIPT … #define MAC_REG_I2MDOPT … #define MAC_REG_USBSUS … #define MAC_REG_LOCALID … #define MAC_REG_TESTCFG … #define MAC_REG_JUMPER0 … #define MAC_REG_JUMPER1 … #define MAC_REG_TMCTL … #define MAC_REG_TMDATA0 … #define MAC_REG_TMDATA1 … #define MAC_REG_TMDATA2 … #define MAC_REG_TMDATA3 … /* MAC Parameter related */ #define MAC_REG_LRT … #define MAC_REG_SRT … #define MAC_REG_SIFS … #define MAC_REG_DIFS … #define MAC_REG_EIFS … #define MAC_REG_SLOT … #define MAC_REG_BI … #define MAC_REG_CWMAXMIN0 … #define MAC_REG_LINKOFFTOTM … #define MAC_REG_SWTMOT … #define MAC_REG_RTSOKCNT … #define MAC_REG_RTSFAILCNT … #define MAC_REG_ACKFAILCNT … #define MAC_REG_FCSERRCNT … /* TSF Related */ #define MAC_REG_TSFCNTR … #define MAC_REG_NEXTTBTT … #define MAC_REG_TSFOFST … #define MAC_REG_TFTCTL … /* WMAC Control/Status Related */ #define MAC_REG_ENCFG0 … #define MAC_REG_ENCFG1 … #define MAC_REG_ENCFG2 … #define MAC_REG_CFG … #define MAC_REG_TEST … #define MAC_REG_HOSTCR … #define MAC_REG_MACCR … #define MAC_REG_RCR … #define MAC_REG_TCR … #define MAC_REG_IMR … #define MAC_REG_ISR … #define MAC_REG_ISR1 … /* Power Saving Related */ #define MAC_REG_PSCFG … #define MAC_REG_PSCTL … #define MAC_REG_PSPWRSIG … #define MAC_REG_BBCR13 … #define MAC_REG_AIDATIM … #define MAC_REG_PWBT … #define MAC_REG_WAKEOKTMR … #define MAC_REG_CALTMR … #define MAC_REG_SYNSPACCNT … #define MAC_REG_WAKSYNOPT … /* Baseband/IF Control Group */ #define MAC_REG_BBREGCTL … #define MAC_REG_CHANNEL … #define MAC_REG_BBREGADR … #define MAC_REG_BBREGDATA … #define MAC_REG_IFREGCTL … #define MAC_REG_IFDATA … #define MAC_REG_ITRTMSET … #define MAC_REG_PAPEDELAY … #define MAC_REG_SOFTPWRCTL … #define MAC_REG_SOFTPWRCTL2 … #define MAC_REG_GPIOCTL0 … #define MAC_REG_GPIOCTL1 … /* MiscFF PIO related */ #define MAC_REG_MISCFFNDEX … #define MAC_REG_MISCFFCTL … #define MAC_REG_MISCFFDATA … /* MAC Configuration Group */ #define MAC_REG_PAR0 … #define MAC_REG_PAR4 … #define MAC_REG_BSSID0 … #define MAC_REG_BSSID4 … #define MAC_REG_MAR0 … #define MAC_REG_MAR4 … /* MAC RSPPKT INFO Group */ #define MAC_REG_RSPINF_B_1 … #define MAC_REG_RSPINF_B_2 … #define MAC_REG_RSPINF_B_5 … #define MAC_REG_RSPINF_B_11 … #define MAC_REG_RSPINF_A_6 … #define MAC_REG_RSPINF_A_9 … #define MAC_REG_RSPINF_A_12 … #define MAC_REG_RSPINF_A_18 … #define MAC_REG_RSPINF_A_24 … #define MAC_REG_RSPINF_A_36 … #define MAC_REG_RSPINF_A_48 … #define MAC_REG_RSPINF_A_54 … #define MAC_REG_RSPINF_A_72 … /* Bits in the I2MCFG EEPROM register */ #define I2MCFG_BOUNDCTL … #define I2MCFG_WAITCTL … #define I2MCFG_SCLOECTL … #define I2MCFG_WBUSYCTL … #define I2MCFG_NORETRY … #define I2MCFG_I2MLDSEQ … #define I2MCFG_I2CMFAST … /* Bits in the I2MCSR EEPROM register */ #define I2MCSR_EEMW … #define I2MCSR_EEMR … #define I2MCSR_AUTOLD … #define I2MCSR_NACK … #define I2MCSR_DONE … /* Bits in the TMCTL register */ #define TMCTL_TSUSP … #define TMCTL_TMD … #define TMCTL_TE … /* Bits in the TFTCTL register */ #define TFTCTL_HWUTSF … #define TFTCTL_TBTTSYNC … #define TFTCTL_HWUTSFEN … #define TFTCTL_TSFCNTRRD … #define TFTCTL_TBTTSYNCEN … #define TFTCTL_TSFSYNCEN … #define TFTCTL_TSFCNTRST … #define TFTCTL_TSFCNTREN … /* Bits in the EnhanceCFG_0 register */ #define EN_CFG_BB_TYPE_A … #define EN_CFG_BB_TYPE_B … #define EN_CFG_BB_TYPE_G … #define EN_CFG_BB_TYPE_MASK … #define EN_CFG_PROTECT_MD … /* Bits in the EnhanceCFG_1 register */ #define EN_CFG_BCN_SUS_IND … #define EN_CFG_BCN_SUS_CLR … /* Bits in the EnhanceCFG_2 register */ #define EN_CFG_NXTBTTCFPSTR … #define EN_CFG_BARKER_PREAM … #define EN_CFG_PKT_BURST_MD … /* Bits in the CFG register */ #define CFG_TKIPOPT … #define CFG_RXDMAOPT … #define CFG_TMOT_SW … #define CFG_TMOT_HWLONG … #define CFG_TMOT_HW … #define CFG_CFPENDOPT … #define CFG_BCNSUSEN … #define CFG_NOTXTIMEOUT … #define CFG_NOBUFOPT … /* Bits in the TEST register */ #define TEST_LBEXT … #define TEST_LBINT … #define TEST_LBNONE … #define TEST_SOFTINT … #define TEST_CONTTX … #define TEST_TXPE … #define TEST_NAVDIS … #define TEST_NOCTS … #define TEST_NOACK … /* Bits in the HOSTCR register */ #define HOSTCR_TXONST … #define HOSTCR_RXONST … #define HOSTCR_ADHOC … #define HOSTCR_AP … #define HOSTCR_TXON … #define HOSTCR_RXON … #define HOSTCR_MACEN … #define HOSTCR_SOFTRST … /* Bits in the MACCR register */ #define MACCR_SYNCFLUSHOK … #define MACCR_SYNCFLUSH … #define MACCR_CLRNAV … /* Bits in the RCR register */ #define RCR_SSID … #define RCR_RXALLTYPE … #define RCR_UNICAST … #define RCR_BROADCAST … #define RCR_MULTICAST … #define RCR_WPAERR … #define RCR_ERRCRC … #define RCR_BSSID … /* Bits in the TCR register */ #define TCR_SYNCDCFOPT … #define TCR_AUTOBCNTX … /* ISR1 */ #define ISR_GPIO3 … #define ISR_RXNOBUF … #define ISR_MIBNEARFULL … #define ISR_SOFTINT … #define ISR_FETALERR … #define LEDSTS_STS … #define LEDSTS_TMLEN … #define LEDSTS_OFF … #define LEDSTS_ON … #define LEDSTS_SLOW … #define LEDSTS_INTER … /* ISR0 */ #define ISR_WATCHDOG … #define ISR_SOFTTIMER … #define ISR_GPIO0 … #define ISR_TBTT … #define ISR_RXDMA0 … #define ISR_BNTX … #define ISR_ACTX … /* Bits in the PSCFG register */ #define PSCFG_PHILIPMD … #define PSCFG_WAKECALEN … #define PSCFG_WAKETMREN … #define PSCFG_BBPSPROG … #define PSCFG_WAKESYN … #define PSCFG_SLEEPSYN … #define PSCFG_AUTOSLEEP … /* Bits in the PSCTL register */ #define PSCTL_WAKEDONE … #define PSCTL_PS … #define PSCTL_GO2DOZE … #define PSCTL_LNBCN … #define PSCTL_ALBCN … #define PSCTL_PSEN … /* Bits in the PSPWSIG register */ #define PSSIG_WPE3 … #define PSSIG_WPE2 … #define PSSIG_WPE1 … #define PSSIG_WRADIOPE … #define PSSIG_SPE3 … #define PSSIG_SPE2 … #define PSSIG_SPE1 … #define PSSIG_SRADIOPE … /* Bits in the BBREGCTL register */ #define BBREGCTL_DONE … #define BBREGCTL_REGR … #define BBREGCTL_REGW … /* Bits in the IFREGCTL register */ #define IFREGCTL_DONE … #define IFREGCTL_IFRF … #define IFREGCTL_REGW … /* Bits in the SOFTPWRCTL register */ #define SOFTPWRCTL_RFLEOPT … #define SOFTPWRCTL_TXPEINV … #define SOFTPWRCTL_SWPECTI … #define SOFTPWRCTL_SWPAPE … #define SOFTPWRCTL_SWCALEN … #define SOFTPWRCTL_SWRADIO_PE … #define SOFTPWRCTL_SWPE2 … #define SOFTPWRCTL_SWPE1 … #define SOFTPWRCTL_SWPE3 … /* Bits in the GPIOCTL1 register */ #define GPIO3_MD … #define GPIO3_DATA … #define GPIO3_INTMD … /* Bits in the MISCFFCTL register */ #define MISCFFCTL_WRITE … /* Loopback mode */ #define MAC_LB_EXT … #define MAC_LB_INTERNAL … #define MAC_LB_NONE … /* Ethernet address filter type */ #define PKT_TYPE_NONE … #define PKT_TYPE_ALL_MULTICAST … #define PKT_TYPE_PROMISCUOUS … #define PKT_TYPE_DIRECTED … #define PKT_TYPE_BROADCAST … #define PKT_TYPE_MULTICAST … #define PKT_TYPE_ERROR_WPA … #define PKT_TYPE_ERROR_CRC … #define PKT_TYPE_BSSID … #define DEFAULT_BI … /* MiscFIFO Offset */ #define MISCFIFO_KEYETRY0 … #define MISCFIFO_KEYENTRYSIZE … #define MAC_REVISION_A0 … #define MAC_REVISION_A1 … struct vnt_mac_set_key { … } __packed; int vnt_mac_set_filter(struct vnt_private *priv, u64 mc_filter); int vnt_mac_shutdown(struct vnt_private *priv); int vnt_mac_set_bb_type(struct vnt_private *priv, u8 type); int vnt_mac_disable_keyentry(struct vnt_private *priv, u8 entry_idx); int vnt_mac_set_keyentry(struct vnt_private *priv, u16 key_ctl, u32 entry_idx, u32 key_idx, u8 *addr, u8 *key); int vnt_mac_reg_bits_off(struct vnt_private *priv, u8 reg_ofs, u8 bits); int vnt_mac_reg_bits_on(struct vnt_private *priv, u8 reg_ofs, u8 bits); int vnt_mac_write_word(struct vnt_private *priv, u8 reg_ofs, u16 word); int vnt_mac_set_bssid_addr(struct vnt_private *priv, u8 *addr); int vnt_mac_enable_protect_mode(struct vnt_private *priv); int vnt_mac_disable_protect_mode(struct vnt_private *priv); int vnt_mac_enable_barker_preamble_mode(struct vnt_private *priv); int vnt_mac_disable_barker_preamble_mode(struct vnt_private *priv); int vnt_mac_set_beacon_interval(struct vnt_private *priv, u16 interval); int vnt_mac_set_led(struct vnt_private *privpriv, u8 state, u8 led); #endif /* __MAC_H__ */
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