// SPDX-License-Identifier: GPL-2.0 /* * Intel Core SoC Power Management Controller Driver * * Copyright (c) 2016, Intel Corporation. * All Rights Reserved. * * Authors: Rajneesh Bhardwaj <[email protected]> * Vishwanath Somayaji <[email protected]> */ #define pr_fmt(fmt) … #include <linux/bitfield.h> #include <linux/debugfs.h> #include <linux/delay.h> #include <linux/dmi.h> #include <linux/io.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/slab.h> #include <linux/suspend.h> #include <linux/units.h> #include <asm/cpu_device_id.h> #include <asm/intel-family.h> #include <asm/msr.h> #include <asm/tsc.h> #include "core.h" #include "../pmt/telemetry.h" /* Maximum number of modes supported by platfoms that has low power mode capability */ const char *pmc_lpm_modes[] = …; /* PKGC MSRs are common across Intel Core SoCs */ const struct pmc_bit_map msr_map[] = …; static inline u32 pmc_core_reg_read(struct pmc *pmc, int reg_offset) { … } static inline void pmc_core_reg_write(struct pmc *pmc, int reg_offset, u32 val) { … } static inline u64 pmc_core_adjust_slp_s0_step(struct pmc *pmc, u32 value) { … } static int set_etr3(struct pmc_dev *pmcdev) { … } static umode_t etr3_is_visible(struct kobject *kobj, struct attribute *attr, int idx) { … } static ssize_t etr3_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t etr3_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t len) { … } static DEVICE_ATTR_RW(etr3); static struct attribute *pmc_attrs[] = …; static const struct attribute_group pmc_attr_group = …; static const struct attribute_group *pmc_dev_groups[] = …; static int pmc_core_dev_state_get(void *data, u64 *val) { … } DEFINE_DEBUGFS_ATTRIBUTE(…); static int pmc_core_pson_residency_get(void *data, u64 *val) { … } DEFINE_DEBUGFS_ATTRIBUTE(…); static int pmc_core_check_read_lock_bit(struct pmc *pmc) { … } static void pmc_core_slps0_display(struct pmc *pmc, struct device *dev, struct seq_file *s) { … } static unsigned int pmc_core_lpm_get_arr_size(const struct pmc_bit_map **maps) { … } static void pmc_core_lpm_display(struct pmc *pmc, struct device *dev, struct seq_file *s, u32 offset, int pmc_index, const char *str, const struct pmc_bit_map **maps) { … } static bool slps0_dbg_latch; static inline u8 pmc_core_reg_read_byte(struct pmc *pmc, int offset) { … } static void pmc_core_display_map(struct seq_file *s, int index, int idx, int ip, int pmc_index, u8 pf_reg, const struct pmc_bit_map **pf_map) { … } static int pmc_core_ppfear_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); /* This function should return link status, 0 means ready */ static int pmc_core_mtpmc_link_status(struct pmc *pmc) { … } static int pmc_core_send_msg(struct pmc *pmc, u32 *addr_xram) { … } static int pmc_core_mphy_pg_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static int pmc_core_pll_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); int pmc_core_send_ltr_ignore(struct pmc_dev *pmcdev, u32 value, int ignore) { … } static ssize_t pmc_core_ltr_write(struct pmc_dev *pmcdev, const char __user *userbuf, size_t count, int ignore) { … } static ssize_t pmc_core_ltr_ignore_write(struct file *file, const char __user *userbuf, size_t count, loff_t *ppos) { … } static int pmc_core_ltr_ignore_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_STORE_ATTRIBUTE(…); static ssize_t pmc_core_ltr_restore_write(struct file *file, const char __user *userbuf, size_t count, loff_t *ppos) { … } static int pmc_core_ltr_restore_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_STORE_ATTRIBUTE(…); static void pmc_core_slps0_dbg_latch(struct pmc_dev *pmcdev, bool reset) { … } static int pmc_core_slps0_dbg_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static u32 convert_ltr_scale(u32 val) { … } static int pmc_core_ltr_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static int pmc_core_s0ix_blocker_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static inline u64 adjust_lpm_residency(struct pmc *pmc, u32 offset, const int lpm_adj_x2) { … } static int pmc_core_substate_res_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static int pmc_core_substate_sts_regs_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static int pmc_core_substate_l_sts_regs_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static void pmc_core_substate_req_header_show(struct seq_file *s, int pmc_index) { … } static int pmc_core_substate_req_regs_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static unsigned int pmc_core_get_crystal_freq(void) { … } static int pmc_core_die_c6_us_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static int pmc_core_lpm_latch_mode_show(struct seq_file *s, void *unused) { … } static ssize_t pmc_core_lpm_latch_mode_write(struct file *file, const char __user *userbuf, size_t count, loff_t *ppos) { … } DEFINE_PMC_CORE_ATTR_WRITE(…); static int pmc_core_pkgc_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static bool pmc_core_pri_verify(u32 lpm_pri, u8 *mode_order) { … } void pmc_core_get_low_power_modes(struct pmc_dev *pmcdev) { … } int get_primary_reg_base(struct pmc *pmc) { … } void pmc_core_punit_pmt_init(struct pmc_dev *pmcdev, u32 guid) { … } void pmc_core_set_device_d3(unsigned int device) { … } static bool pmc_core_is_pson_residency_enabled(struct pmc_dev *pmcdev) { … } static void pmc_core_dbgfs_unregister(struct pmc_dev *pmcdev) { … } static void pmc_core_dbgfs_register(struct pmc_dev *pmcdev) { … } static const struct x86_cpu_id intel_pmc_core_ids[] = …; MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_ids); static const struct pci_device_id pmc_pci_ids[] = …; /* * This quirk can be used on those platforms where * the platform BIOS enforces 24Mhz crystal to shutdown * before PMC can assert SLP_S0#. */ static bool xtal_ignore; static int quirk_xtal_ignore(const struct dmi_system_id *id) { … } static void pmc_core_xtal_ignore(struct pmc *pmc) { … } static const struct dmi_system_id pmc_core_dmi_table[] = …; static void pmc_core_do_dmi_quirks(struct pmc *pmc) { … } static void pmc_core_clean_structure(struct platform_device *pdev) { … } static int pmc_core_probe(struct platform_device *pdev) { … } static void pmc_core_remove(struct platform_device *pdev) { … } static bool warn_on_s0ix_failures; module_param(warn_on_s0ix_failures, bool, 0644); MODULE_PARM_DESC(…) …; static __maybe_unused int pmc_core_suspend(struct device *dev) { … } static inline bool pmc_core_is_deepest_pkgc_failed(struct pmc_dev *pmcdev) { … } static inline bool pmc_core_is_s0ix_failed(struct pmc_dev *pmcdev) { … } int pmc_core_resume_common(struct pmc_dev *pmcdev) { … } static __maybe_unused int pmc_core_resume(struct device *dev) { … } static const struct dev_pm_ops pmc_core_pm_ops = …; static const struct acpi_device_id pmc_core_acpi_ids[] = …; MODULE_DEVICE_TABLE(acpi, pmc_core_acpi_ids); static struct platform_driver pmc_core_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …;
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