linux/drivers/platform/x86/intel/pmc/mtl.c

// SPDX-License-Identifier: GPL-2.0
/*
 * This file contains platform specific structure definitions
 * and init function used by Meteor Lake PCH.
 *
 * Copyright (c) 2022, Intel Corporation.
 * All Rights Reserved.
 *
 */

#include <linux/pci.h>
#include "core.h"
#include "../pmt/telemetry.h"

/* PMC SSRAM PMT Telemetry GUIDS */
#define SOCP_LPM_REQ_GUID …
#define IOEM_LPM_REQ_GUID …
#define IOEP_LPM_REQ_GUID …

static const u8 MTL_LPM_REG_INDEX[] = …;

/*
 * Die Mapping to Product.
 * Product SOCDie IOEDie PCHDie
 * MTL-M   SOC-M  IOE-M  None
 * MTL-P   SOC-M  IOE-P  None
 * MTL-S   SOC-S  IOE-P  PCH-S
 */

const struct pmc_bit_map mtl_socm_pfear_map[] = …;

const struct pmc_bit_map *ext_mtl_socm_pfear_map[] = …;

const struct pmc_bit_map mtl_socm_ltr_show_map[] = …;

const struct pmc_bit_map mtl_socm_clocksource_status_map[] = …;

const struct pmc_bit_map mtl_socm_power_gating_status_0_map[] = …;

const struct pmc_bit_map mtl_socm_power_gating_status_1_map[] = …;

const struct pmc_bit_map mtl_socm_power_gating_status_2_map[] = …;

const struct pmc_bit_map mtl_socm_d3_status_0_map[] = …;

const struct pmc_bit_map mtl_socm_d3_status_1_map[] = …;

const struct pmc_bit_map mtl_socm_d3_status_2_map[] = …;

const struct pmc_bit_map mtl_socm_d3_status_3_map[] = …;

const struct pmc_bit_map mtl_socm_vnn_req_status_0_map[] = …;

const struct pmc_bit_map mtl_socm_vnn_req_status_1_map[] = …;

const struct pmc_bit_map mtl_socm_vnn_req_status_2_map[] = …;

const struct pmc_bit_map mtl_socm_vnn_req_status_3_map[] = …;

const struct pmc_bit_map mtl_socm_vnn_misc_status_map[] = …;

const struct pmc_bit_map mtl_socm_signal_status_map[] = …;

const struct pmc_bit_map *mtl_socm_lpm_maps[] = …;

const struct pmc_reg_map mtl_socm_reg_map = …;

const struct pmc_bit_map mtl_ioep_pfear_map[] = …;

const struct pmc_bit_map *ext_mtl_ioep_pfear_map[] = …;

const struct pmc_bit_map mtl_ioep_ltr_show_map[] = …;

const struct pmc_bit_map mtl_ioep_clocksource_status_map[] = …;

const struct pmc_bit_map mtl_ioep_power_gating_status_0_map[] = …;

const struct pmc_bit_map mtl_ioep_power_gating_status_1_map[] = …;

const struct pmc_bit_map mtl_ioep_power_gating_status_2_map[] = …;

const struct pmc_bit_map mtl_ioep_d3_status_0_map[] = …;

const struct pmc_bit_map mtl_ioep_d3_status_1_map[] = …;

const struct pmc_bit_map mtl_ioep_d3_status_2_map[] = …;

const struct pmc_bit_map mtl_ioep_d3_status_3_map[] = …;

const struct pmc_bit_map mtl_ioep_vnn_req_status_0_map[] = …;

const struct pmc_bit_map mtl_ioep_vnn_req_status_1_map[] = …;

const struct pmc_bit_map mtl_ioep_vnn_req_status_2_map[] = …;

const struct pmc_bit_map mtl_ioep_vnn_req_status_3_map[] = …;

const struct pmc_bit_map mtl_ioep_vnn_misc_status_map[] = …;

const struct pmc_bit_map *mtl_ioep_lpm_maps[] = …;

const struct pmc_reg_map mtl_ioep_reg_map = …;

const struct pmc_bit_map mtl_ioem_pfear_map[] = …;

const struct pmc_bit_map *ext_mtl_ioem_pfear_map[] = …;

const struct pmc_bit_map mtl_ioem_power_gating_status_1_map[] = …;

const struct pmc_bit_map *mtl_ioem_lpm_maps[] = …;

const struct pmc_reg_map mtl_ioem_reg_map = …;

#define PMC_DEVID_SOCM …
#define PMC_DEVID_IOEP …
#define PMC_DEVID_IOEM …
static struct pmc_info mtl_pmc_info_list[] = …;

#define MTL_GNA_PCI_DEV …
#define MTL_IPU_PCI_DEV …
#define MTL_VPU_PCI_DEV …
/*
 * Set power state of select devices that do not have drivers to D3
 * so that they do not block Package C entry.
 */
static void mtl_d3_fixup(void)
{ … }

static int mtl_resume(struct pmc_dev *pmcdev)
{ … }

int mtl_core_init(struct pmc_dev *pmcdev)
{ … }