// SPDX-License-Identifier: GPL-2.0 /* * Driver for the Intel SCU IPC mechanism * * (C) Copyright 2008-2010,2015 Intel Corporation * Author: Sreedhara DS ([email protected]) * * SCU running in ARC processor communicates with other entity running in IA * core through IPC mechanism which in turn messaging between IA core ad SCU. * SCU has two IPC mechanism IPC-1 and IPC-2. IPC-1 is used between IA32 and * SCU where IPC-2 is used between P-Unit and SCU. This driver delas with * IPC-1 Driver provides an API for power control unit registers (e.g. MSIC) * along with other APIs. */ #include <linux/delay.h> #include <linux/device.h> #include <linux/errno.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/module.h> #include <linux/slab.h> #include <asm/intel_scu_ipc.h> /* IPC defines the following message types */ #define IPCMSG_PCNTRL … /* Command id associated with message IPCMSG_PCNTRL */ #define IPC_CMD_PCNTRL_W … #define IPC_CMD_PCNTRL_R … #define IPC_CMD_PCNTRL_M … /* * IPC register summary * * IPC register blocks are memory mapped at fixed address of PCI BAR 0. * To read or write information to the SCU, driver writes to IPC-1 memory * mapped registers. The following is the IPC mechanism * * 1. IA core cDMI interface claims this transaction and converts it to a * Transaction Layer Packet (TLP) message which is sent across the cDMI. * * 2. South Complex cDMI block receives this message and writes it to * the IPC-1 register block, causing an interrupt to the SCU * * 3. SCU firmware decodes this interrupt and IPC message and the appropriate * message handler is called within firmware. */ #define IPC_WWBUF_SIZE … #define IPC_RWBUF_SIZE … #define IPC_IOC … struct intel_scu_ipc_dev { … }; #define IPC_STATUS … #define IPC_STATUS_IRQ … #define IPC_STATUS_ERR … #define IPC_STATUS_BUSY … /* * IPC Write/Read Buffers: * 16 byte buffer for sending and receiving data to and from SCU. */ #define IPC_WRITE_BUFFER … #define IPC_READ_BUFFER … /* Timeout in jiffies */ #define IPC_TIMEOUT … static struct intel_scu_ipc_dev *ipcdev; /* Only one for now */ static DEFINE_MUTEX(ipclock); /* lock used to prevent multiple call to SCU */ static struct class intel_scu_ipc_class = …; /** * intel_scu_ipc_dev_get() - Get SCU IPC instance * * The recommended new API takes SCU IPC instance as parameter and this * function can be called by driver to get the instance. This also makes * sure the driver providing the IPC functionality cannot be unloaded * while the caller has the instance. * * Call intel_scu_ipc_dev_put() to release the instance. * * Returns %NULL if SCU IPC is not currently available. */ struct intel_scu_ipc_dev *intel_scu_ipc_dev_get(void) { … } EXPORT_SYMBOL_GPL(…); /** * intel_scu_ipc_dev_put() - Put SCU IPC instance * @scu: SCU IPC instance * * This function releases the SCU IPC instance retrieved from * intel_scu_ipc_dev_get() and allows the driver providing IPC to be * unloaded. */ void intel_scu_ipc_dev_put(struct intel_scu_ipc_dev *scu) { … } EXPORT_SYMBOL_GPL(…); struct intel_scu_ipc_devres { … }; static void devm_intel_scu_ipc_dev_release(struct device *dev, void *res) { … } /** * devm_intel_scu_ipc_dev_get() - Allocate managed SCU IPC device * @dev: Device requesting the SCU IPC device * * The recommended new API takes SCU IPC instance as parameter and this * function can be called by driver to get the instance. This also makes * sure the driver providing the IPC functionality cannot be unloaded * while the caller has the instance. * * Returns %NULL if SCU IPC is not currently available. */ struct intel_scu_ipc_dev *devm_intel_scu_ipc_dev_get(struct device *dev) { … } EXPORT_SYMBOL_GPL(…); /* * Send ipc command * Command Register (Write Only): * A write to this register results in an interrupt to the SCU core processor * Format: * |rfu2(8) | size(8) | command id(4) | rfu1(3) | ioc(1) | command(8)| */ static inline void ipc_command(struct intel_scu_ipc_dev *scu, u32 cmd) { … } /* * Write ipc data * IPC Write Buffer (Write Only): * 16-byte buffer for sending data associated with IPC command to * SCU. Size of the data is specified in the IPC_COMMAND_REG register */ static inline void ipc_data_writel(struct intel_scu_ipc_dev *scu, u32 data, u32 offset) { … } /* * Status Register (Read Only): * Driver will read this register to get the ready/busy status of the IPC * block and error status of the IPC command that was just processed by SCU * Format: * |rfu3(8)|error code(8)|initiator id(8)|cmd id(4)|rfu1(2)|error(1)|busy(1)| */ static inline u8 ipc_read_status(struct intel_scu_ipc_dev *scu) { … } /* Read ipc byte data */ static inline u8 ipc_data_readb(struct intel_scu_ipc_dev *scu, u32 offset) { … } /* Read ipc u32 data */ static inline u32 ipc_data_readl(struct intel_scu_ipc_dev *scu, u32 offset) { … } /* Wait till scu status is busy */ static inline int busy_loop(struct intel_scu_ipc_dev *scu) { … } /* Wait till ipc ioc interrupt is received or timeout in 10 HZ */ static inline int ipc_wait_for_interrupt(struct intel_scu_ipc_dev *scu) { … } static int intel_scu_ipc_check_status(struct intel_scu_ipc_dev *scu) { … } static struct intel_scu_ipc_dev *intel_scu_ipc_get(struct intel_scu_ipc_dev *scu) { … } /* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */ static int pwr_reg_rdwr(struct intel_scu_ipc_dev *scu, u16 *addr, u8 *data, u32 count, u32 op, u32 id) { … } /** * intel_scu_ipc_dev_ioread8() - Read a byte via the SCU * @scu: Optional SCU IPC instance * @addr: Register on SCU * @data: Return pointer for read byte * * Read a single register. Returns %0 on success or an error code. All * locking between SCU accesses is handled for the caller. * * This function may sleep. */ int intel_scu_ipc_dev_ioread8(struct intel_scu_ipc_dev *scu, u16 addr, u8 *data) { … } EXPORT_SYMBOL(…); /** * intel_scu_ipc_dev_iowrite8() - Write a byte via the SCU * @scu: Optional SCU IPC instance * @addr: Register on SCU * @data: Byte to write * * Write a single register. Returns %0 on success or an error code. All * locking between SCU accesses is handled for the caller. * * This function may sleep. */ int intel_scu_ipc_dev_iowrite8(struct intel_scu_ipc_dev *scu, u16 addr, u8 data) { … } EXPORT_SYMBOL(…); /** * intel_scu_ipc_dev_readv() - Read a set of registers * @scu: Optional SCU IPC instance * @addr: Register list * @data: Bytes to return * @len: Length of array * * Read registers. Returns %0 on success or an error code. All locking * between SCU accesses is handled for the caller. * * The largest array length permitted by the hardware is 5 items. * * This function may sleep. */ int intel_scu_ipc_dev_readv(struct intel_scu_ipc_dev *scu, u16 *addr, u8 *data, size_t len) { … } EXPORT_SYMBOL(…); /** * intel_scu_ipc_dev_writev() - Write a set of registers * @scu: Optional SCU IPC instance * @addr: Register list * @data: Bytes to write * @len: Length of array * * Write registers. Returns %0 on success or an error code. All locking * between SCU accesses is handled for the caller. * * The largest array length permitted by the hardware is 5 items. * * This function may sleep. */ int intel_scu_ipc_dev_writev(struct intel_scu_ipc_dev *scu, u16 *addr, u8 *data, size_t len) { … } EXPORT_SYMBOL(…); /** * intel_scu_ipc_dev_update() - Update a register * @scu: Optional SCU IPC instance * @addr: Register address * @data: Bits to update * @mask: Mask of bits to update * * Read-modify-write power control unit register. The first data argument * must be register value and second is mask value mask is a bitmap that * indicates which bits to update. %0 = masked. Don't modify this bit, %1 = * modify this bit. returns %0 on success or an error code. * * This function may sleep. Locking between SCU accesses is handled * for the caller. */ int intel_scu_ipc_dev_update(struct intel_scu_ipc_dev *scu, u16 addr, u8 data, u8 mask) { … } EXPORT_SYMBOL(…); /** * intel_scu_ipc_dev_simple_command() - Send a simple command * @scu: Optional SCU IPC instance * @cmd: Command * @sub: Sub type * * Issue a simple command to the SCU. Do not use this interface if you must * then access data as any data values may be overwritten by another SCU * access by the time this function returns. * * This function may sleep. Locking for SCU accesses is handled for the * caller. */ int intel_scu_ipc_dev_simple_command(struct intel_scu_ipc_dev *scu, int cmd, int sub) { … } EXPORT_SYMBOL(…); /** * intel_scu_ipc_dev_command_with_size() - Command with data * @scu: Optional SCU IPC instance * @cmd: Command * @sub: Sub type * @in: Input data * @inlen: Input length in bytes * @size: Input size written to the IPC command register in whatever * units (dword, byte) the particular firmware requires. Normally * should be the same as @inlen. * @out: Output data * @outlen: Output length in bytes * * Issue a command to the SCU which involves data transfers. Do the * data copies under the lock but leave it for the caller to interpret. */ int intel_scu_ipc_dev_command_with_size(struct intel_scu_ipc_dev *scu, int cmd, int sub, const void *in, size_t inlen, size_t size, void *out, size_t outlen) { … } EXPORT_SYMBOL(…); /* * Interrupt handler gets called when ioc bit of IPC_COMMAND_REG set to 1 * When ioc bit is set to 1, caller api must wait for interrupt handler called * which in turn unlocks the caller api. Currently this is not used * * This is edge triggered so we need take no action to clear anything */ static irqreturn_t ioc(int irq, void *dev_id) { … } static void intel_scu_ipc_release(struct device *dev) { … } /** * __intel_scu_ipc_register() - Register SCU IPC device * @parent: Parent device * @scu_data: Data used to configure SCU IPC * @owner: Module registering the SCU IPC device * * Call this function to register SCU IPC mechanism under @parent. * Returns pointer to the new SCU IPC device or ERR_PTR() in case of * failure. The caller may use the returned instance if it needs to do * SCU IPC calls itself. */ struct intel_scu_ipc_dev * __intel_scu_ipc_register(struct device *parent, const struct intel_scu_ipc_data *scu_data, struct module *owner) { … } EXPORT_SYMBOL_GPL(…); /** * intel_scu_ipc_unregister() - Unregister SCU IPC * @scu: SCU IPC handle * * This unregisters the SCU IPC device and releases the acquired * resources once the refcount goes to zero. */ void intel_scu_ipc_unregister(struct intel_scu_ipc_dev *scu) { … } EXPORT_SYMBOL_GPL(…); static void devm_intel_scu_ipc_unregister(struct device *dev, void *res) { … } /** * __devm_intel_scu_ipc_register() - Register managed SCU IPC device * @parent: Parent device * @scu_data: Data used to configure SCU IPC * @owner: Module registering the SCU IPC device * * Call this function to register managed SCU IPC mechanism under * @parent. Returns pointer to the new SCU IPC device or ERR_PTR() in * case of failure. The caller may use the returned instance if it needs * to do SCU IPC calls itself. */ struct intel_scu_ipc_dev * __devm_intel_scu_ipc_register(struct device *parent, const struct intel_scu_ipc_data *scu_data, struct module *owner) { … } EXPORT_SYMBOL_GPL(…); static int __init intel_scu_ipc_init(void) { … } subsys_initcall(intel_scu_ipc_init); static void __exit intel_scu_ipc_exit(void) { … } module_exit(intel_scu_ipc_exit);
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