// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2015-2020, NVIDIA CORPORATION. All rights reserved. */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/clk/tegra.h> #include <linux/debugfs.h> #include <linux/delay.h> #include <linux/kernel.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/of_reserved_mem.h> #include <linux/platform_device.h> #include <linux/slab.h> #include <linux/thermal.h> #include <soc/tegra/fuse.h> #include <soc/tegra/mc.h> #include "tegra210-emc.h" #include "tegra210-mc.h" /* CLK_RST_CONTROLLER_CLK_SOURCE_EMC */ #define EMC_CLK_EMC_2X_CLK_SRC_SHIFT … #define EMC_CLK_EMC_2X_CLK_SRC_MASK … #define EMC_CLK_SOURCE_PLLM_LJ … #define EMC_CLK_SOURCE_PLLMB_LJ … #define EMC_CLK_FORCE_CC_TRIGGER … #define EMC_CLK_MC_EMC_SAME_FREQ … #define EMC_CLK_EMC_2X_CLK_DIVISOR_SHIFT … #define EMC_CLK_EMC_2X_CLK_DIVISOR_MASK … /* CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL */ #define DLL_CLK_EMC_DLL_CLK_SRC_SHIFT … #define DLL_CLK_EMC_DLL_CLK_SRC_MASK … #define DLL_CLK_EMC_DLL_DDLL_CLK_SEL_SHIFT … #define DLL_CLK_EMC_DLL_DDLL_CLK_SEL_MASK … #define PLLM_VCOA … #define PLLM_VCOB … #define EMC_DLL_SWITCH_OUT … #define DLL_CLK_EMC_DLL_CLK_DIVISOR_SHIFT … #define DLL_CLK_EMC_DLL_CLK_DIVISOR_MASK … /* MC_EMEM_ARB_MISC0 */ #define MC_EMEM_ARB_MISC0_EMC_SAME_FREQ … /* EMC_DATA_BRLSHFT_X */ #define EMC0_EMC_DATA_BRLSHFT_0_INDEX … #define EMC1_EMC_DATA_BRLSHFT_0_INDEX … #define EMC0_EMC_DATA_BRLSHFT_1_INDEX … #define EMC1_EMC_DATA_BRLSHFT_1_INDEX … #define TRIM_REG(chan, rank, reg, byte) … #define CALC_TEMP(rank, reg, byte1, byte2, n) … #define REFRESH_SPEEDUP(value, speedup) … #define LPDDR2_MR4_SRR … static const struct tegra210_emc_sequence *tegra210_emc_sequences[] = …; static const struct tegra210_emc_table_register_offsets tegra210_emc_table_register_offsets = …; static void tegra210_emc_train(struct timer_list *timer) { … } static void tegra210_emc_training_start(struct tegra210_emc *emc) { … } static void tegra210_emc_training_stop(struct tegra210_emc *emc) { … } static unsigned int tegra210_emc_get_temperature(struct tegra210_emc *emc) { … } static void tegra210_emc_poll_refresh(struct timer_list *timer) { … } static void tegra210_emc_poll_refresh_stop(struct tegra210_emc *emc) { … } static void tegra210_emc_poll_refresh_start(struct tegra210_emc *emc) { … } static int tegra210_emc_cd_max_state(struct thermal_cooling_device *cd, unsigned long *state) { … } static int tegra210_emc_cd_get_state(struct thermal_cooling_device *cd, unsigned long *state) { … } static int tegra210_emc_cd_set_state(struct thermal_cooling_device *cd, unsigned long state) { … } static const struct thermal_cooling_device_ops tegra210_emc_cd_ops = …; static void tegra210_emc_set_clock(struct tegra210_emc *emc, u32 clksrc) { … } static void tegra210_change_dll_src(struct tegra210_emc *emc, u32 clksrc) { … } int tegra210_emc_set_refresh(struct tegra210_emc *emc, enum tegra210_emc_refresh refresh) { … } u32 tegra210_emc_mrr_read(struct tegra210_emc *emc, unsigned int chip, unsigned int address) { … } void tegra210_emc_do_clock_change(struct tegra210_emc *emc, u32 clksrc) { … } struct tegra210_emc_timing *tegra210_emc_find_timing(struct tegra210_emc *emc, unsigned long rate) { … } int tegra210_emc_wait_for_update(struct tegra210_emc *emc, unsigned int channel, unsigned int offset, u32 bit_mask, bool state) { … } void tegra210_emc_set_shadow_bypass(struct tegra210_emc *emc, int set) { … } u32 tegra210_emc_get_dll_state(struct tegra210_emc_timing *next) { … } void tegra210_emc_timing_update(struct tegra210_emc *emc) { … } unsigned long tegra210_emc_actual_osc_clocks(u32 in) { … } void tegra210_emc_start_periodic_compensation(struct tegra210_emc *emc) { … } u32 tegra210_emc_compensate(struct tegra210_emc_timing *next, u32 offset) { … } u32 tegra210_emc_dll_prelock(struct tegra210_emc *emc, u32 clksrc) { … } u32 tegra210_emc_dvfs_power_ramp_up(struct tegra210_emc *emc, u32 clk, bool flip_backward) { … } u32 tegra210_emc_dvfs_power_ramp_down(struct tegra210_emc *emc, u32 clk, bool flip_backward) { … } void tegra210_emc_reset_dram_clktree_values(struct tegra210_emc_timing *timing) { … } static void update_dll_control(struct tegra210_emc *emc, u32 value, bool state) { … } void tegra210_emc_dll_disable(struct tegra210_emc *emc) { … } void tegra210_emc_dll_enable(struct tegra210_emc *emc) { … } void tegra210_emc_adjust_timing(struct tegra210_emc *emc, struct tegra210_emc_timing *timing) { … } static int tegra210_emc_set_rate(struct device *dev, const struct tegra210_clk_emc_config *config) { … } /* * debugfs interface * * The memory controller driver exposes some files in debugfs that can be used * to control the EMC frequency. The top-level directory can be found here: * * /sys/kernel/debug/emc * * It contains the following files: * * - available_rates: This file contains a list of valid, space-separated * EMC frequencies. * * - min_rate: Writing a value to this file sets the given frequency as the * floor of the permitted range. If this is higher than the currently * configured EMC frequency, this will cause the frequency to be * increased so that it stays within the valid range. * * - max_rate: Similarily to the min_rate file, writing a value to this file * sets the given frequency as the ceiling of the permitted range. If * the value is lower than the currently configured EMC frequency, this * will cause the frequency to be decreased so that it stays within the * valid range. */ static bool tegra210_emc_validate_rate(struct tegra210_emc *emc, unsigned long rate) { … } static int tegra210_emc_debug_available_rates_show(struct seq_file *s, void *data) { … } DEFINE_SHOW_ATTRIBUTE(…); static int tegra210_emc_debug_min_rate_get(void *data, u64 *rate) { … } static int tegra210_emc_debug_min_rate_set(void *data, u64 rate) { … } DEFINE_DEBUGFS_ATTRIBUTE(…); static int tegra210_emc_debug_max_rate_get(void *data, u64 *rate) { … } static int tegra210_emc_debug_max_rate_set(void *data, u64 rate) { … } DEFINE_DEBUGFS_ATTRIBUTE(…); static int tegra210_emc_debug_temperature_get(void *data, u64 *temperature) { … } static int tegra210_emc_debug_temperature_set(void *data, u64 temperature) { … } DEFINE_DEBUGFS_ATTRIBUTE(…); static void tegra210_emc_debugfs_init(struct tegra210_emc *emc) { … } static void tegra210_emc_detect(struct tegra210_emc *emc) { … } static int tegra210_emc_validate_timings(struct tegra210_emc *emc, struct tegra210_emc_timing *timings, unsigned int num_timings) { … } static int tegra210_emc_probe(struct platform_device *pdev) { … } static void tegra210_emc_remove(struct platform_device *pdev) { … } static int __maybe_unused tegra210_emc_suspend(struct device *dev) { … } static int __maybe_unused tegra210_emc_resume(struct device *dev) { … } static const struct dev_pm_ops tegra210_emc_pm_ops = …; static const struct of_device_id tegra210_emc_of_match[] = …; MODULE_DEVICE_TABLE(of, tegra210_emc_of_match); static struct platform_driver tegra210_emc_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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