linux/include/dt-bindings/memory/mt2701-larb-port.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2015 MediaTek Inc.
 * Author: Honghui Zhang <[email protected]>
 */

#ifndef _DT_BINDINGS_MEMORY_MT2701_LARB_PORT_H_
#define _DT_BINDINGS_MEMORY_MT2701_LARB_PORT_H_

/*
 * Mediatek m4u generation 1 such as mt2701 has flat m4u port numbers,
 * the first port's id for larb[N] would be the last port's id of larb[N - 1]
 * plus one while larb[0]'s first port number is 0. The definition of
 * MT2701_M4U_ID_LARBx is following HW register spec.
 * But m4u generation 2 like mt8173 have different port number, it use fixed
 * offset for each larb, the first port's id for larb[N] would be (N * 32).
 */
#define LARB0_PORT_OFFSET
#define LARB1_PORT_OFFSET
#define LARB2_PORT_OFFSET
#define LARB3_PORT_OFFSET

#define MT2701_M4U_ID_LARB0(port)
#define MT2701_M4U_ID_LARB1(port)
#define MT2701_M4U_ID_LARB2(port)

/* Port define for larb0 */
#define MT2701_M4U_PORT_DISP_OVL_0
#define MT2701_M4U_PORT_DISP_RDMA1
#define MT2701_M4U_PORT_DISP_RDMA
#define MT2701_M4U_PORT_DISP_WDMA
#define MT2701_M4U_PORT_MM_CMDQ
#define MT2701_M4U_PORT_MDP_RDMA
#define MT2701_M4U_PORT_MDP_WDMA
#define MT2701_M4U_PORT_MDP_ROTO
#define MT2701_M4U_PORT_MDP_ROTCO
#define MT2701_M4U_PORT_MDP_ROTVO
#define MT2701_M4U_PORT_MDP_RDMA1

/* Port define for larb1 */
#define MT2701_M4U_PORT_VDEC_MC_EXT
#define MT2701_M4U_PORT_VDEC_PP_EXT
#define MT2701_M4U_PORT_VDEC_PPWRAP_EXT
#define MT2701_M4U_PORT_VDEC_AVC_MV_EXT
#define MT2701_M4U_PORT_VDEC_PRED_RD_EXT
#define MT2701_M4U_PORT_VDEC_PRED_WR_EXT
#define MT2701_M4U_PORT_VDEC_VLD_EXT
#define MT2701_M4U_PORT_VDEC_VLD2_EXT
#define MT2701_M4U_PORT_VDEC_TILE_EXT
#define MT2701_M4U_PORT_VDEC_IMG_RESZ_EXT

/* Port define for larb2 */
#define MT2701_M4U_PORT_VENC_RCPU
#define MT2701_M4U_PORT_VENC_REC_FRM
#define MT2701_M4U_PORT_VENC_BSDMA
#define MT2701_M4U_PORT_JPGENC_RDMA
#define MT2701_M4U_PORT_VENC_LT_RCPU
#define MT2701_M4U_PORT_VENC_LT_REC_FRM
#define MT2701_M4U_PORT_VENC_LT_BSDMA
#define MT2701_M4U_PORT_JPGDEC_BSDMA
#define MT2701_M4U_PORT_VENC_SV_COMV
#define MT2701_M4U_PORT_VENC_RD_COMV
#define MT2701_M4U_PORT_JPGENC_BSDMA
#define MT2701_M4U_PORT_VENC_CUR_LUMA
#define MT2701_M4U_PORT_VENC_CUR_CHROMA
#define MT2701_M4U_PORT_VENC_REF_LUMA
#define MT2701_M4U_PORT_VENC_REF_CHROMA
#define MT2701_M4U_PORT_IMG_RESZ
#define MT2701_M4U_PORT_VENC_LT_SV_COMV
#define MT2701_M4U_PORT_VENC_LT_RD_COMV
#define MT2701_M4U_PORT_VENC_LT_CUR_LUMA
#define MT2701_M4U_PORT_VENC_LT_CUR_CHROMA
#define MT2701_M4U_PORT_VENC_LT_REF_LUMA
#define MT2701_M4U_PORT_VENC_LT_REF_CHROMA
#define MT2701_M4U_PORT_JPGDEC_WDMA

#endif