// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) STMicroelectronics 2020 */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/reset.h> /* FMC2 Controller Registers */ #define FMC2_BCR1 … #define FMC2_BTR1 … #define FMC2_BCR(x) … #define FMC2_BTR(x) … #define FMC2_PCSCNTR … #define FMC2_CFGR … #define FMC2_SR … #define FMC2_BWTR1 … #define FMC2_BWTR(x) … #define FMC2_SECCFGR … #define FMC2_CIDCFGR0 … #define FMC2_CIDCFGR(x) … #define FMC2_SEMCR0 … #define FMC2_SEMCR(x) … /* Register: FMC2_BCR1 */ #define FMC2_BCR1_CCLKEN … #define FMC2_BCR1_FMC2EN … /* Register: FMC2_BCRx */ #define FMC2_BCR_MBKEN … #define FMC2_BCR_MUXEN … #define FMC2_BCR_MTYP … #define FMC2_BCR_MWID … #define FMC2_BCR_FACCEN … #define FMC2_BCR_BURSTEN … #define FMC2_BCR_WAITPOL … #define FMC2_BCR_WAITCFG … #define FMC2_BCR_WREN … #define FMC2_BCR_WAITEN … #define FMC2_BCR_EXTMOD … #define FMC2_BCR_ASYNCWAIT … #define FMC2_BCR_CPSIZE … #define FMC2_BCR_CBURSTRW … #define FMC2_BCR_CSCOUNT … #define FMC2_BCR_NBLSET … /* Register: FMC2_BTRx/FMC2_BWTRx */ #define FMC2_BXTR_ADDSET … #define FMC2_BXTR_ADDHLD … #define FMC2_BXTR_DATAST … #define FMC2_BXTR_BUSTURN … #define FMC2_BTR_CLKDIV … #define FMC2_BTR_DATLAT … #define FMC2_BXTR_ACCMOD … #define FMC2_BXTR_DATAHLD … /* Register: FMC2_PCSCNTR */ #define FMC2_PCSCNTR_CSCOUNT … #define FMC2_PCSCNTR_CNTBEN(x) … /* Register: FMC2_CFGR */ #define FMC2_CFGR_CLKDIV … #define FMC2_CFGR_CCLKEN … #define FMC2_CFGR_FMC2EN … /* Register: FMC2_SR */ #define FMC2_SR_ISOST … /* Register: FMC2_CIDCFGR */ #define FMC2_CIDCFGR_CFEN … #define FMC2_CIDCFGR_SEMEN … #define FMC2_CIDCFGR_SCID … #define FMC2_CIDCFGR_SEMWLC1 … /* Register: FMC2_SEMCR */ #define FMC2_SEMCR_SEM_MUTEX … #define FMC2_SEMCR_SEMCID … #define FMC2_MAX_EBI_CE … #define FMC2_MAX_BANKS … #define FMC2_MAX_RESOURCES … #define FMC2_CID1 … #define FMC2_BCR_CPSIZE_0 … #define FMC2_BCR_CPSIZE_128 … #define FMC2_BCR_CPSIZE_256 … #define FMC2_BCR_CPSIZE_512 … #define FMC2_BCR_CPSIZE_1024 … #define FMC2_BCR_MWID_8 … #define FMC2_BCR_MWID_16 … #define FMC2_BCR_MTYP_SRAM … #define FMC2_BCR_MTYP_PSRAM … #define FMC2_BCR_MTYP_NOR … #define FMC2_BCR_CSCOUNT_0 … #define FMC2_BCR_CSCOUNT_1 … #define FMC2_BCR_CSCOUNT_64 … #define FMC2_BCR_CSCOUNT_256 … #define FMC2_BXTR_EXTMOD_A … #define FMC2_BXTR_EXTMOD_B … #define FMC2_BXTR_EXTMOD_C … #define FMC2_BXTR_EXTMOD_D … #define FMC2_BCR_NBLSET_MAX … #define FMC2_BXTR_ADDSET_MAX … #define FMC2_BXTR_ADDHLD_MAX … #define FMC2_BXTR_DATAST_MAX … #define FMC2_BXTR_BUSTURN_MAX … #define FMC2_BXTR_DATAHLD_MAX … #define FMC2_BTR_CLKDIV_MAX … #define FMC2_BTR_DATLAT_MAX … #define FMC2_PCSCNTR_CSCOUNT_MAX … #define FMC2_CFGR_CLKDIV_MAX … enum stm32_fmc2_ebi_bank { … }; enum stm32_fmc2_ebi_register_type { … }; enum stm32_fmc2_ebi_transaction_type { … }; enum stm32_fmc2_ebi_buswidth { … }; enum stm32_fmc2_ebi_cpsize { … }; enum stm32_fmc2_ebi_cscount { … }; struct stm32_fmc2_ebi; struct stm32_fmc2_ebi_data { … }; struct stm32_fmc2_ebi { … }; /* * struct stm32_fmc2_prop - STM32 FMC2 EBI property * @name: the device tree binding name of the property * @bprop: indicate that it is a boolean property * @mprop: indicate that it is a mandatory property * @reg_type: the register that have to be modified * @reg_mask: the bit that have to be modified in the selected register * in case of it is a boolean property * @reset_val: the default value that have to be set in case the property * has not been defined in the device tree * @check: this callback ckecks that the property is compliant with the * transaction type selected * @calculate: this callback is called to calculate for exemple a timing * set in nanoseconds in the device tree in clock cycles or in * clock period * @set: this callback applies the values in the registers */ struct stm32_fmc2_prop { … }; static int stm32_fmc2_ebi_check_mux(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_check_waitcfg(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_check_sync_trans(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_mp25_check_cclk(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_mp25_check_clk_period(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_check_async_trans(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_check_cpsize(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_check_address_hold(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_check_clk_period(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static int stm32_fmc2_ebi_check_cclk(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs) { … } static u32 stm32_fmc2_ebi_ns_to_clock_cycles(struct stm32_fmc2_ebi *ebi, int cs, u32 setup) { … } static u32 stm32_fmc2_ebi_ns_to_clk_period(struct stm32_fmc2_ebi *ebi, int cs, u32 setup) { … } static u32 stm32_fmc2_ebi_mp25_ns_to_clk_period(struct stm32_fmc2_ebi *ebi, int cs, u32 setup) { … } static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) { … } static int stm32_fmc2_ebi_set_bit_field(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_trans_type(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_buswidth(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_cpsize(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_bl_setup(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_address_setup(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_address_hold(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_data_setup(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_bus_turnaround(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_data_hold(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_clk_period(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_mp25_set_clk_period(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_data_latency(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_set_max_low_pulse(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static int stm32_fmc2_ebi_mp25_set_max_low_pulse(struct stm32_fmc2_ebi *ebi, const struct stm32_fmc2_prop *prop, int cs, u32 setup) { … } static const struct stm32_fmc2_prop stm32_fmc2_child_props[] = …; static const struct stm32_fmc2_prop stm32_fmc2_mp25_child_props[] = …; static int stm32_fmc2_ebi_mp25_check_rif(struct stm32_fmc2_ebi *ebi, u32 resource) { … } static void stm32_fmc2_ebi_mp25_put_sems(struct stm32_fmc2_ebi *ebi) { … } static void stm32_fmc2_ebi_mp25_get_sems(struct stm32_fmc2_ebi *ebi) { … } static int stm32_fmc2_ebi_parse_prop(struct stm32_fmc2_ebi *ebi, struct device_node *dev_node, const struct stm32_fmc2_prop *prop, int cs) { … } static void stm32_fmc2_ebi_enable_bank(struct stm32_fmc2_ebi *ebi, int cs) { … } static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs) { … } static int stm32_fmc2_ebi_save_setup(struct stm32_fmc2_ebi *ebi) { … } static int stm32_fmc2_ebi_mp1_save_setup(struct stm32_fmc2_ebi *ebi) { … } static int stm32_fmc2_ebi_mp25_save_setup(struct stm32_fmc2_ebi *ebi) { … } static void stm32_fmc2_ebi_set_setup(struct stm32_fmc2_ebi *ebi) { … } static void stm32_fmc2_ebi_mp1_set_setup(struct stm32_fmc2_ebi *ebi) { … } static void stm32_fmc2_ebi_mp25_set_setup(struct stm32_fmc2_ebi *ebi) { … } static void stm32_fmc2_ebi_disable_banks(struct stm32_fmc2_ebi *ebi) { … } /* NWAIT signal can not be connected to EBI controller and NAND controller */ static int stm32_fmc2_ebi_nwait_used_by_ctrls(struct stm32_fmc2_ebi *ebi) { … } static void stm32_fmc2_ebi_enable(struct stm32_fmc2_ebi *ebi) { … } static void stm32_fmc2_ebi_disable(struct stm32_fmc2_ebi *ebi) { … } static int stm32_fmc2_ebi_setup_cs(struct stm32_fmc2_ebi *ebi, struct device_node *dev_node, u32 cs) { … } static int stm32_fmc2_ebi_parse_dt(struct stm32_fmc2_ebi *ebi) { … } static int stm32_fmc2_ebi_probe(struct platform_device *pdev) { … } static void stm32_fmc2_ebi_remove(struct platform_device *pdev) { … } static int __maybe_unused stm32_fmc2_ebi_runtime_suspend(struct device *dev) { … } static int __maybe_unused stm32_fmc2_ebi_runtime_resume(struct device *dev) { … } static int __maybe_unused stm32_fmc2_ebi_suspend(struct device *dev) { … } static int __maybe_unused stm32_fmc2_ebi_resume(struct device *dev) { … } static const struct dev_pm_ops stm32_fmc2_ebi_pm_ops = …; static const struct stm32_fmc2_ebi_data stm32_fmc2_ebi_mp1_data = …; static const struct stm32_fmc2_ebi_data stm32_fmc2_ebi_mp25_data = …; static const struct of_device_id stm32_fmc2_ebi_match[] = …; MODULE_DEVICE_TABLE(of, stm32_fmc2_ebi_match); static struct platform_driver stm32_fmc2_ebi_driver = …; module_platform_driver(…) …; MODULE_ALIAS(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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