/* SPDX-License-Identifier: GPL-2.0-only */ /* * Register constants and other forward declarations needed by the bma400 * sources. * * Copyright 2019 Dan Robertson <[email protected]> */ #ifndef _BMA400_H_ #define _BMA400_H_ #include <linux/bits.h> #include <linux/regmap.h> /* * Read-Only Registers */ /* Status and ID registers */ #define BMA400_CHIP_ID_REG … #define BMA400_ERR_REG … #define BMA400_STATUS_REG … /* Acceleration registers */ #define BMA400_X_AXIS_LSB_REG … #define BMA400_X_AXIS_MSB_REG … #define BMA400_Y_AXIS_LSB_REG … #define BMA400_Y_AXIS_MSB_REG … #define BMA400_Z_AXIS_LSB_REG … #define BMA400_Z_AXIS_MSB_REG … /* Sensor time registers */ #define BMA400_SENSOR_TIME0 … #define BMA400_SENSOR_TIME1 … #define BMA400_SENSOR_TIME2 … /* Event and interrupt registers */ #define BMA400_EVENT_REG … #define BMA400_INT_STAT0_REG … #define BMA400_INT_STAT1_REG … #define BMA400_INT_STAT2_REG … #define BMA400_INT12_MAP_REG … #define BMA400_INT_ENG_OVRUN_MSK … /* Temperature register */ #define BMA400_TEMP_DATA_REG … /* FIFO length and data registers */ #define BMA400_FIFO_LENGTH0_REG … #define BMA400_FIFO_LENGTH1_REG … #define BMA400_FIFO_DATA_REG … /* Step count registers */ #define BMA400_STEP_CNT0_REG … #define BMA400_STEP_CNT1_REG … #define BMA400_STEP_CNT3_REG … #define BMA400_STEP_STAT_REG … #define BMA400_STEP_INT_MSK … #define BMA400_STEP_RAW_LEN … #define BMA400_STEP_STAT_MASK … /* * Read-write configuration registers */ #define BMA400_ACC_CONFIG0_REG … #define BMA400_ACC_CONFIG1_REG … #define BMA400_ACC_CONFIG2_REG … #define BMA400_CMD_REG … /* Interrupt registers */ #define BMA400_INT_CONFIG0_REG … #define BMA400_INT_CONFIG1_REG … #define BMA400_INT1_MAP_REG … #define BMA400_INT_IO_CTRL_REG … #define BMA400_INT_DRDY_MSK … /* Chip ID of BMA 400 devices found in the chip ID register. */ #define BMA400_ID_REG_VAL … #define BMA400_LP_OSR_SHIFT … #define BMA400_NP_OSR_SHIFT … #define BMA400_SCALE_SHIFT … #define BMA400_TWO_BITS_MASK … #define BMA400_LP_OSR_MASK … #define BMA400_NP_OSR_MASK … #define BMA400_ACC_ODR_MASK … #define BMA400_ACC_SCALE_MASK … #define BMA400_ACC_ODR_MIN_RAW … #define BMA400_ACC_ODR_LP_RAW … #define BMA400_ACC_ODR_MAX_RAW … #define BMA400_ACC_ODR_MAX_HZ … #define BMA400_ACC_ODR_MIN_WHOLE_HZ … #define BMA400_ACC_ODR_MIN_HZ … /* Generic interrupts register */ #define BMA400_GEN1INT_CONFIG0 … #define BMA400_GEN2INT_CONFIG0 … #define BMA400_GEN_CONFIG1_OFF … #define BMA400_GEN_CONFIG2_OFF … #define BMA400_GEN_CONFIG3_OFF … #define BMA400_GEN_CONFIG31_OFF … #define BMA400_INT_GEN1_MSK … #define BMA400_INT_GEN2_MSK … #define BMA400_GEN_HYST_MSK … /* TAP config registers */ #define BMA400_TAP_CONFIG … #define BMA400_TAP_CONFIG1 … #define BMA400_S_TAP_MSK … #define BMA400_D_TAP_MSK … #define BMA400_INT_S_TAP_MSK … #define BMA400_INT_D_TAP_MSK … #define BMA400_TAP_SEN_MSK … #define BMA400_TAP_TICSTH_MSK … #define BMA400_TAP_QUIET_MSK … #define BMA400_TAP_QUIETDT_MSK … #define BMA400_TAP_TIM_LIST_LEN … /* * BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before * converting to micro values for +-2g range. * * For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2 * For +-4g - 1 LSB = 1.953125 milli g = 0.019153 m/s^2 * For +-16g - 1 LSB = 7.8125 milli g = 0.076614 m/s^2 * * The raw value which is used to select the different ranges is determined * by the first bit set position from the scale value, so BMA400_SCALE_MIN * should be odd. * * Scale values for +-2g, +-4g, +-8g and +-16g are populated into bma400_scales * array by left shifting BMA400_SCALE_MIN. * e.g.: * To select +-2g = 9577 << 0 = raw value to write is 0. * To select +-8g = 9577 << 2 = raw value to write is 2. * To select +-16g = 9577 << 3 = raw value to write is 3. */ #define BMA400_SCALE_MIN … #define BMA400_SCALE_MAX … extern const struct regmap_config bma400_regmap_config; int bma400_probe(struct device *dev, struct regmap *regmap, int irq, const char *name); #endif
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