// SPDX-License-Identifier: GPL-2.0-or-later /* * exynos_adc.c - Support for ADC in EXYNOS SoCs * * 8 ~ 10 channel, 10/12-bit ADC * * Copyright (C) 2013 Naveen Krishna Chatradhi <[email protected]> */ #include <linux/compiler.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/errno.h> #include <linux/kernel.h> #include <linux/slab.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/completion.h> #include <linux/of.h> #include <linux/of_irq.h> #include <linux/regulator/consumer.h> #include <linux/of_platform.h> #include <linux/err.h> #include <linux/input.h> #include <linux/iio/iio.h> #include <linux/iio/machine.h> #include <linux/iio/driver.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include <linux/platform_data/touchscreen-s3c2410.h> /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */ #define ADC_V1_CON(x) … #define ADC_V1_TSC(x) … #define ADC_V1_DLY(x) … #define ADC_V1_DATX(x) … #define ADC_V1_DATY(x) … #define ADC_V1_UPDN(x) … #define ADC_V1_INTCLR(x) … #define ADC_V1_MUX(x) … #define ADC_V1_CLRINTPNDNUP(x) … /* S3C2410 ADC registers definitions */ #define ADC_S3C2410_MUX(x) … /* Future ADC_V2 registers definitions */ #define ADC_V2_CON1(x) … #define ADC_V2_CON2(x) … #define ADC_V2_STAT(x) … #define ADC_V2_INT_EN(x) … #define ADC_V2_INT_ST(x) … #define ADC_V2_VER(x) … /* Bit definitions for ADC_V1 */ #define ADC_V1_CON_RES … #define ADC_V1_CON_PRSCEN … #define ADC_V1_CON_PRSCLV(x) … #define ADC_V1_CON_STANDBY … /* Bit definitions for S3C2410 ADC */ #define ADC_S3C2410_CON_SELMUX(x) … #define ADC_S3C2410_DATX_MASK … #define ADC_S3C2416_CON_RES_SEL … /* touch screen always uses channel 0 */ #define ADC_S3C2410_MUX_TS … /* ADCTSC Register Bits */ #define ADC_S3C2443_TSC_UD_SEN … #define ADC_S3C2410_TSC_YM_SEN … #define ADC_S3C2410_TSC_YP_SEN … #define ADC_S3C2410_TSC_XM_SEN … #define ADC_S3C2410_TSC_XP_SEN … #define ADC_S3C2410_TSC_PULL_UP_DISABLE … #define ADC_S3C2410_TSC_AUTO_PST … #define ADC_S3C2410_TSC_XY_PST(x) … #define ADC_TSC_WAIT4INT … #define ADC_TSC_AUTOPST … /* Bit definitions for ADC_V2 */ #define ADC_V2_CON1_SOFT_RESET … #define ADC_V2_CON2_OSEL … #define ADC_V2_CON2_ESEL … #define ADC_V2_CON2_HIGHF … #define ADC_V2_CON2_C_TIME(x) … #define ADC_V2_CON2_ACH_SEL(x) … #define ADC_V2_CON2_ACH_MASK … #define MAX_ADC_V2_CHANNELS … #define MAX_ADC_V1_CHANNELS … #define MAX_EXYNOS3250_ADC_CHANNELS … #define MAX_EXYNOS4212_ADC_CHANNELS … #define MAX_S5PV210_ADC_CHANNELS … /* Bit definitions common for ADC_V1 and ADC_V2 */ #define ADC_CON_EN_START … #define ADC_CON_EN_START_MASK … #define ADC_DATX_PRESSED … #define ADC_DATX_MASK … #define ADC_DATY_MASK … #define EXYNOS_ADC_TIMEOUT … #define EXYNOS_ADCV1_PHY_OFFSET … #define EXYNOS_ADCV2_PHY_OFFSET … struct exynos_adc { … }; struct exynos_adc_data { … }; static void exynos_adc_unprepare_clk(struct exynos_adc *info) { … } static int exynos_adc_prepare_clk(struct exynos_adc *info) { … } static void exynos_adc_disable_clk(struct exynos_adc *info) { … } static int exynos_adc_enable_clk(struct exynos_adc *info) { … } static void exynos_adc_v1_init_hw(struct exynos_adc *info) { … } static void exynos_adc_v1_exit_hw(struct exynos_adc *info) { … } static void exynos_adc_v1_clear_irq(struct exynos_adc *info) { … } static void exynos_adc_v1_start_conv(struct exynos_adc *info, unsigned long addr) { … } /* Exynos4212 and 4412 is like ADCv1 but with four channels only */ static const struct exynos_adc_data exynos4212_adc_data = …; static const struct exynos_adc_data exynos_adc_v1_data = …; static const struct exynos_adc_data exynos_adc_s5pv210_data = …; static void exynos_adc_s3c2416_start_conv(struct exynos_adc *info, unsigned long addr) { … } static struct exynos_adc_data const exynos_adc_s3c2416_data = …; static void exynos_adc_s3c2443_start_conv(struct exynos_adc *info, unsigned long addr) { … } static struct exynos_adc_data const exynos_adc_s3c2443_data = …; static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info, unsigned long addr) { … } static struct exynos_adc_data const exynos_adc_s3c24xx_data = …; static struct exynos_adc_data const exynos_adc_s3c64xx_data = …; static void exynos_adc_v2_init_hw(struct exynos_adc *info) { … } static void exynos_adc_v2_exit_hw(struct exynos_adc *info) { … } static void exynos_adc_v2_clear_irq(struct exynos_adc *info) { … } static void exynos_adc_v2_start_conv(struct exynos_adc *info, unsigned long addr) { … } static const struct exynos_adc_data exynos_adc_v2_data = …; static const struct exynos_adc_data exynos3250_adc_data = …; static void exynos_adc_exynos7_init_hw(struct exynos_adc *info) { … } static const struct exynos_adc_data exynos7_adc_data = …; static const struct of_device_id exynos_adc_match[] = …; MODULE_DEVICE_TABLE(of, exynos_adc_match); static struct exynos_adc_data *exynos_adc_get_data(struct platform_device *pdev) { … } static int exynos_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { … } static int exynos_read_s3c64xx_ts(struct iio_dev *indio_dev, int *x, int *y) { … } static irqreturn_t exynos_adc_isr(int irq, void *dev_id) { … } /* * Here we (ab)use a threaded interrupt handler to stay running * for as long as the touchscreen remains pressed, we report * a new event with the latest data and then sleep until the * next timer tick. This mirrors the behavior of the old * driver, with much less code. */ static irqreturn_t exynos_ts_isr(int irq, void *dev_id) { … } static int exynos_adc_reg_access(struct iio_dev *indio_dev, unsigned reg, unsigned writeval, unsigned *readval) { … } static const struct iio_info exynos_adc_iio_info = …; #define ADC_CHANNEL(_index, _id) … static const struct iio_chan_spec exynos_adc_iio_channels[] = …; static int exynos_adc_remove_devices(struct device *dev, void *c) { … } static int exynos_adc_ts_open(struct input_dev *dev) { … } static void exynos_adc_ts_close(struct input_dev *dev) { … } static int exynos_adc_ts_init(struct exynos_adc *info) { … } static int exynos_adc_probe(struct platform_device *pdev) { … } static void exynos_adc_remove(struct platform_device *pdev) { … } static int exynos_adc_suspend(struct device *dev) { … } static int exynos_adc_resume(struct device *dev) { … } static DEFINE_SIMPLE_DEV_PM_OPS(exynos_adc_pm_ops, exynos_adc_suspend, exynos_adc_resume); static struct platform_driver exynos_adc_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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