linux/drivers/iio/adc/stm32-dfsdm-core.c

// SPDX-License-Identifier: GPL-2.0
/*
 * This file is part the core part STM32 DFSDM driver
 *
 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
 * Author(s): Arnaud Pouliquen <[email protected]> for STMicroelectronics.
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>

#include "stm32-dfsdm.h"

/**
 * struct stm32_dfsdm_dev_data - DFSDM compatible configuration data
 * @ipid: DFSDM identification number. Used only if hardware provides identification registers
 * @num_filters: DFSDM number of filters. Unused if identification registers are available
 * @num_channels: DFSDM number of channels. Unused if identification registers are available
 * @regmap_cfg: SAI register map configuration pointer
 */
struct stm32_dfsdm_dev_data { … };

#define STM32H7_DFSDM_NUM_FILTERS …
#define STM32H7_DFSDM_NUM_CHANNELS …

static bool stm32_dfsdm_volatile_reg(struct device *dev, unsigned int reg)
{ … }

static const struct regmap_config stm32h7_dfsdm_regmap_cfg = …;

static const struct stm32_dfsdm_dev_data stm32h7_dfsdm_data = …;

static const struct regmap_config stm32mp1_dfsdm_regmap_cfg = …;

static const struct stm32_dfsdm_dev_data stm32mp1_dfsdm_data = …;

struct dfsdm_priv { … };

static inline struct dfsdm_priv *to_stm32_dfsdm_priv(struct stm32_dfsdm *dfsdm)
{ … }

static int stm32_dfsdm_clk_prepare_enable(struct stm32_dfsdm *dfsdm)
{ … }

static void stm32_dfsdm_clk_disable_unprepare(struct stm32_dfsdm *dfsdm)
{ … }

/**
 * stm32_dfsdm_start_dfsdm - start global dfsdm interface.
 *
 * Enable interface if n_active_ch is not null.
 * @dfsdm: Handle used to retrieve dfsdm context.
 */
int stm32_dfsdm_start_dfsdm(struct stm32_dfsdm *dfsdm)
{ … }
EXPORT_SYMBOL_GPL(…);

/**
 * stm32_dfsdm_stop_dfsdm - stop global DFSDM interface.
 *
 * Disable interface if n_active_ch is null
 * @dfsdm: Handle used to retrieve dfsdm context.
 */
int stm32_dfsdm_stop_dfsdm(struct stm32_dfsdm *dfsdm)
{ … }
EXPORT_SYMBOL_GPL(…);

static int stm32_dfsdm_parse_of(struct platform_device *pdev,
				struct dfsdm_priv *priv)
{
	struct device_node *node = pdev->dev.of_node;
	struct resource *res;
	unsigned long clk_freq, divider;
	unsigned int spi_freq, rem;
	int ret;

	if (!node)
		return -EINVAL;

	priv->dfsdm.base = devm_platform_get_and_ioremap_resource(pdev, 0,
							&res);
	if (IS_ERR(priv->dfsdm.base))
		return PTR_ERR(priv->dfsdm.base);

	priv->dfsdm.phys_base = res->start;

	/*
	 * "dfsdm" clock is mandatory for DFSDM peripheral clocking.
	 * "dfsdm" or "audio" clocks can be used as source clock for
	 * the SPI clock out signal and internal processing, depending
	 * on use case.
	 */
	priv->clk = devm_clk_get(&pdev->dev, "dfsdm");
	if (IS_ERR(priv->clk))
		return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),
				     "Failed to get clock\n");

	priv->aclk = devm_clk_get(&pdev->dev, "audio");
	if (IS_ERR(priv->aclk))
		priv->aclk = NULL;

	if (priv->aclk)
		clk_freq = clk_get_rate(priv->aclk);
	else
		clk_freq = clk_get_rate(priv->clk);

	/* SPI clock out frequency */
	ret = of_property_read_u32(pdev->dev.of_node, "spi-max-frequency",
				   &spi_freq);
	if (ret < 0) {
		/* No SPI master mode */
		return 0;
	}

	divider = div_u64_rem(clk_freq, spi_freq, &rem);
	/* Round up divider when ckout isn't precise, not to exceed spi_freq */
	if (rem)
		divider++;

	/* programmable divider is in range of [2:256] */
	if (divider < 2 || divider > 256) {
		dev_err(&pdev->dev, "spi-max-frequency not achievable\n");
		return -EINVAL;
	}

	/* SPI clock output divider is: divider = CKOUTDIV + 1 */
	priv->spi_clk_out_div = divider - 1;
	priv->dfsdm.spi_master_freq = clk_freq / (priv->spi_clk_out_div + 1);

	if (rem) {
		dev_warn(&pdev->dev, "SPI clock not accurate\n");
		dev_warn(&pdev->dev, "%ld = %d * %d + %d\n",
			 clk_freq, spi_freq, priv->spi_clk_out_div + 1, rem);
	}

	return 0;
};

static const struct of_device_id stm32_dfsdm_of_match[] = …;
MODULE_DEVICE_TABLE(of, stm32_dfsdm_of_match);

static int stm32_dfsdm_probe_identification(struct platform_device *pdev,
					    struct dfsdm_priv *priv,
					    const struct stm32_dfsdm_dev_data *dev_data)
{ … }

static int stm32_dfsdm_probe(struct platform_device *pdev)
{ … }

static void stm32_dfsdm_core_remove(struct platform_device *pdev)
{ … }

static int stm32_dfsdm_core_suspend(struct device *dev)
{ … }

static int stm32_dfsdm_core_resume(struct device *dev)
{ … }

static int stm32_dfsdm_core_runtime_suspend(struct device *dev)
{ … }

static int stm32_dfsdm_core_runtime_resume(struct device *dev)
{ … }

static const struct dev_pm_ops stm32_dfsdm_core_pm_ops = …;

static struct platform_driver stm32_dfsdm_driver = …;

module_platform_driver(…) …;

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;