/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2012 Invensense, Inc. */ #ifndef INV_MPU_IIO_H_ #define INV_MPU_IIO_H_ #include <linux/i2c.h> #include <linux/i2c-mux.h> #include <linux/mutex.h> #include <linux/platform_data/invensense_mpu6050.h> #include <linux/regmap.h> #include <linux/iio/buffer.h> #include <linux/iio/common/inv_sensors_timestamp.h> #include <linux/iio/iio.h> #include <linux/iio/kfifo_buf.h> #include <linux/iio/trigger.h> #include <linux/iio/triggered_buffer.h> #include <linux/iio/trigger_consumer.h> #include <linux/iio/sysfs.h> /** * struct inv_mpu6050_reg_map - Notable registers. * @sample_rate_div: Divider applied to gyro output rate. * @lpf: Configures internal low pass filter. * @accel_lpf: Configures accelerometer low pass filter. * @user_ctrl: Enables/resets the FIFO. * @fifo_en: Determines which data will appear in FIFO. * @gyro_config: gyro config register. * @accl_config: accel config register * @fifo_count_h: Upper byte of FIFO count. * @fifo_r_w: FIFO register. * @raw_gyro: Address of first gyro register. * @raw_accl: Address of first accel register. * @temperature: temperature register * @int_enable: Interrupt enable register. * @int_status: Interrupt status register. * @pwr_mgmt_1: Controls chip's power state and clock source. * @pwr_mgmt_2: Controls power state of individual sensors. * @int_pin_cfg; Controls interrupt pin configuration. * @accl_offset: Controls the accelerometer calibration offset. * @gyro_offset: Controls the gyroscope calibration offset. * @i2c_if: Controls the i2c interface */ struct inv_mpu6050_reg_map { … }; /*device enum */ enum inv_devices { … }; /* chip sensors mask: accelerometer, gyroscope, temperature, magnetometer, WoM */ #define INV_MPU6050_SENSOR_ACCL … #define INV_MPU6050_SENSOR_GYRO … #define INV_MPU6050_SENSOR_TEMP … #define INV_MPU6050_SENSOR_MAGN … #define INV_MPU6050_SENSOR_WOM … /** * struct inv_mpu6050_chip_config - Cached chip configuration data. * @clk: selected chip clock * @fsr: Full scale range. * @lpf: Digital low pass filter frequency. * @accl_fs: accel full scale range. * @accl_en: accel engine enabled * @gyro_en: gyro engine enabled * @temp_en: temperature sensor enabled * @magn_en: magn engine (i2c master) enabled * @wom_en: Wake-on-Motion enabled * @accl_fifo_enable: enable accel data output * @gyro_fifo_enable: enable gyro data output * @temp_fifo_enable: enable temp data output * @magn_fifo_enable: enable magn data output * @divider: chip sample rate divider (sample rate divider - 1) * @roc_threshold: save ROC threshold (WoM) set value */ struct inv_mpu6050_chip_config { … }; /* * Maximum of 6 + 6 + 2 + 7 (for MPU9x50) = 21 round up to 24 and plus 8. * May be less if fewer channels are enabled, as long as the timestamp * remains 8 byte aligned */ #define INV_MPU6050_OUTPUT_DATA_SIZE … /** * struct inv_mpu6050_hw - Other important hardware information. * @whoami: Self identification byte from WHO_AM_I register * @name: name of the chip. * @reg: register map of the chip. * @config: configuration of the chip. * @fifo_size: size of the FIFO in bytes. * @temp: offset and scale to apply to raw temperature. */ struct inv_mpu6050_hw { … }; /* * struct inv_mpu6050_state - Driver state variables. * @lock: Chip access lock. * @trig: IIO trigger. * @chip_config: Cached attribute information. * @reg: Map of important registers. * @hw: Other hardware-specific information. * @chip_type: chip type. * @plat_data: platform data (deprecated in favor of @orientation). * @orientation: sensor chip orientation relative to main hardware. * @map regmap pointer. * @irq interrupt number. * @irq_mask the int_pin_cfg mask to configure interrupt type. * @timestamp: timestamping module * @vdd_supply: VDD voltage regulator for the chip. * @vddio_supply I/O voltage regulator for the chip. * @magn_disabled: magnetometer disabled for backward compatibility reason. * @magn_raw_to_gauss: coefficient to convert mag raw value to Gauss. * @magn_orient: magnetometer sensor chip orientation if available. * @suspended_sensors: sensors mask of sensors turned off for suspend * @data: read buffer used for bulk reads. * @it_timestamp: interrupt timestamp. */ struct inv_mpu6050_state { … }; /*register and associated bit definition*/ #define INV_MPU6050_REG_ACCEL_OFFSET … #define INV_MPU6050_REG_GYRO_OFFSET … #define INV_MPU6050_REG_SAMPLE_RATE_DIV … #define INV_MPU6050_REG_CONFIG … #define INV_MPU6050_REG_GYRO_CONFIG … #define INV_MPU6050_REG_ACCEL_CONFIG … #define INV_MPU6050_REG_FIFO_EN … #define INV_MPU6050_BIT_SLAVE_0 … #define INV_MPU6050_BIT_SLAVE_1 … #define INV_MPU6050_BIT_SLAVE_2 … #define INV_MPU6050_BIT_ACCEL_OUT … #define INV_MPU6050_BITS_GYRO_OUT … #define INV_MPU6050_BIT_TEMP_OUT … #define INV_MPU6050_REG_I2C_MST_CTRL … #define INV_MPU6050_BITS_I2C_MST_CLK_400KHZ … #define INV_MPU6050_BIT_I2C_MST_P_NSR … #define INV_MPU6050_BIT_SLV3_FIFO_EN … #define INV_MPU6050_BIT_WAIT_FOR_ES … #define INV_MPU6050_BIT_MULT_MST_EN … /* control I2C slaves from 0 to 3 */ #define INV_MPU6050_REG_I2C_SLV_ADDR(_x) … #define INV_MPU6050_BIT_I2C_SLV_RNW … #define INV_MPU6050_REG_I2C_SLV_REG(_x) … #define INV_MPU6050_REG_I2C_SLV_CTRL(_x) … #define INV_MPU6050_BIT_SLV_GRP … #define INV_MPU6050_BIT_SLV_REG_DIS … #define INV_MPU6050_BIT_SLV_BYTE_SW … #define INV_MPU6050_BIT_SLV_EN … /* I2C master delay register */ #define INV_MPU6050_REG_I2C_SLV4_CTRL … #define INV_MPU6050_BITS_I2C_MST_DLY(_x) … #define INV_MPU6050_REG_I2C_MST_STATUS … #define INV_MPU6050_BIT_I2C_SLV0_NACK … #define INV_MPU6050_BIT_I2C_SLV1_NACK … #define INV_MPU6050_BIT_I2C_SLV2_NACK … #define INV_MPU6050_BIT_I2C_SLV3_NACK … #define INV_MPU6050_REG_INT_ENABLE … #define INV_MPU6050_BIT_DATA_RDY_EN … #define INV_MPU6050_BIT_DMP_INT_EN … #define INV_MPU6500_BIT_WOM_INT_EN … #define INV_ICM20608_BIT_WOM_INT_EN … #define INV_MPU6050_REG_RAW_ACCEL … #define INV_MPU6050_REG_TEMPERATURE … #define INV_MPU6050_REG_RAW_GYRO … #define INV_MPU6050_REG_INT_STATUS … #define INV_MPU6500_BIT_WOM_INT … #define INV_ICM20608_BIT_WOM_INT … #define INV_MPU6050_BIT_FIFO_OVERFLOW_INT … #define INV_MPU6050_BIT_RAW_DATA_RDY_INT … #define INV_MPU6050_REG_EXT_SENS_DATA … /* I2C slaves data output from 0 to 3 */ #define INV_MPU6050_REG_I2C_SLV_DO(_x) … #define INV_MPU6050_REG_I2C_MST_DELAY_CTRL … #define INV_MPU6050_BIT_I2C_SLV0_DLY_EN … #define INV_MPU6050_BIT_I2C_SLV1_DLY_EN … #define INV_MPU6050_BIT_I2C_SLV2_DLY_EN … #define INV_MPU6050_BIT_I2C_SLV3_DLY_EN … #define INV_MPU6050_BIT_DELAY_ES_SHADOW … #define INV_MPU6050_REG_SIGNAL_PATH_RESET … #define INV_MPU6050_BIT_TEMP_RST … #define INV_MPU6050_BIT_ACCEL_RST … #define INV_MPU6050_BIT_GYRO_RST … #define INV_MPU6050_REG_USER_CTRL … #define INV_MPU6050_BIT_SIG_COND_RST … #define INV_MPU6050_BIT_FIFO_RST … #define INV_MPU6050_BIT_DMP_RST … #define INV_MPU6050_BIT_I2C_MST_EN … #define INV_MPU6050_BIT_FIFO_EN … #define INV_MPU6050_BIT_DMP_EN … #define INV_MPU6050_BIT_I2C_IF_DIS … #define INV_MPU6050_REG_PWR_MGMT_1 … #define INV_MPU6050_BIT_H_RESET … #define INV_MPU6050_BIT_SLEEP … #define INV_MPU6050_BIT_CYCLE … #define INV_MPU6050_BIT_TEMP_DIS … #define INV_MPU6050_BIT_CLK_MASK … #define INV_MPU6050_REG_PWR_MGMT_2 … #define INV_MPU6050_BIT_PWR_ACCL_STBY … #define INV_MPU6050_BIT_PWR_GYRO_STBY … /* ICM20609 registers */ #define INV_ICM20609_REG_ACCEL_WOM_X_THR … #define INV_ICM20609_REG_ACCEL_WOM_Y_THR … #define INV_ICM20609_REG_ACCEL_WOM_Z_THR … /* ICM20602 register */ #define INV_ICM20602_REG_I2C_IF … #define INV_ICM20602_BIT_I2C_IF_DIS … #define INV_MPU6050_REG_FIFO_COUNT_H … #define INV_MPU6050_REG_FIFO_R_W … #define INV_MPU6050_BYTES_PER_3AXIS_SENSOR … #define INV_MPU6050_FIFO_COUNT_BYTE … /* MPU9X50 9-axis magnetometer */ #define INV_MPU9X50_BYTES_MAGN … /* FIFO temperature sample size */ #define INV_MPU6050_BYTES_PER_TEMP_SENSOR … /* mpu6500 registers */ #define INV_MPU6500_REG_ACCEL_CONFIG_2 … #define INV_ICM20689_BITS_FIFO_SIZE_MAX … #define INV_MPU6500_REG_LP_ODR … #define INV_MPU6500_REG_WOM_THRESHOLD … #define INV_MPU6500_REG_ACCEL_INTEL_CTRL … #define INV_MPU6500_BIT_ACCEL_INTEL_EN … #define INV_MPU6500_BIT_ACCEL_INTEL_MODE … #define INV_MPU6500_REG_ACCEL_OFFSET … /* delay time in milliseconds */ #define INV_MPU6050_POWER_UP_TIME … #define INV_MPU6050_TEMP_UP_TIME … #define INV_MPU6050_ACCEL_STARTUP_TIME … #define INV_MPU6050_GYRO_STARTUP_TIME … #define INV_MPU6050_GYRO_DOWN_TIME … #define INV_MPU6050_SUSPEND_DELAY_MS … #define INV_MPU6500_GYRO_STARTUP_TIME … #define INV_MPU6500_ACCEL_STARTUP_TIME … #define INV_ICM20602_GYRO_STARTUP_TIME … #define INV_ICM20602_ACCEL_STARTUP_TIME … #define INV_ICM20690_GYRO_STARTUP_TIME … #define INV_ICM20690_ACCEL_STARTUP_TIME … /* delay time in microseconds */ #define INV_MPU6050_REG_UP_TIME_MIN … #define INV_MPU6050_REG_UP_TIME_MAX … #define INV_MPU6050_TEMP_OFFSET … #define INV_MPU6050_TEMP_SCALE … #define INV_MPU6050_MAX_GYRO_FS_PARAM … #define INV_MPU6050_MAX_ACCL_FS_PARAM … #define INV_MPU6050_THREE_AXIS … #define INV_MPU6050_GYRO_CONFIG_FSR_SHIFT … #define INV_ICM20690_GYRO_CONFIG_FSR_SHIFT … #define INV_MPU6050_ACCL_CONFIG_FSR_SHIFT … #define INV_MPU6500_TEMP_OFFSET … #define INV_MPU6500_TEMP_SCALE … #define INV_ICM20608_TEMP_OFFSET … #define INV_ICM20608_TEMP_SCALE … #define INV_MPU6050_REG_INT_PIN_CFG … #define INV_MPU6050_ACTIVE_HIGH … #define INV_MPU6050_ACTIVE_LOW … /* enable level triggering */ #define INV_MPU6050_LATCH_INT_EN … #define INV_MPU6050_BIT_BYPASS_EN … /* Allowed timestamp period jitter in percent */ #define INV_MPU6050_TS_PERIOD_JITTER … /* init parameters */ #define INV_MPU6050_MAX_FIFO_RATE … #define INV_MPU6050_MIN_FIFO_RATE … /* chip internal frequency: 1KHz */ #define INV_MPU6050_INTERNAL_FREQ_HZ … /* return the frequency divider (chip sample rate divider + 1) */ #define INV_MPU6050_FREQ_DIVIDER(st) … /* chip sample rate divider to fifo rate */ #define INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate) … #define INV_MPU6050_DIVIDER_TO_FIFO_RATE(divider) … #define INV_MPU6050_REG_WHOAMI … #define INV_MPU6000_WHOAMI_VALUE … #define INV_MPU6050_WHOAMI_VALUE … #define INV_MPU6500_WHOAMI_VALUE … #define INV_MPU6880_WHOAMI_VALUE … #define INV_MPU9150_WHOAMI_VALUE … #define INV_MPU9250_WHOAMI_VALUE … #define INV_MPU9255_WHOAMI_VALUE … #define INV_MPU6515_WHOAMI_VALUE … #define INV_ICM20608_WHOAMI_VALUE … #define INV_ICM20608D_WHOAMI_VALUE … #define INV_ICM20609_WHOAMI_VALUE … #define INV_ICM20689_WHOAMI_VALUE … #define INV_ICM20600_WHOAMI_VALUE … #define INV_ICM20602_WHOAMI_VALUE … #define INV_ICM20690_WHOAMI_VALUE … #define INV_IAM20680_WHOAMI_VALUE … /* scan element definition for generic MPU6xxx devices */ enum inv_mpu6050_scan { … }; enum inv_mpu6050_filter_e { … }; enum inv_mpu6050_lposc_e { … }; /* IIO attribute address */ enum INV_MPU6050_IIO_ATTR_ADDR { … }; enum inv_mpu6050_accl_fs_e { … }; enum inv_mpu6050_fsr_e { … }; enum inv_mpu6050_clock_sel_e { … }; irqreturn_t inv_mpu6050_read_fifo(int irq, void *p); int inv_mpu6050_probe_trigger(struct iio_dev *indio_dev, int irq_type); int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable); int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, unsigned int mask); int inv_mpu_acpi_create_mux_client(struct i2c_client *client); void inv_mpu_acpi_delete_mux_client(struct i2c_client *client); int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type); extern const struct dev_pm_ops inv_mpu_pmops; #endif
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