linux/drivers/iio/imu/adis16480.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * ADIS16480 and similar IMUs driver
 *
 * Copyright 2012 Analog Devices Inc.
 */

#include <linux/clk.h>
#include <linux/bitfield.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/math.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/lcm.h>
#include <linux/property.h>
#include <linux/swab.h>
#include <linux/crc32.h>

#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/imu/adis.h>
#include <linux/iio/trigger_consumer.h>

#include <linux/debugfs.h>

#define ADIS16480_PAGE_SIZE

#define ADIS16480_REG(page, reg)

#define ADIS16480_REG_PAGE_ID
#define ADIS16480_REG_SEQ_CNT
#define ADIS16480_REG_SYS_E_FLA
#define ADIS16480_REG_DIAG_STS
#define ADIS16480_REG_ALM_STS
#define ADIS16480_REG_TEMP_OUT
#define ADIS16480_REG_X_GYRO_OUT
#define ADIS16480_REG_Y_GYRO_OUT
#define ADIS16480_REG_Z_GYRO_OUT
#define ADIS16480_REG_X_ACCEL_OUT
#define ADIS16480_REG_Y_ACCEL_OUT
#define ADIS16480_REG_Z_ACCEL_OUT
#define ADIS16480_REG_X_MAGN_OUT
#define ADIS16480_REG_Y_MAGN_OUT
#define ADIS16480_REG_Z_MAGN_OUT
#define ADIS16480_REG_BAROM_OUT
#define ADIS16480_REG_X_DELTAANG_OUT
#define ADIS16480_REG_Y_DELTAANG_OUT
#define ADIS16480_REG_Z_DELTAANG_OUT
#define ADIS16480_REG_X_DELTAVEL_OUT
#define ADIS16480_REG_Y_DELTAVEL_OUT
#define ADIS16480_REG_Z_DELTAVEL_OUT
#define ADIS16480_REG_PROD_ID

#define ADIS16480_REG_X_GYRO_SCALE
#define ADIS16480_REG_Y_GYRO_SCALE
#define ADIS16480_REG_Z_GYRO_SCALE
#define ADIS16480_REG_X_ACCEL_SCALE
#define ADIS16480_REG_Y_ACCEL_SCALE
#define ADIS16480_REG_Z_ACCEL_SCALE
#define ADIS16480_REG_X_GYRO_BIAS
#define ADIS16480_REG_Y_GYRO_BIAS
#define ADIS16480_REG_Z_GYRO_BIAS
#define ADIS16480_REG_X_ACCEL_BIAS
#define ADIS16480_REG_Y_ACCEL_BIAS
#define ADIS16480_REG_Z_ACCEL_BIAS
#define ADIS16480_REG_X_HARD_IRON
#define ADIS16480_REG_Y_HARD_IRON
#define ADIS16480_REG_Z_HARD_IRON
#define ADIS16480_REG_BAROM_BIAS
#define ADIS16480_REG_FLASH_CNT

#define ADIS16480_REG_GLOB_CMD
#define ADIS16480_REG_FNCTIO_CTRL
#define ADIS16480_REG_GPIO_CTRL
#define ADIS16480_REG_CONFIG
#define ADIS16480_REG_DEC_RATE
#define ADIS16480_REG_SLP_CNT
#define ADIS16480_REG_FILTER_BNK0
#define ADIS16480_REG_FILTER_BNK1
#define ADIS16480_REG_ALM_CNFG0
#define ADIS16480_REG_ALM_CNFG1
#define ADIS16480_REG_ALM_CNFG2
#define ADIS16480_REG_XG_ALM_MAGN
#define ADIS16480_REG_YG_ALM_MAGN
#define ADIS16480_REG_ZG_ALM_MAGN
#define ADIS16480_REG_XA_ALM_MAGN
#define ADIS16480_REG_YA_ALM_MAGN
#define ADIS16480_REG_ZA_ALM_MAGN
#define ADIS16480_REG_XM_ALM_MAGN
#define ADIS16480_REG_YM_ALM_MAGN
#define ADIS16480_REG_ZM_ALM_MAGN
#define ADIS16480_REG_BR_ALM_MAGN
#define ADIS16480_REG_FIRM_REV
#define ADIS16480_REG_FIRM_DM
#define ADIS16480_REG_FIRM_Y

/*
 * External clock scaling in PPS mode.
 * Available only for ADIS1649x devices
 */
#define ADIS16495_REG_SYNC_SCALE
#define ADIS16495_REG_BURST_CMD
#define ADIS16495_GYRO_ACCEL_BURST_ID
#define ADIS16545_DELTA_ANG_VEL_BURST_ID
/* total number of segments in burst */
#define ADIS16495_BURST_MAX_DATA

#define ADIS16480_REG_SERIAL_NUM

/* Each filter coefficent bank spans two pages */
#define ADIS16480_FIR_COEF(page)
#define ADIS16480_FIR_COEF_A(x)
#define ADIS16480_FIR_COEF_B(x)
#define ADIS16480_FIR_COEF_C(x)
#define ADIS16480_FIR_COEF_D(x)

/* ADIS16480_REG_FNCTIO_CTRL */
#define ADIS16480_DRDY_SEL_MSK
#define ADIS16480_DRDY_SEL(x)
#define ADIS16480_DRDY_POL_MSK
#define ADIS16480_DRDY_POL(x)
#define ADIS16480_DRDY_EN_MSK
#define ADIS16480_DRDY_EN(x)
#define ADIS16480_SYNC_SEL_MSK
#define ADIS16480_SYNC_SEL(x)
#define ADIS16480_SYNC_EN_MSK
#define ADIS16480_SYNC_EN(x)
#define ADIS16480_SYNC_MODE_MSK
#define ADIS16480_SYNC_MODE(x)

#define ADIS16545_BURST_DATA_SEL_0_CHN_MASK
#define ADIS16545_BURST_DATA_SEL_1_CHN_MASK
#define ADIS16545_BURST_DATA_SEL_MASK

struct adis16480_chip_info {};

enum adis16480_int_pin {};

enum adis16480_clock_mode {};

struct adis16480 {};

static const char * const adis16480_int_pin_names[4] =;

static bool low_rate_allow;
module_param(low_rate_allow, bool, 0444);
MODULE_PARM_DESC();

#ifdef CONFIG_DEBUG_FS

static ssize_t adis16480_show_firmware_revision(struct file *file,
		char __user *userbuf, size_t count, loff_t *ppos)
{}

static const struct file_operations adis16480_firmware_revision_fops =;

static ssize_t adis16480_show_firmware_date(struct file *file,
		char __user *userbuf, size_t count, loff_t *ppos)
{}

static const struct file_operations adis16480_firmware_date_fops =;

static int adis16480_show_serial_number(void *arg, u64 *val)
{}
DEFINE_DEBUGFS_ATTRIBUTE();

static int adis16480_show_product_id(void *arg, u64 *val)
{}
DEFINE_DEBUGFS_ATTRIBUTE();

static int adis16480_show_flash_count(void *arg, u64 *val)
{}
DEFINE_DEBUGFS_ATTRIBUTE();

static int adis16480_debugfs_init(struct iio_dev *indio_dev)
{}

#else

static int adis16480_debugfs_init(struct iio_dev *indio_dev)
{
	return 0;
}

#endif

static int adis16480_set_freq(struct iio_dev *indio_dev, int val, int val2)
{}

static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2)
{}

enum {};

static const unsigned int adis16480_calibbias_regs[] =;

static const unsigned int adis16480_calibscale_regs[] =;

static int adis16480_set_calibbias(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int bias)
{}

static int adis16480_get_calibbias(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int *bias)
{}

static int adis16480_set_calibscale(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int scale)
{}

static int adis16480_get_calibscale(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int *scale)
{}

static const unsigned int adis16480_def_filter_freqs[] =;

static const unsigned int adis16495_def_filter_freqs[] =;

static const unsigned int ad16480_filter_data[][2] =;

static int adis16480_get_filter_freq(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int *freq)
{}

static int adis16480_set_filter_freq(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, unsigned int freq)
{}

static int adis16480_read_raw(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int *val, int *val2, long info)
{}

static int adis16480_write_raw(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, int val, int val2, long info)
{}

#define ADIS16480_MOD_CHANNEL(_type, _mod, _address, _si, _info_sep, _bits)

#define ADIS16480_GYRO_CHANNEL(_mod)

#define ADIS16480_ACCEL_CHANNEL(_mod)

#define ADIS16480_DELTANG_CHANNEL(_mod)

#define ADIS16480_DELTANG_CHANNEL_NO_SCAN(_mod)

#define ADIS16480_DELTVEL_CHANNEL(_mod)

#define ADIS16480_DELTVEL_CHANNEL_NO_SCAN(_mod)

#define ADIS16480_MAGN_CHANNEL(_mod)

#define ADIS16480_PRESSURE_CHANNEL()

#define ADIS16480_TEMP_CHANNEL()

static const struct iio_chan_spec adis16480_channels[] =;

static const struct iio_chan_spec adis16485_channels[] =;

static const struct iio_chan_spec adis16545_channels[] =;

enum adis16480_variant {};

#define ADIS16480_DIAG_STAT_XGYRO_FAIL
#define ADIS16480_DIAG_STAT_YGYRO_FAIL
#define ADIS16480_DIAG_STAT_ZGYRO_FAIL
#define ADIS16480_DIAG_STAT_XACCL_FAIL
#define ADIS16480_DIAG_STAT_YACCL_FAIL
#define ADIS16480_DIAG_STAT_ZACCL_FAIL
#define ADIS16480_DIAG_STAT_XMAGN_FAIL
#define ADIS16480_DIAG_STAT_YMAGN_FAIL
#define ADIS16480_DIAG_STAT_ZMAGN_FAIL
#define ADIS16480_DIAG_STAT_BARO_FAIL

static const char * const adis16480_status_error_msgs[] =;

static int adis16480_enable_irq(struct adis *adis, bool enable);

#define ADIS16480_DATA(_prod_id, _timeouts, _burst_len, _burst_max_speed)

static const struct adis_timeout adis16485_timeouts =;

static const struct adis_timeout adis16480_timeouts =;

static const struct adis_timeout adis16495_timeouts =;

static const struct adis_timeout adis16495_1_timeouts =;

static const struct adis_timeout adis16545_timeouts =;

static const struct adis16480_chip_info adis16480_chip_info[] =;

static bool adis16480_validate_crc(const u16 *buf, const u8 n_elem, const u32 crc)
{}

static irqreturn_t adis16480_trigger_handler(int irq, void *p)
{}

static const unsigned long adis16545_channel_masks[] =;

static int adis16480_update_scan_mode(struct iio_dev *indio_dev,
				      const unsigned long *scan_mask)
{}

static const struct iio_info adis16480_info =;

static int adis16480_stop_device(struct iio_dev *indio_dev)
{}

static int adis16480_enable_irq(struct adis *adis, bool enable)
{}

static int adis16480_config_irq_pin(struct adis16480 *st)
{}

static int adis16480_fw_get_ext_clk_pin(struct adis16480 *st)
{}

static int adis16480_ext_clk_config(struct adis16480 *st, bool enable)
{}

static int adis16480_get_ext_clocks(struct adis16480 *st)
{}

static void adis16480_stop(void *data)
{}

static void adis16480_clk_disable(void *data)
{}

static int adis16480_probe(struct spi_device *spi)
{}

static const struct spi_device_id adis16480_ids[] =;
MODULE_DEVICE_TABLE(spi, adis16480_ids);

static const struct of_device_id adis16480_of_match[] =;
MODULE_DEVICE_TABLE(of, adis16480_of_match);

static struct spi_driver adis16480_driver =;
module_spi_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_IMPORT_NS();