// SPDX-License-Identifier: GPL-2.0 /* * Copyright 2021 Google LLC. * * Driver for Semtech's SX9324 capacitive proximity/button solution. * Based on SX9324 driver and copy of datasheet at: * https://edit.wpgdadawant.com/uploads/news_file/program/2019/30184/tech_files/program_30184_suggest_other_file.pdf */ #include <linux/acpi.h> #include <linux/bits.h> #include <linux/bitfield.h> #include <linux/delay.h> #include <linux/i2c.h> #include <linux/interrupt.h> #include <linux/kernel.h> #include <linux/log2.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/pm.h> #include <linux/property.h> #include <linux/regmap.h> #include <linux/iio/iio.h> #include "sx_common.h" /* Register definitions. */ #define SX9324_REG_IRQ_SRC … #define SX9324_REG_STAT0 … #define SX9324_REG_STAT1 … #define SX9324_REG_STAT2 … #define SX9324_REG_STAT2_COMPSTAT_MASK … #define SX9324_REG_STAT3 … #define SX9324_REG_IRQ_MSK … #define SX9324_CONVDONE_IRQ … #define SX9324_FAR_IRQ … #define SX9324_CLOSE_IRQ … #define SX9324_REG_IRQ_CFG0 … #define SX9324_REG_IRQ_CFG1 … #define SX9324_REG_IRQ_CFG1_FAILCOND … #define SX9324_REG_IRQ_CFG2 … #define SX9324_REG_GNRL_CTRL0 … #define SX9324_REG_GNRL_CTRL0_SCANPERIOD_MASK … #define SX9324_REG_GNRL_CTRL0_SCANPERIOD_100MS … #define SX9324_REG_GNRL_CTRL1 … #define SX9324_REG_GNRL_CTRL1_PHEN_MASK … #define SX9324_REG_GNRL_CTRL1_PAUSECTRL … #define SX9324_REG_I2C_ADDR … #define SX9324_REG_CLK_SPRD … #define SX9324_REG_AFE_CTRL0 … #define SX9324_REG_AFE_CTRL0_RINT_SHIFT … #define SX9324_REG_AFE_CTRL0_RINT_MASK … #define SX9324_REG_AFE_CTRL0_RINT_LOWEST … #define SX9324_REG_AFE_CTRL0_CSIDLE_SHIFT … #define SX9324_REG_AFE_CTRL0_CSIDLE_MASK … #define SX9324_REG_AFE_CTRL0_RINT_LOWEST … #define SX9324_REG_AFE_CTRL1 … #define SX9324_REG_AFE_CTRL2 … #define SX9324_REG_AFE_CTRL3 … #define SX9324_REG_AFE_CTRL4 … #define SX9324_REG_AFE_CTRL4_FREQ_83_33HZ … #define SX9324_REG_AFE_CTRL4_RESOLUTION_MASK … #define SX9324_REG_AFE_CTRL4_RES_100 … #define SX9324_REG_AFE_CTRL5 … #define SX9324_REG_AFE_CTRL6 … #define SX9324_REG_AFE_CTRL7 … #define SX9324_REG_AFE_PH0 … #define SX9324_REG_AFE_PH0_PIN_MASK(_pin) … #define SX9324_REG_AFE_PH1 … #define SX9324_REG_AFE_PH2 … #define SX9324_REG_AFE_PH3 … #define SX9324_REG_AFE_CTRL8 … #define SX9324_REG_AFE_CTRL8_RESERVED … #define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM … #define SX9324_REG_AFE_CTRL8_RESFILTIN_MASK … #define SX9324_REG_AFE_CTRL9 … #define SX9324_REG_AFE_CTRL9_AGAIN_MASK … #define SX9324_REG_AFE_CTRL9_AGAIN_1 … #define SX9324_REG_PROX_CTRL0 … #define SX9324_REG_PROX_CTRL0_GAIN_MASK … #define SX9324_REG_PROX_CTRL0_GAIN_SHIFT … #define SX9324_REG_PROX_CTRL0_GAIN_RSVD … #define SX9324_REG_PROX_CTRL0_GAIN_1 … #define SX9324_REG_PROX_CTRL0_GAIN_8 … #define SX9324_REG_PROX_CTRL0_RAWFILT_MASK … #define SX9324_REG_PROX_CTRL0_RAWFILT_1P50 … #define SX9324_REG_PROX_CTRL1 … #define SX9324_REG_PROX_CTRL2 … #define SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K … #define SX9324_REG_PROX_CTRL3 … #define SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES … #define SX9324_REG_PROX_CTRL3_AVGPOS_THRESH_16K … #define SX9324_REG_PROX_CTRL4 … #define SX9324_REG_PROX_CTRL4_AVGNEGFILT_MASK … #define SX9324_REG_PROX_CTRL4_AVGNEG_FILT_2 … #define SX9324_REG_PROX_CTRL4_AVGPOSFILT_MASK … #define SX9324_REG_PROX_CTRL4_AVGPOS_FILT_256 … #define SX9324_REG_PROX_CTRL5 … #define SX9324_REG_PROX_CTRL5_HYST_MASK … #define SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK … #define SX9324_REG_PROX_CTRL5_FAR_DEBOUNCE_MASK … #define SX9324_REG_PROX_CTRL6 … #define SX9324_REG_PROX_CTRL6_PROXTHRESH_32 … #define SX9324_REG_PROX_CTRL7 … #define SX9324_REG_ADV_CTRL0 … #define SX9324_REG_ADV_CTRL1 … #define SX9324_REG_ADV_CTRL2 … #define SX9324_REG_ADV_CTRL3 … #define SX9324_REG_ADV_CTRL4 … #define SX9324_REG_ADV_CTRL5 … #define SX9324_REG_ADV_CTRL5_STARTUPSENS_MASK … #define SX9324_REG_ADV_CTRL5_STARTUP_SENSOR_1 … #define SX9324_REG_ADV_CTRL5_STARTUP_METHOD_1 … #define SX9324_REG_ADV_CTRL6 … #define SX9324_REG_ADV_CTRL7 … #define SX9324_REG_ADV_CTRL8 … #define SX9324_REG_ADV_CTRL9 … #define SX9324_REG_ADV_CTRL10 … #define SX9324_REG_ADV_CTRL11 … #define SX9324_REG_ADV_CTRL12 … #define SX9324_REG_ADV_CTRL13 … #define SX9324_REG_ADV_CTRL14 … #define SX9324_REG_ADV_CTRL15 … #define SX9324_REG_ADV_CTRL16 … #define SX9324_REG_ADV_CTRL17 … #define SX9324_REG_ADV_CTRL18 … #define SX9324_REG_ADV_CTRL19 … #define SX9324_REG_ADV_CTRL20 … #define SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION … #define SX9324_REG_PHASE_SEL … #define SX9324_REG_USEFUL_MSB … #define SX9324_REG_USEFUL_LSB … #define SX9324_REG_AVG_MSB … #define SX9324_REG_AVG_LSB … #define SX9324_REG_DIFF_MSB … #define SX9324_REG_DIFF_LSB … #define SX9324_REG_OFFSET_MSB … #define SX9324_REG_OFFSET_LSB … #define SX9324_REG_SAR_MSB … #define SX9324_REG_SAR_LSB … #define SX9324_REG_RESET … /* Write this to REG_RESET to do a soft reset. */ #define SX9324_SOFT_RESET … #define SX9324_REG_WHOAMI … #define SX9324_WHOAMI_VALUE … #define SX9324_REG_REVISION … /* 4 channels, as defined in STAT0: PH0, PH1, PH2 and PH3. */ #define SX9324_NUM_CHANNELS … /* 3 CS pins: CS0, CS1, CS2. */ #define SX9324_NUM_PINS … static const char * const sx9324_cs_pin_usage[] = …; static ssize_t sx9324_phase_configuration_show(struct iio_dev *indio_dev, uintptr_t private, const struct iio_chan_spec *chan, char *buf) { … } static const struct iio_chan_spec_ext_info sx9324_channel_ext_info[] = …; #define SX9324_CHANNEL(idx) … static const struct iio_chan_spec sx9324_channels[] = …; /* * Each entry contains the integer part (val) and the fractional part, in micro * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO. */ static const struct { … } sx9324_samp_freq_table[] = …; static const unsigned int sx9324_scan_period_table[] = …; static const struct regmap_range sx9324_writable_reg_ranges[] = …; static const struct regmap_access_table sx9324_writeable_regs = …; /* * All allocated registers are readable, so we just list unallocated * ones. */ static const struct regmap_range sx9324_non_readable_reg_ranges[] = …; static const struct regmap_access_table sx9324_readable_regs = …; static const struct regmap_range sx9324_volatile_reg_ranges[] = …; static const struct regmap_access_table sx9324_volatile_regs = …; static const struct regmap_config sx9324_regmap_config = …; static int sx9324_read_prox_data(struct sx_common_data *data, const struct iio_chan_spec *chan, __be16 *val) { … } /* * If we have no interrupt support, we have to wait for a scan period * after enabling a channel to get a result. */ static int sx9324_wait_for_sample(struct sx_common_data *data) { … } static int sx9324_read_gain(struct sx_common_data *data, const struct iio_chan_spec *chan, int *val) { … } static int sx9324_read_samp_freq(struct sx_common_data *data, int *val, int *val2) { … } static int sx9324_read_raw(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val, int *val2, long mask) { … } static const int sx9324_gain_vals[] = …; static int sx9324_read_avail(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, const int **vals, int *type, int *length, long mask) { … } static int sx9324_set_samp_freq(struct sx_common_data *data, int val, int val2) { … } static int sx9324_read_thresh(struct sx_common_data *data, const struct iio_chan_spec *chan, int *val) { … } static int sx9324_read_hysteresis(struct sx_common_data *data, const struct iio_chan_spec *chan, int *val) { … } static int sx9324_read_far_debounce(struct sx_common_data *data, int *val) { … } static int sx9324_read_close_debounce(struct sx_common_data *data, int *val) { … } static int sx9324_read_event_val(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) { … } static int sx9324_write_thresh(struct sx_common_data *data, const struct iio_chan_spec *chan, int _val) { … } static int sx9324_write_hysteresis(struct sx_common_data *data, const struct iio_chan_spec *chan, int _val) { … } static int sx9324_write_far_debounce(struct sx_common_data *data, int _val) { … } static int sx9324_write_close_debounce(struct sx_common_data *data, int _val) { … } static int sx9324_write_event_val(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2) { … } static int sx9324_write_gain(struct sx_common_data *data, const struct iio_chan_spec *chan, int val) { … } static int sx9324_write_raw(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int val, int val2, long mask) { … } static const struct sx_common_reg_default sx9324_default_regs[] = …; /* Activate all channels and perform an initial compensation. */ static int sx9324_init_compensation(struct iio_dev *indio_dev) { … } static u8 sx9324_parse_phase_prop(struct device *dev, struct sx_common_reg_default *reg_def, const char *prop) { … } static const struct sx_common_reg_default * sx9324_get_default_reg(struct device *dev, int idx, struct sx_common_reg_default *reg_def) { … } static int sx9324_check_whoami(struct device *dev, struct iio_dev *indio_dev) { … } static const struct sx_common_chip_info sx9324_chip_info = …; static int sx9324_probe(struct i2c_client *client) { … } static int sx9324_suspend(struct device *dev) { … } static int sx9324_resume(struct device *dev) { … } static DEFINE_SIMPLE_DEV_PM_OPS(sx9324_pm_ops, sx9324_suspend, sx9324_resume); static const struct acpi_device_id sx9324_acpi_match[] = …; MODULE_DEVICE_TABLE(acpi, sx9324_acpi_match); static const struct of_device_id sx9324_of_match[] = …; MODULE_DEVICE_TABLE(of, sx9324_of_match); static const struct i2c_device_id sx9324_id[] = …; MODULE_DEVICE_TABLE(i2c, sx9324_id); static struct i2c_driver sx9324_driver = …; module_i2c_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_IMPORT_NS(…);
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