// SPDX-License-Identifier: GPL-2.0 /* * Copyright 2020 HabanaLabs, Ltd. * All Rights Reserved. */ #include "habanalabs.h" static const char * const hl_glbl_error_cause[] = …; /** * hl_get_pb_block - return the relevant block within the block array * * @hdev: pointer to hl_device structure * @mm_reg_addr: register address in the desired block * @pb_blocks: blocks array * @array_size: blocks array size * */ static int hl_get_pb_block(struct hl_device *hdev, u32 mm_reg_addr, const u32 pb_blocks[], int array_size) { … } /** * hl_unset_pb_in_block - clear a specific protection bit in a block * * @hdev: pointer to hl_device structure * @reg_offset: register offset will be converted to bit offset in pb block * @sgs_entry: pb array * */ static int hl_unset_pb_in_block(struct hl_device *hdev, u32 reg_offset, struct hl_block_glbl_sec *sgs_entry) { … } /** * hl_unsecure_register - locate the relevant block for this register and * remove corresponding protection bit * * @hdev: pointer to hl_device structure * @mm_reg_addr: register address to unsecure * @offset: additional offset to the register address * @pb_blocks: blocks array * @sgs_array: pb array * @array_size: blocks array size * */ int hl_unsecure_register(struct hl_device *hdev, u32 mm_reg_addr, int offset, const u32 pb_blocks[], struct hl_block_glbl_sec sgs_array[], int array_size) { … } /** * hl_unsecure_register_range - locate the relevant block for this register * range and remove corresponding protection bit * * @hdev: pointer to hl_device structure * @mm_reg_range: register address range to unsecure * @offset: additional offset to the register address * @pb_blocks: blocks array * @sgs_array: pb array * @array_size: blocks array size * */ static int hl_unsecure_register_range(struct hl_device *hdev, struct range mm_reg_range, int offset, const u32 pb_blocks[], struct hl_block_glbl_sec sgs_array[], int array_size) { … } /** * hl_unsecure_registers - locate the relevant block for all registers and * remove corresponding protection bit * * @hdev: pointer to hl_device structure * @mm_reg_array: register address array to unsecure * @mm_array_size: register array size * @offset: additional offset to the register address * @pb_blocks: blocks array * @sgs_array: pb array * @blocks_array_size: blocks array size * */ int hl_unsecure_registers(struct hl_device *hdev, const u32 mm_reg_array[], int mm_array_size, int offset, const u32 pb_blocks[], struct hl_block_glbl_sec sgs_array[], int blocks_array_size) { … } /** * hl_unsecure_registers_range - locate the relevant block for all register * ranges and remove corresponding protection bit * * @hdev: pointer to hl_device structure * @mm_reg_range_array: register address range array to unsecure * @mm_array_size: register array size * @offset: additional offset to the register address * @pb_blocks: blocks array * @sgs_array: pb array * @blocks_array_size: blocks array size * */ static int hl_unsecure_registers_range(struct hl_device *hdev, const struct range mm_reg_range_array[], int mm_array_size, int offset, const u32 pb_blocks[], struct hl_block_glbl_sec sgs_array[], int blocks_array_size) { … } /** * hl_ack_pb_security_violations - Ack security violation * * @hdev: pointer to hl_device structure * @pb_blocks: blocks array * @block_offset: additional offset to the block * @array_size: blocks array size * */ static void hl_ack_pb_security_violations(struct hl_device *hdev, const u32 pb_blocks[], u32 block_offset, int array_size) { … } /** * hl_config_glbl_sec - set pb in HW according to given pb array * * @hdev: pointer to hl_device structure * @pb_blocks: blocks array * @sgs_array: pb array * @block_offset: additional offset to the block * @array_size: blocks array size * */ void hl_config_glbl_sec(struct hl_device *hdev, const u32 pb_blocks[], struct hl_block_glbl_sec sgs_array[], u32 block_offset, int array_size) { … } /** * hl_secure_block - locally memsets a block to 0 * * @hdev: pointer to hl_device structure * @sgs_array: pb array to clear * @array_size: blocks array size * */ void hl_secure_block(struct hl_device *hdev, struct hl_block_glbl_sec sgs_array[], int array_size) { … } /** * hl_init_pb_with_mask - set selected pb instances with mask in HW according * to given configuration * * @hdev: pointer to hl_device structure * @num_dcores: number of decores to apply configuration to * set to HL_PB_SHARED if need to apply only once * @dcore_offset: offset between dcores * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * @user_regs_array: unsecured register array * @user_regs_array_size: unsecured register array size * @mask: enabled instances mask: 1- enabled, 0- disabled */ int hl_init_pb_with_mask(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size, const u32 *user_regs_array, u32 user_regs_array_size, u64 mask) { … } /** * hl_init_pb - set pb in HW according to given configuration * * @hdev: pointer to hl_device structure * @num_dcores: number of decores to apply configuration to * set to HL_PB_SHARED if need to apply only once * @dcore_offset: offset between dcores * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * @user_regs_array: unsecured register array * @user_regs_array_size: unsecured register array size * */ int hl_init_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size, const u32 *user_regs_array, u32 user_regs_array_size) { … } /** * hl_init_pb_ranges_with_mask - set pb instances using mask in HW according to * given configuration unsecurring registers * ranges instead of specific registers * * @hdev: pointer to hl_device structure * @num_dcores: number of decores to apply configuration to * set to HL_PB_SHARED if need to apply only once * @dcore_offset: offset between dcores * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * @user_regs_range_array: unsecured register range array * @user_regs_range_array_size: unsecured register range array size * @mask: enabled instances mask: 1- enabled, 0- disabled */ int hl_init_pb_ranges_with_mask(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size, const struct range *user_regs_range_array, u32 user_regs_range_array_size, u64 mask) { … } /** * hl_init_pb_ranges - set pb in HW according to given configuration unsecurring * registers ranges instead of specific registers * * @hdev: pointer to hl_device structure * @num_dcores: number of decores to apply configuration to * set to HL_PB_SHARED if need to apply only once * @dcore_offset: offset between dcores * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * @user_regs_range_array: unsecured register range array * @user_regs_range_array_size: unsecured register range array size * */ int hl_init_pb_ranges(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size, const struct range *user_regs_range_array, u32 user_regs_range_array_size) { … } /** * hl_init_pb_single_dcore - set pb for a single docre in HW * according to given configuration * * @hdev: pointer to hl_device structure * @dcore_offset: offset from the dcore0 * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * @user_regs_array: unsecured register array * @user_regs_array_size: unsecured register array size * */ int hl_init_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size, const u32 *user_regs_array, u32 user_regs_array_size) { … } /** * hl_init_pb_ranges_single_dcore - set pb for a single docre in HW according * to given configuration unsecurring * registers ranges instead of specific * registers * * @hdev: pointer to hl_device structure * @dcore_offset: offset from the dcore0 * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * @user_regs_range_array: unsecured register range array * @user_regs_range_array_size: unsecured register range array size * */ int hl_init_pb_ranges_single_dcore(struct hl_device *hdev, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size, const struct range *user_regs_range_array, u32 user_regs_range_array_size) { … } /** * hl_ack_pb_with_mask - ack pb with mask in HW according to given configuration * * @hdev: pointer to hl_device structure * @num_dcores: number of decores to apply configuration to * set to HL_PB_SHARED if need to apply only once * @dcore_offset: offset between dcores * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * @mask: enabled instances mask: 1- enabled, 0- disabled * */ void hl_ack_pb_with_mask(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size, u64 mask) { … } /** * hl_ack_pb - ack pb in HW according to given configuration * * @hdev: pointer to hl_device structure * @num_dcores: number of decores to apply configuration to * set to HL_PB_SHARED if need to apply only once * @dcore_offset: offset between dcores * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * */ void hl_ack_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size) { … } /** * hl_ack_pb_single_dcore - ack pb for single docre in HW * according to given configuration * * @hdev: pointer to hl_device structure * @dcore_offset: offset from dcore0 * @num_instances: number of instances to apply configuration to * @instance_offset: offset between instances * @pb_blocks: blocks array * @blocks_array_size: blocks array size * */ void hl_ack_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset, u32 num_instances, u32 instance_offset, const u32 pb_blocks[], u32 blocks_array_size) { … } static u32 hl_automated_get_block_base_addr(struct hl_device *hdev, struct hl_special_block_info *block_info, u32 major, u32 minor, u32 sub_minor) { … } static bool hl_check_block_type_exclusion(struct hl_skip_blocks_cfg *skip_blocks_cfg, int block_type) { … } static bool hl_check_block_range_exclusion(struct hl_device *hdev, struct hl_skip_blocks_cfg *skip_blocks_cfg, struct hl_special_block_info *block_info, u32 major, u32 minor, u32 sub_minor) { … } static int hl_read_glbl_errors(struct hl_device *hdev, u32 blk_idx, u32 major, u32 minor, u32 sub_minor, void *data) { … } void hl_check_for_glbl_errors(struct hl_device *hdev) { … } int hl_iterate_special_blocks(struct hl_device *hdev, struct iterate_special_ctx *ctx) { … }