/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2018 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef GAUDI_BLOCKS_H_ #define GAUDI_BLOCKS_H_ #define mmNIC0_PHY0_BASE … #define NIC0_PHY0_MAX_OFFSET … #define mmMME0_ACC_BASE … #define MME0_ACC_MAX_OFFSET … #define MME0_ACC_SECTION … #define mmMME0_SBAB_BASE … #define MME0_SBAB_MAX_OFFSET … #define MME0_SBAB_SECTION … #define mmMME0_PRTN_BASE … #define MME0_PRTN_MAX_OFFSET … #define MME0_PRTN_SECTION … #define mmMME0_CTRL_BASE … #define MME0_CTRL_MAX_OFFSET … #define MME0_CTRL_SECTION … #define mmARCH_MME0_CTRL_BASE … #define ARCH_MME0_CTRL_MAX_OFFSET … #define ARCH_MME0_CTRL_SECTION … #define mmARCH_TENSOR_S_MME0_CTRL_BASE … #define ARCH_TENSOR_S_MME0_CTRL_MAX_OFFSET … #define ARCH_TENSOR_S_MME0_CTRL_SECTION … #define mmARCH_AGU_S_MME0_CTRL_BASE … #define ARCH_AGU_S_MME0_CTRL_MAX_OFFSET … #define ARCH_AGU_S_MME0_CTRL_SECTION … #define mmARCH_TENSOR_L_MME0_CTRL_BASE … #define ARCH_TENSOR_L_MME0_CTRL_MAX_OFFSET … #define ARCH_TENSOR_L_MME0_CTRL_SECTION … #define mmARCH_AGU_L_LOCAL_MME0_CTRL_BASE … #define ARCH_AGU_L_LOCAL_MME0_CTRL_MAX_OFFSET … #define ARCH_AGU_L_LOCAL_MME0_CTRL_SECTION … #define mmARCH_AGU_L_REMOTE_MME0_CTRL_BASE … #define ARCH_AGU_L_REMOTE_MME0_CTRL_MAX_OFFSET … #define ARCH_AGU_L_REMOTE_MME0_CTRL_SECTION … #define mmARCH_TENSOR_O_MME0_CTRL_BASE … #define ARCH_TENSOR_O_MME0_CTRL_MAX_OFFSET … #define ARCH_TENSOR_O_MME0_CTRL_SECTION … #define mmARCH_AGU_O_LOCAL_MME0_CTRL_BASE … #define ARCH_AGU_O_LOCAL_MME0_CTRL_MAX_OFFSET … #define ARCH_AGU_O_LOCAL_MME0_CTRL_SECTION … #define mmARCH_AGU_O_REMOTE_MME0_CTRL_BASE … #define ARCH_AGU_O_REMOTE_MME0_CTRL_MAX_OFFSET … #define ARCH_AGU_O_REMOTE_MME0_CTRL_SECTION … #define mmARCH_DESC_MME0_CTRL_BASE … #define ARCH_DESC_MME0_CTRL_MAX_OFFSET … #define ARCH_DESC_MME0_CTRL_SECTION … #define mmSHADOW_0_MME0_CTRL_BASE … #define SHADOW_0_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_MME0_CTRL_SECTION … #define mmSHADOW_0_TENSOR_S_MME0_CTRL_BASE … #define SHADOW_0_TENSOR_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_S_MME0_CTRL_SECTION … #define mmSHADOW_0_AGU_S_MME0_CTRL_BASE … #define SHADOW_0_AGU_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_S_MME0_CTRL_SECTION … #define mmSHADOW_0_TENSOR_L_MME0_CTRL_BASE … #define SHADOW_0_TENSOR_L_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_L_MME0_CTRL_SECTION … #define mmSHADOW_0_AGU_L_LOCAL_MME0_CTRL_BASE … #define SHADOW_0_AGU_L_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_0_AGU_L_REMOTE_MME0_CTRL_BASE … #define SHADOW_0_AGU_L_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_0_TENSOR_O_MME0_CTRL_BASE … #define SHADOW_0_TENSOR_O_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_O_MME0_CTRL_SECTION … #define mmSHADOW_0_AGU_O_LOCAL_MME0_CTRL_BASE … #define SHADOW_0_AGU_O_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_0_AGU_O_REMOTE_MME0_CTRL_BASE … #define SHADOW_0_AGU_O_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_0_DESC_MME0_CTRL_BASE … #define SHADOW_0_DESC_MME0_CTRL_MAX_OFFSET … #define SHADOW_0_DESC_MME0_CTRL_SECTION … #define mmSHADOW_1_MME0_CTRL_BASE … #define SHADOW_1_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_MME0_CTRL_SECTION … #define mmSHADOW_1_TENSOR_S_MME0_CTRL_BASE … #define SHADOW_1_TENSOR_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_S_MME0_CTRL_SECTION … #define mmSHADOW_1_AGU_S_MME0_CTRL_BASE … #define SHADOW_1_AGU_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_S_MME0_CTRL_SECTION … #define mmSHADOW_1_TENSOR_L_MME0_CTRL_BASE … #define SHADOW_1_TENSOR_L_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_L_MME0_CTRL_SECTION … #define mmSHADOW_1_AGU_L_LOCAL_MME0_CTRL_BASE … #define SHADOW_1_AGU_L_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_1_AGU_L_REMOTE_MME0_CTRL_BASE … #define SHADOW_1_AGU_L_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_1_TENSOR_O_MME0_CTRL_BASE … #define SHADOW_1_TENSOR_O_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_O_MME0_CTRL_SECTION … #define mmSHADOW_1_AGU_O_LOCAL_MME0_CTRL_BASE … #define SHADOW_1_AGU_O_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_1_AGU_O_REMOTE_MME0_CTRL_BASE … #define SHADOW_1_AGU_O_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_1_DESC_MME0_CTRL_BASE … #define SHADOW_1_DESC_MME0_CTRL_MAX_OFFSET … #define SHADOW_1_DESC_MME0_CTRL_SECTION … #define mmSHADOW_2_MME0_CTRL_BASE … #define SHADOW_2_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_MME0_CTRL_SECTION … #define mmSHADOW_2_TENSOR_S_MME0_CTRL_BASE … #define SHADOW_2_TENSOR_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_S_MME0_CTRL_SECTION … #define mmSHADOW_2_AGU_S_MME0_CTRL_BASE … #define SHADOW_2_AGU_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_S_MME0_CTRL_SECTION … #define mmSHADOW_2_TENSOR_L_MME0_CTRL_BASE … #define SHADOW_2_TENSOR_L_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_L_MME0_CTRL_SECTION … #define mmSHADOW_2_AGU_L_LOCAL_MME0_CTRL_BASE … #define SHADOW_2_AGU_L_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_2_AGU_L_REMOTE_MME0_CTRL_BASE … #define SHADOW_2_AGU_L_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_2_TENSOR_O_MME0_CTRL_BASE … #define SHADOW_2_TENSOR_O_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_O_MME0_CTRL_SECTION … #define mmSHADOW_2_AGU_O_LOCAL_MME0_CTRL_BASE … #define SHADOW_2_AGU_O_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_2_AGU_O_REMOTE_MME0_CTRL_BASE … #define SHADOW_2_AGU_O_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_2_DESC_MME0_CTRL_BASE … #define SHADOW_2_DESC_MME0_CTRL_MAX_OFFSET … #define SHADOW_2_DESC_MME0_CTRL_SECTION … #define mmSHADOW_3_MME0_CTRL_BASE … #define SHADOW_3_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_MME0_CTRL_SECTION … #define mmSHADOW_3_TENSOR_S_MME0_CTRL_BASE … #define SHADOW_3_TENSOR_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_S_MME0_CTRL_SECTION … #define mmSHADOW_3_AGU_S_MME0_CTRL_BASE … #define SHADOW_3_AGU_S_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_S_MME0_CTRL_SECTION … #define mmSHADOW_3_TENSOR_L_MME0_CTRL_BASE … #define SHADOW_3_TENSOR_L_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_L_MME0_CTRL_SECTION … #define mmSHADOW_3_AGU_L_LOCAL_MME0_CTRL_BASE … #define SHADOW_3_AGU_L_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_3_AGU_L_REMOTE_MME0_CTRL_BASE … #define SHADOW_3_AGU_L_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_3_TENSOR_O_MME0_CTRL_BASE … #define SHADOW_3_TENSOR_O_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_O_MME0_CTRL_SECTION … #define mmSHADOW_3_AGU_O_LOCAL_MME0_CTRL_BASE … #define SHADOW_3_AGU_O_LOCAL_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_LOCAL_MME0_CTRL_SECTION … #define mmSHADOW_3_AGU_O_REMOTE_MME0_CTRL_BASE … #define SHADOW_3_AGU_O_REMOTE_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_REMOTE_MME0_CTRL_SECTION … #define mmSHADOW_3_DESC_MME0_CTRL_BASE … #define SHADOW_3_DESC_MME0_CTRL_MAX_OFFSET … #define SHADOW_3_DESC_MME0_CTRL_SECTION … #define mmMME0_QM_BASE … #define MME0_QM_MAX_OFFSET … #define MME0_QM_SECTION … #define mmMME1_ACC_BASE … #define MME1_ACC_MAX_OFFSET … #define MME1_ACC_SECTION … #define mmMME1_SBAB_BASE … #define MME1_SBAB_MAX_OFFSET … #define MME1_SBAB_SECTION … #define mmMME1_PRTN_BASE … #define MME1_PRTN_MAX_OFFSET … #define MME1_PRTN_SECTION … #define mmMME1_CTRL_BASE … #define MME1_CTRL_MAX_OFFSET … #define MME1_CTRL_SECTION … #define mmARCH_MME1_CTRL_BASE … #define ARCH_MME1_CTRL_MAX_OFFSET … #define ARCH_MME1_CTRL_SECTION … #define mmARCH_TENSOR_S_MME1_CTRL_BASE … #define ARCH_TENSOR_S_MME1_CTRL_MAX_OFFSET … #define ARCH_TENSOR_S_MME1_CTRL_SECTION … #define mmARCH_AGU_S_MME1_CTRL_BASE … #define ARCH_AGU_S_MME1_CTRL_MAX_OFFSET … #define ARCH_AGU_S_MME1_CTRL_SECTION … #define mmARCH_TENSOR_L_MME1_CTRL_BASE … #define ARCH_TENSOR_L_MME1_CTRL_MAX_OFFSET … #define ARCH_TENSOR_L_MME1_CTRL_SECTION … #define mmARCH_AGU_L_LOCAL_MME1_CTRL_BASE … #define ARCH_AGU_L_LOCAL_MME1_CTRL_MAX_OFFSET … #define ARCH_AGU_L_LOCAL_MME1_CTRL_SECTION … #define mmARCH_AGU_L_REMOTE_MME1_CTRL_BASE … #define ARCH_AGU_L_REMOTE_MME1_CTRL_MAX_OFFSET … #define ARCH_AGU_L_REMOTE_MME1_CTRL_SECTION … #define mmARCH_TENSOR_O_MME1_CTRL_BASE … #define ARCH_TENSOR_O_MME1_CTRL_MAX_OFFSET … #define ARCH_TENSOR_O_MME1_CTRL_SECTION … #define mmARCH_AGU_O_LOCAL_MME1_CTRL_BASE … #define ARCH_AGU_O_LOCAL_MME1_CTRL_MAX_OFFSET … #define ARCH_AGU_O_LOCAL_MME1_CTRL_SECTION … #define mmARCH_AGU_O_REMOTE_MME1_CTRL_BASE … #define ARCH_AGU_O_REMOTE_MME1_CTRL_MAX_OFFSET … #define ARCH_AGU_O_REMOTE_MME1_CTRL_SECTION … #define mmARCH_DESC_MME1_CTRL_BASE … #define ARCH_DESC_MME1_CTRL_MAX_OFFSET … #define ARCH_DESC_MME1_CTRL_SECTION … #define mmSHADOW_0_MME1_CTRL_BASE … #define SHADOW_0_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_MME1_CTRL_SECTION … #define mmSHADOW_0_TENSOR_S_MME1_CTRL_BASE … #define SHADOW_0_TENSOR_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_S_MME1_CTRL_SECTION … #define mmSHADOW_0_AGU_S_MME1_CTRL_BASE … #define SHADOW_0_AGU_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_S_MME1_CTRL_SECTION … #define mmSHADOW_0_TENSOR_L_MME1_CTRL_BASE … #define SHADOW_0_TENSOR_L_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_L_MME1_CTRL_SECTION … #define mmSHADOW_0_AGU_L_LOCAL_MME1_CTRL_BASE … #define SHADOW_0_AGU_L_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_0_AGU_L_REMOTE_MME1_CTRL_BASE … #define SHADOW_0_AGU_L_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_0_TENSOR_O_MME1_CTRL_BASE … #define SHADOW_0_TENSOR_O_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_O_MME1_CTRL_SECTION … #define mmSHADOW_0_AGU_O_LOCAL_MME1_CTRL_BASE … #define SHADOW_0_AGU_O_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_0_AGU_O_REMOTE_MME1_CTRL_BASE … #define SHADOW_0_AGU_O_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_0_DESC_MME1_CTRL_BASE … #define SHADOW_0_DESC_MME1_CTRL_MAX_OFFSET … #define SHADOW_0_DESC_MME1_CTRL_SECTION … #define mmSHADOW_1_MME1_CTRL_BASE … #define SHADOW_1_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_MME1_CTRL_SECTION … #define mmSHADOW_1_TENSOR_S_MME1_CTRL_BASE … #define SHADOW_1_TENSOR_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_S_MME1_CTRL_SECTION … #define mmSHADOW_1_AGU_S_MME1_CTRL_BASE … #define SHADOW_1_AGU_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_S_MME1_CTRL_SECTION … #define mmSHADOW_1_TENSOR_L_MME1_CTRL_BASE … #define SHADOW_1_TENSOR_L_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_L_MME1_CTRL_SECTION … #define mmSHADOW_1_AGU_L_LOCAL_MME1_CTRL_BASE … #define SHADOW_1_AGU_L_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_1_AGU_L_REMOTE_MME1_CTRL_BASE … #define SHADOW_1_AGU_L_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_1_TENSOR_O_MME1_CTRL_BASE … #define SHADOW_1_TENSOR_O_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_O_MME1_CTRL_SECTION … #define mmSHADOW_1_AGU_O_LOCAL_MME1_CTRL_BASE … #define SHADOW_1_AGU_O_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_1_AGU_O_REMOTE_MME1_CTRL_BASE … #define SHADOW_1_AGU_O_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_1_DESC_MME1_CTRL_BASE … #define SHADOW_1_DESC_MME1_CTRL_MAX_OFFSET … #define SHADOW_1_DESC_MME1_CTRL_SECTION … #define mmSHADOW_2_MME1_CTRL_BASE … #define SHADOW_2_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_MME1_CTRL_SECTION … #define mmSHADOW_2_TENSOR_S_MME1_CTRL_BASE … #define SHADOW_2_TENSOR_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_S_MME1_CTRL_SECTION … #define mmSHADOW_2_AGU_S_MME1_CTRL_BASE … #define SHADOW_2_AGU_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_S_MME1_CTRL_SECTION … #define mmSHADOW_2_TENSOR_L_MME1_CTRL_BASE … #define SHADOW_2_TENSOR_L_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_L_MME1_CTRL_SECTION … #define mmSHADOW_2_AGU_L_LOCAL_MME1_CTRL_BASE … #define SHADOW_2_AGU_L_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_2_AGU_L_REMOTE_MME1_CTRL_BASE … #define SHADOW_2_AGU_L_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_2_TENSOR_O_MME1_CTRL_BASE … #define SHADOW_2_TENSOR_O_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_O_MME1_CTRL_SECTION … #define mmSHADOW_2_AGU_O_LOCAL_MME1_CTRL_BASE … #define SHADOW_2_AGU_O_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_2_AGU_O_REMOTE_MME1_CTRL_BASE … #define SHADOW_2_AGU_O_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_2_DESC_MME1_CTRL_BASE … #define SHADOW_2_DESC_MME1_CTRL_MAX_OFFSET … #define SHADOW_2_DESC_MME1_CTRL_SECTION … #define mmSHADOW_3_MME1_CTRL_BASE … #define SHADOW_3_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_MME1_CTRL_SECTION … #define mmSHADOW_3_TENSOR_S_MME1_CTRL_BASE … #define SHADOW_3_TENSOR_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_S_MME1_CTRL_SECTION … #define mmSHADOW_3_AGU_S_MME1_CTRL_BASE … #define SHADOW_3_AGU_S_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_S_MME1_CTRL_SECTION … #define mmSHADOW_3_TENSOR_L_MME1_CTRL_BASE … #define SHADOW_3_TENSOR_L_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_L_MME1_CTRL_SECTION … #define mmSHADOW_3_AGU_L_LOCAL_MME1_CTRL_BASE … #define SHADOW_3_AGU_L_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_3_AGU_L_REMOTE_MME1_CTRL_BASE … #define SHADOW_3_AGU_L_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_3_TENSOR_O_MME1_CTRL_BASE … #define SHADOW_3_TENSOR_O_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_O_MME1_CTRL_SECTION … #define mmSHADOW_3_AGU_O_LOCAL_MME1_CTRL_BASE … #define SHADOW_3_AGU_O_LOCAL_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_LOCAL_MME1_CTRL_SECTION … #define mmSHADOW_3_AGU_O_REMOTE_MME1_CTRL_BASE … #define SHADOW_3_AGU_O_REMOTE_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_REMOTE_MME1_CTRL_SECTION … #define mmSHADOW_3_DESC_MME1_CTRL_BASE … #define SHADOW_3_DESC_MME1_CTRL_MAX_OFFSET … #define SHADOW_3_DESC_MME1_CTRL_SECTION … #define mmMME1_QM_BASE … #define MME1_QM_MAX_OFFSET … #define MME1_QM_SECTION … #define mmMME2_ACC_BASE … #define MME2_ACC_MAX_OFFSET … #define MME2_ACC_SECTION … #define mmMME2_SBAB_BASE … #define MME2_SBAB_MAX_OFFSET … #define MME2_SBAB_SECTION … #define mmMME2_PRTN_BASE … #define MME2_PRTN_MAX_OFFSET … #define MME2_PRTN_SECTION … #define mmMME2_CTRL_BASE … #define MME2_CTRL_MAX_OFFSET … #define MME2_CTRL_SECTION … #define mmARCH_MME2_CTRL_BASE … #define ARCH_MME2_CTRL_MAX_OFFSET … #define ARCH_MME2_CTRL_SECTION … #define mmARCH_TENSOR_S_MME2_CTRL_BASE … #define ARCH_TENSOR_S_MME2_CTRL_MAX_OFFSET … #define ARCH_TENSOR_S_MME2_CTRL_SECTION … #define mmARCH_AGU_S_MME2_CTRL_BASE … #define ARCH_AGU_S_MME2_CTRL_MAX_OFFSET … #define ARCH_AGU_S_MME2_CTRL_SECTION … #define mmARCH_TENSOR_L_MME2_CTRL_BASE … #define ARCH_TENSOR_L_MME2_CTRL_MAX_OFFSET … #define ARCH_TENSOR_L_MME2_CTRL_SECTION … #define mmARCH_AGU_L_LOCAL_MME2_CTRL_BASE … #define ARCH_AGU_L_LOCAL_MME2_CTRL_MAX_OFFSET … #define ARCH_AGU_L_LOCAL_MME2_CTRL_SECTION … #define mmARCH_AGU_L_REMOTE_MME2_CTRL_BASE … #define ARCH_AGU_L_REMOTE_MME2_CTRL_MAX_OFFSET … #define ARCH_AGU_L_REMOTE_MME2_CTRL_SECTION … #define mmARCH_TENSOR_O_MME2_CTRL_BASE … #define ARCH_TENSOR_O_MME2_CTRL_MAX_OFFSET … #define ARCH_TENSOR_O_MME2_CTRL_SECTION … #define mmARCH_AGU_O_LOCAL_MME2_CTRL_BASE … #define ARCH_AGU_O_LOCAL_MME2_CTRL_MAX_OFFSET … #define ARCH_AGU_O_LOCAL_MME2_CTRL_SECTION … #define mmARCH_AGU_O_REMOTE_MME2_CTRL_BASE … #define ARCH_AGU_O_REMOTE_MME2_CTRL_MAX_OFFSET … #define ARCH_AGU_O_REMOTE_MME2_CTRL_SECTION … #define mmARCH_DESC_MME2_CTRL_BASE … #define ARCH_DESC_MME2_CTRL_MAX_OFFSET … #define ARCH_DESC_MME2_CTRL_SECTION … #define mmSHADOW_0_MME2_CTRL_BASE … #define SHADOW_0_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_MME2_CTRL_SECTION … #define mmSHADOW_0_TENSOR_S_MME2_CTRL_BASE … #define SHADOW_0_TENSOR_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_S_MME2_CTRL_SECTION … #define mmSHADOW_0_AGU_S_MME2_CTRL_BASE … #define SHADOW_0_AGU_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_S_MME2_CTRL_SECTION … #define mmSHADOW_0_TENSOR_L_MME2_CTRL_BASE … #define SHADOW_0_TENSOR_L_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_L_MME2_CTRL_SECTION … #define mmSHADOW_0_AGU_L_LOCAL_MME2_CTRL_BASE … #define SHADOW_0_AGU_L_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_0_AGU_L_REMOTE_MME2_CTRL_BASE … #define SHADOW_0_AGU_L_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_0_TENSOR_O_MME2_CTRL_BASE … #define SHADOW_0_TENSOR_O_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_O_MME2_CTRL_SECTION … #define mmSHADOW_0_AGU_O_LOCAL_MME2_CTRL_BASE … #define SHADOW_0_AGU_O_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_0_AGU_O_REMOTE_MME2_CTRL_BASE … #define SHADOW_0_AGU_O_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_0_DESC_MME2_CTRL_BASE … #define SHADOW_0_DESC_MME2_CTRL_MAX_OFFSET … #define SHADOW_0_DESC_MME2_CTRL_SECTION … #define mmSHADOW_1_MME2_CTRL_BASE … #define SHADOW_1_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_MME2_CTRL_SECTION … #define mmSHADOW_1_TENSOR_S_MME2_CTRL_BASE … #define SHADOW_1_TENSOR_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_S_MME2_CTRL_SECTION … #define mmSHADOW_1_AGU_S_MME2_CTRL_BASE … #define SHADOW_1_AGU_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_S_MME2_CTRL_SECTION … #define mmSHADOW_1_TENSOR_L_MME2_CTRL_BASE … #define SHADOW_1_TENSOR_L_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_L_MME2_CTRL_SECTION … #define mmSHADOW_1_AGU_L_LOCAL_MME2_CTRL_BASE … #define SHADOW_1_AGU_L_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_1_AGU_L_REMOTE_MME2_CTRL_BASE … #define SHADOW_1_AGU_L_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_1_TENSOR_O_MME2_CTRL_BASE … #define SHADOW_1_TENSOR_O_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_O_MME2_CTRL_SECTION … #define mmSHADOW_1_AGU_O_LOCAL_MME2_CTRL_BASE … #define SHADOW_1_AGU_O_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_1_AGU_O_REMOTE_MME2_CTRL_BASE … #define SHADOW_1_AGU_O_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_1_DESC_MME2_CTRL_BASE … #define SHADOW_1_DESC_MME2_CTRL_MAX_OFFSET … #define SHADOW_1_DESC_MME2_CTRL_SECTION … #define mmSHADOW_2_MME2_CTRL_BASE … #define SHADOW_2_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_MME2_CTRL_SECTION … #define mmSHADOW_2_TENSOR_S_MME2_CTRL_BASE … #define SHADOW_2_TENSOR_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_S_MME2_CTRL_SECTION … #define mmSHADOW_2_AGU_S_MME2_CTRL_BASE … #define SHADOW_2_AGU_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_S_MME2_CTRL_SECTION … #define mmSHADOW_2_TENSOR_L_MME2_CTRL_BASE … #define SHADOW_2_TENSOR_L_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_L_MME2_CTRL_SECTION … #define mmSHADOW_2_AGU_L_LOCAL_MME2_CTRL_BASE … #define SHADOW_2_AGU_L_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_2_AGU_L_REMOTE_MME2_CTRL_BASE … #define SHADOW_2_AGU_L_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_2_TENSOR_O_MME2_CTRL_BASE … #define SHADOW_2_TENSOR_O_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_O_MME2_CTRL_SECTION … #define mmSHADOW_2_AGU_O_LOCAL_MME2_CTRL_BASE … #define SHADOW_2_AGU_O_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_2_AGU_O_REMOTE_MME2_CTRL_BASE … #define SHADOW_2_AGU_O_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_2_DESC_MME2_CTRL_BASE … #define SHADOW_2_DESC_MME2_CTRL_MAX_OFFSET … #define SHADOW_2_DESC_MME2_CTRL_SECTION … #define mmSHADOW_3_MME2_CTRL_BASE … #define SHADOW_3_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_MME2_CTRL_SECTION … #define mmSHADOW_3_TENSOR_S_MME2_CTRL_BASE … #define SHADOW_3_TENSOR_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_S_MME2_CTRL_SECTION … #define mmSHADOW_3_AGU_S_MME2_CTRL_BASE … #define SHADOW_3_AGU_S_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_S_MME2_CTRL_SECTION … #define mmSHADOW_3_TENSOR_L_MME2_CTRL_BASE … #define SHADOW_3_TENSOR_L_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_L_MME2_CTRL_SECTION … #define mmSHADOW_3_AGU_L_LOCAL_MME2_CTRL_BASE … #define SHADOW_3_AGU_L_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_3_AGU_L_REMOTE_MME2_CTRL_BASE … #define SHADOW_3_AGU_L_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_3_TENSOR_O_MME2_CTRL_BASE … #define SHADOW_3_TENSOR_O_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_O_MME2_CTRL_SECTION … #define mmSHADOW_3_AGU_O_LOCAL_MME2_CTRL_BASE … #define SHADOW_3_AGU_O_LOCAL_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_LOCAL_MME2_CTRL_SECTION … #define mmSHADOW_3_AGU_O_REMOTE_MME2_CTRL_BASE … #define SHADOW_3_AGU_O_REMOTE_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_REMOTE_MME2_CTRL_SECTION … #define mmSHADOW_3_DESC_MME2_CTRL_BASE … #define SHADOW_3_DESC_MME2_CTRL_MAX_OFFSET … #define SHADOW_3_DESC_MME2_CTRL_SECTION … #define mmMME2_QM_BASE … #define MME2_QM_MAX_OFFSET … #define MME2_QM_SECTION … #define mmMME3_ACC_BASE … #define MME3_ACC_MAX_OFFSET … #define MME3_ACC_SECTION … #define mmMME3_SBAB_BASE … #define MME3_SBAB_MAX_OFFSET … #define MME3_SBAB_SECTION … #define mmMME3_PRTN_BASE … #define MME3_PRTN_MAX_OFFSET … #define MME3_PRTN_SECTION … #define mmMME3_CTRL_BASE … #define MME3_CTRL_MAX_OFFSET … #define MME3_CTRL_SECTION … #define mmARCH_MME3_CTRL_BASE … #define ARCH_MME3_CTRL_MAX_OFFSET … #define ARCH_MME3_CTRL_SECTION … #define mmARCH_TENSOR_S_MME3_CTRL_BASE … #define ARCH_TENSOR_S_MME3_CTRL_MAX_OFFSET … #define ARCH_TENSOR_S_MME3_CTRL_SECTION … #define mmARCH_AGU_S_MME3_CTRL_BASE … #define ARCH_AGU_S_MME3_CTRL_MAX_OFFSET … #define ARCH_AGU_S_MME3_CTRL_SECTION … #define mmARCH_TENSOR_L_MME3_CTRL_BASE … #define ARCH_TENSOR_L_MME3_CTRL_MAX_OFFSET … #define ARCH_TENSOR_L_MME3_CTRL_SECTION … #define mmARCH_AGU_L_LOCAL_MME3_CTRL_BASE … #define ARCH_AGU_L_LOCAL_MME3_CTRL_MAX_OFFSET … #define ARCH_AGU_L_LOCAL_MME3_CTRL_SECTION … #define mmARCH_AGU_L_REMOTE_MME3_CTRL_BASE … #define ARCH_AGU_L_REMOTE_MME3_CTRL_MAX_OFFSET … #define ARCH_AGU_L_REMOTE_MME3_CTRL_SECTION … #define mmARCH_TENSOR_O_MME3_CTRL_BASE … #define ARCH_TENSOR_O_MME3_CTRL_MAX_OFFSET … #define ARCH_TENSOR_O_MME3_CTRL_SECTION … #define mmARCH_AGU_O_LOCAL_MME3_CTRL_BASE … #define ARCH_AGU_O_LOCAL_MME3_CTRL_MAX_OFFSET … #define ARCH_AGU_O_LOCAL_MME3_CTRL_SECTION … #define mmARCH_AGU_O_REMOTE_MME3_CTRL_BASE … #define ARCH_AGU_O_REMOTE_MME3_CTRL_MAX_OFFSET … #define ARCH_AGU_O_REMOTE_MME3_CTRL_SECTION … #define mmARCH_DESC_MME3_CTRL_BASE … #define ARCH_DESC_MME3_CTRL_MAX_OFFSET … #define ARCH_DESC_MME3_CTRL_SECTION … #define mmSHADOW_0_MME3_CTRL_BASE … #define SHADOW_0_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_MME3_CTRL_SECTION … #define mmSHADOW_0_TENSOR_S_MME3_CTRL_BASE … #define SHADOW_0_TENSOR_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_S_MME3_CTRL_SECTION … #define mmSHADOW_0_AGU_S_MME3_CTRL_BASE … #define SHADOW_0_AGU_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_S_MME3_CTRL_SECTION … #define mmSHADOW_0_TENSOR_L_MME3_CTRL_BASE … #define SHADOW_0_TENSOR_L_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_L_MME3_CTRL_SECTION … #define mmSHADOW_0_AGU_L_LOCAL_MME3_CTRL_BASE … #define SHADOW_0_AGU_L_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_0_AGU_L_REMOTE_MME3_CTRL_BASE … #define SHADOW_0_AGU_L_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_L_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_0_TENSOR_O_MME3_CTRL_BASE … #define SHADOW_0_TENSOR_O_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_TENSOR_O_MME3_CTRL_SECTION … #define mmSHADOW_0_AGU_O_LOCAL_MME3_CTRL_BASE … #define SHADOW_0_AGU_O_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_0_AGU_O_REMOTE_MME3_CTRL_BASE … #define SHADOW_0_AGU_O_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_AGU_O_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_0_DESC_MME3_CTRL_BASE … #define SHADOW_0_DESC_MME3_CTRL_MAX_OFFSET … #define SHADOW_0_DESC_MME3_CTRL_SECTION … #define mmSHADOW_1_MME3_CTRL_BASE … #define SHADOW_1_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_MME3_CTRL_SECTION … #define mmSHADOW_1_TENSOR_S_MME3_CTRL_BASE … #define SHADOW_1_TENSOR_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_S_MME3_CTRL_SECTION … #define mmSHADOW_1_AGU_S_MME3_CTRL_BASE … #define SHADOW_1_AGU_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_S_MME3_CTRL_SECTION … #define mmSHADOW_1_TENSOR_L_MME3_CTRL_BASE … #define SHADOW_1_TENSOR_L_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_L_MME3_CTRL_SECTION … #define mmSHADOW_1_AGU_L_LOCAL_MME3_CTRL_BASE … #define SHADOW_1_AGU_L_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_1_AGU_L_REMOTE_MME3_CTRL_BASE … #define SHADOW_1_AGU_L_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_L_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_1_TENSOR_O_MME3_CTRL_BASE … #define SHADOW_1_TENSOR_O_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_TENSOR_O_MME3_CTRL_SECTION … #define mmSHADOW_1_AGU_O_LOCAL_MME3_CTRL_BASE … #define SHADOW_1_AGU_O_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_1_AGU_O_REMOTE_MME3_CTRL_BASE … #define SHADOW_1_AGU_O_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_AGU_O_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_1_DESC_MME3_CTRL_BASE … #define SHADOW_1_DESC_MME3_CTRL_MAX_OFFSET … #define SHADOW_1_DESC_MME3_CTRL_SECTION … #define mmSHADOW_2_MME3_CTRL_BASE … #define SHADOW_2_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_MME3_CTRL_SECTION … #define mmSHADOW_2_TENSOR_S_MME3_CTRL_BASE … #define SHADOW_2_TENSOR_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_S_MME3_CTRL_SECTION … #define mmSHADOW_2_AGU_S_MME3_CTRL_BASE … #define SHADOW_2_AGU_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_S_MME3_CTRL_SECTION … #define mmSHADOW_2_TENSOR_L_MME3_CTRL_BASE … #define SHADOW_2_TENSOR_L_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_L_MME3_CTRL_SECTION … #define mmSHADOW_2_AGU_L_LOCAL_MME3_CTRL_BASE … #define SHADOW_2_AGU_L_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_2_AGU_L_REMOTE_MME3_CTRL_BASE … #define SHADOW_2_AGU_L_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_L_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_2_TENSOR_O_MME3_CTRL_BASE … #define SHADOW_2_TENSOR_O_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_TENSOR_O_MME3_CTRL_SECTION … #define mmSHADOW_2_AGU_O_LOCAL_MME3_CTRL_BASE … #define SHADOW_2_AGU_O_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_2_AGU_O_REMOTE_MME3_CTRL_BASE … #define SHADOW_2_AGU_O_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_AGU_O_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_2_DESC_MME3_CTRL_BASE … #define SHADOW_2_DESC_MME3_CTRL_MAX_OFFSET … #define SHADOW_2_DESC_MME3_CTRL_SECTION … #define mmSHADOW_3_MME3_CTRL_BASE … #define SHADOW_3_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_MME3_CTRL_SECTION … #define mmSHADOW_3_TENSOR_S_MME3_CTRL_BASE … #define SHADOW_3_TENSOR_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_S_MME3_CTRL_SECTION … #define mmSHADOW_3_AGU_S_MME3_CTRL_BASE … #define SHADOW_3_AGU_S_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_S_MME3_CTRL_SECTION … #define mmSHADOW_3_TENSOR_L_MME3_CTRL_BASE … #define SHADOW_3_TENSOR_L_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_L_MME3_CTRL_SECTION … #define mmSHADOW_3_AGU_L_LOCAL_MME3_CTRL_BASE … #define SHADOW_3_AGU_L_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_3_AGU_L_REMOTE_MME3_CTRL_BASE … #define SHADOW_3_AGU_L_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_L_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_3_TENSOR_O_MME3_CTRL_BASE … #define SHADOW_3_TENSOR_O_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_TENSOR_O_MME3_CTRL_SECTION … #define mmSHADOW_3_AGU_O_LOCAL_MME3_CTRL_BASE … #define SHADOW_3_AGU_O_LOCAL_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_LOCAL_MME3_CTRL_SECTION … #define mmSHADOW_3_AGU_O_REMOTE_MME3_CTRL_BASE … #define SHADOW_3_AGU_O_REMOTE_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_AGU_O_REMOTE_MME3_CTRL_SECTION … #define mmSHADOW_3_DESC_MME3_CTRL_BASE … #define SHADOW_3_DESC_MME3_CTRL_MAX_OFFSET … #define SHADOW_3_DESC_MME3_CTRL_SECTION … #define mmMME3_QM_BASE … #define MME3_QM_MAX_OFFSET … #define MME3_QM_SECTION … #define mmSRAM_Y0_X0_BANK_BASE … #define SRAM_Y0_X0_BANK_MAX_OFFSET … #define SRAM_Y0_X0_BANK_SECTION … #define mmSRAM_Y0_X0_RTR_BASE … #define SRAM_Y0_X0_RTR_MAX_OFFSET … #define SRAM_Y0_X0_RTR_SECTION … #define mmSRAM_Y0_X1_BANK_BASE … #define SRAM_Y0_X1_BANK_MAX_OFFSET … #define SRAM_Y0_X1_BANK_SECTION … #define mmSRAM_Y0_X1_RTR_BASE … #define SRAM_Y0_X1_RTR_MAX_OFFSET … #define SRAM_Y0_X1_RTR_SECTION … #define mmSRAM_Y0_X2_BANK_BASE … #define SRAM_Y0_X2_BANK_MAX_OFFSET … #define SRAM_Y0_X2_BANK_SECTION … #define mmSRAM_Y0_X2_RTR_BASE … #define SRAM_Y0_X2_RTR_MAX_OFFSET … #define SRAM_Y0_X2_RTR_SECTION … #define mmSRAM_Y0_X3_BANK_BASE … #define SRAM_Y0_X3_BANK_MAX_OFFSET … #define SRAM_Y0_X3_BANK_SECTION … #define mmSRAM_Y0_X3_RTR_BASE … #define SRAM_Y0_X3_RTR_MAX_OFFSET … #define SRAM_Y0_X3_RTR_SECTION … #define mmSRAM_Y0_X4_BANK_BASE … #define SRAM_Y0_X4_BANK_MAX_OFFSET … #define SRAM_Y0_X4_BANK_SECTION … #define mmSRAM_Y0_X4_RTR_BASE … #define SRAM_Y0_X4_RTR_MAX_OFFSET … #define SRAM_Y0_X4_RTR_SECTION … #define mmSRAM_Y0_X5_BANK_BASE … #define SRAM_Y0_X5_BANK_MAX_OFFSET … #define SRAM_Y0_X5_BANK_SECTION … #define mmSRAM_Y0_X5_RTR_BASE … #define SRAM_Y0_X5_RTR_MAX_OFFSET … #define SRAM_Y0_X5_RTR_SECTION … #define mmSRAM_Y0_X6_BANK_BASE … #define SRAM_Y0_X6_BANK_MAX_OFFSET … #define SRAM_Y0_X6_BANK_SECTION … #define mmSRAM_Y0_X6_RTR_BASE … #define SRAM_Y0_X6_RTR_MAX_OFFSET … #define SRAM_Y0_X6_RTR_SECTION … #define mmSRAM_Y0_X7_BANK_BASE … #define SRAM_Y0_X7_BANK_MAX_OFFSET … #define SRAM_Y0_X7_BANK_SECTION … #define mmSRAM_Y0_X7_RTR_BASE … #define SRAM_Y0_X7_RTR_MAX_OFFSET … #define SRAM_Y0_X7_RTR_SECTION … #define mmSRAM_Y1_X0_BANK_BASE … #define SRAM_Y1_X0_BANK_MAX_OFFSET … #define SRAM_Y1_X0_BANK_SECTION … #define mmSRAM_Y1_X0_RTR_BASE … #define SRAM_Y1_X0_RTR_MAX_OFFSET … #define SRAM_Y1_X0_RTR_SECTION … #define mmSRAM_Y1_X1_BANK_BASE … #define SRAM_Y1_X1_BANK_MAX_OFFSET … #define SRAM_Y1_X1_BANK_SECTION … #define mmSRAM_Y1_X1_RTR_BASE … #define SRAM_Y1_X1_RTR_MAX_OFFSET … #define SRAM_Y1_X1_RTR_SECTION … #define mmSRAM_Y1_X2_BANK_BASE … #define SRAM_Y1_X2_BANK_MAX_OFFSET … #define SRAM_Y1_X2_BANK_SECTION … #define mmSRAM_Y1_X2_RTR_BASE … #define SRAM_Y1_X2_RTR_MAX_OFFSET … #define SRAM_Y1_X2_RTR_SECTION … #define mmSRAM_Y1_X3_BANK_BASE … #define SRAM_Y1_X3_BANK_MAX_OFFSET … #define SRAM_Y1_X3_BANK_SECTION … #define mmSRAM_Y1_X3_RTR_BASE … #define SRAM_Y1_X3_RTR_MAX_OFFSET … #define SRAM_Y1_X3_RTR_SECTION … #define mmSRAM_Y1_X4_BANK_BASE … #define SRAM_Y1_X4_BANK_MAX_OFFSET … #define SRAM_Y1_X4_BANK_SECTION … #define mmSRAM_Y1_X4_RTR_BASE … #define SRAM_Y1_X4_RTR_MAX_OFFSET … #define SRAM_Y1_X4_RTR_SECTION … #define mmSRAM_Y1_X5_BANK_BASE … #define SRAM_Y1_X5_BANK_MAX_OFFSET … #define SRAM_Y1_X5_BANK_SECTION … #define mmSRAM_Y1_X5_RTR_BASE … #define SRAM_Y1_X5_RTR_MAX_OFFSET … #define SRAM_Y1_X5_RTR_SECTION … #define mmSRAM_Y1_X6_BANK_BASE … #define SRAM_Y1_X6_BANK_MAX_OFFSET … #define SRAM_Y1_X6_BANK_SECTION … #define mmSRAM_Y1_X6_RTR_BASE … #define SRAM_Y1_X6_RTR_MAX_OFFSET … #define SRAM_Y1_X6_RTR_SECTION … #define mmSRAM_Y1_X7_BANK_BASE … #define SRAM_Y1_X7_BANK_MAX_OFFSET … #define SRAM_Y1_X7_BANK_SECTION … #define mmSRAM_Y1_X7_RTR_BASE … #define SRAM_Y1_X7_RTR_MAX_OFFSET … #define SRAM_Y1_X7_RTR_SECTION … #define mmSRAM_Y2_X0_BANK_BASE … #define SRAM_Y2_X0_BANK_MAX_OFFSET … #define SRAM_Y2_X0_BANK_SECTION … #define mmSRAM_Y2_X0_RTR_BASE … #define SRAM_Y2_X0_RTR_MAX_OFFSET … #define SRAM_Y2_X0_RTR_SECTION … #define mmSRAM_Y2_X1_BANK_BASE … #define SRAM_Y2_X1_BANK_MAX_OFFSET … #define SRAM_Y2_X1_BANK_SECTION … #define mmSRAM_Y2_X1_RTR_BASE … #define SRAM_Y2_X1_RTR_MAX_OFFSET … #define SRAM_Y2_X1_RTR_SECTION … #define mmSRAM_Y2_X2_BANK_BASE … #define SRAM_Y2_X2_BANK_MAX_OFFSET … #define SRAM_Y2_X2_BANK_SECTION … #define mmSRAM_Y2_X2_RTR_BASE … #define SRAM_Y2_X2_RTR_MAX_OFFSET … #define SRAM_Y2_X2_RTR_SECTION … #define mmSRAM_Y2_X3_BANK_BASE … #define SRAM_Y2_X3_BANK_MAX_OFFSET … #define SRAM_Y2_X3_BANK_SECTION … #define mmSRAM_Y2_X3_RTR_BASE … #define SRAM_Y2_X3_RTR_MAX_OFFSET … #define SRAM_Y2_X3_RTR_SECTION … #define mmSRAM_Y2_X4_BANK_BASE … #define SRAM_Y2_X4_BANK_MAX_OFFSET … #define SRAM_Y2_X4_BANK_SECTION … #define mmSRAM_Y2_X4_RTR_BASE … #define SRAM_Y2_X4_RTR_MAX_OFFSET … #define SRAM_Y2_X4_RTR_SECTION … #define mmSRAM_Y2_X5_BANK_BASE … #define SRAM_Y2_X5_BANK_MAX_OFFSET … #define SRAM_Y2_X5_BANK_SECTION … #define mmSRAM_Y2_X5_RTR_BASE … #define SRAM_Y2_X5_RTR_MAX_OFFSET … #define SRAM_Y2_X5_RTR_SECTION … #define mmSRAM_Y2_X6_BANK_BASE … #define SRAM_Y2_X6_BANK_MAX_OFFSET … #define SRAM_Y2_X6_BANK_SECTION … #define mmSRAM_Y2_X6_RTR_BASE … #define SRAM_Y2_X6_RTR_MAX_OFFSET … #define SRAM_Y2_X6_RTR_SECTION … #define mmSRAM_Y2_X7_BANK_BASE … #define SRAM_Y2_X7_BANK_MAX_OFFSET … #define SRAM_Y2_X7_BANK_SECTION … #define mmSRAM_Y2_X7_RTR_BASE … #define SRAM_Y2_X7_RTR_MAX_OFFSET … #define SRAM_Y2_X7_RTR_SECTION … #define mmSRAM_Y3_X0_BANK_BASE … #define SRAM_Y3_X0_BANK_MAX_OFFSET … #define SRAM_Y3_X0_BANK_SECTION … #define mmSRAM_Y3_X0_RTR_BASE … #define SRAM_Y3_X0_RTR_MAX_OFFSET … #define SRAM_Y3_X0_RTR_SECTION … #define mmSRAM_Y3_X1_BANK_BASE … #define SRAM_Y3_X1_BANK_MAX_OFFSET … #define SRAM_Y3_X1_BANK_SECTION … #define mmSRAM_Y3_X1_RTR_BASE … #define SRAM_Y3_X1_RTR_MAX_OFFSET … #define SRAM_Y3_X1_RTR_SECTION … #define mmSRAM_Y3_X2_BANK_BASE … #define SRAM_Y3_X2_BANK_MAX_OFFSET … #define SRAM_Y3_X2_BANK_SECTION … #define mmSRAM_Y3_X2_RTR_BASE … #define SRAM_Y3_X2_RTR_MAX_OFFSET … #define SRAM_Y3_X2_RTR_SECTION … #define mmSRAM_Y3_X3_BANK_BASE … #define SRAM_Y3_X3_BANK_MAX_OFFSET … #define SRAM_Y3_X3_BANK_SECTION … #define mmSRAM_Y3_X3_RTR_BASE … #define SRAM_Y3_X3_RTR_MAX_OFFSET … #define SRAM_Y3_X3_RTR_SECTION … #define mmSRAM_Y3_X4_BANK_BASE … #define SRAM_Y3_X4_BANK_MAX_OFFSET … #define SRAM_Y3_X4_BANK_SECTION … #define mmSRAM_Y3_X4_RTR_BASE … #define SRAM_Y3_X4_RTR_MAX_OFFSET … #define SRAM_Y3_X4_RTR_SECTION … #define mmSRAM_Y3_X5_BANK_BASE … #define SRAM_Y3_X5_BANK_MAX_OFFSET … #define SRAM_Y3_X5_BANK_SECTION … #define mmSRAM_Y3_X5_RTR_BASE … #define SRAM_Y3_X5_RTR_MAX_OFFSET … #define SRAM_Y3_X5_RTR_SECTION … #define mmSRAM_Y3_X6_BANK_BASE … #define SRAM_Y3_X6_BANK_MAX_OFFSET … #define SRAM_Y3_X6_BANK_SECTION … #define mmSRAM_Y3_X6_RTR_BASE … #define SRAM_Y3_X6_RTR_MAX_OFFSET … #define SRAM_Y3_X6_RTR_SECTION … #define mmSRAM_Y3_X7_BANK_BASE … #define SRAM_Y3_X7_BANK_MAX_OFFSET … #define SRAM_Y3_X7_BANK_SECTION … #define mmSRAM_Y3_X7_RTR_BASE … #define SRAM_Y3_X7_RTR_MAX_OFFSET … #define SRAM_Y3_X7_RTR_SECTION … #define mmSIF_RTR_0_BASE … #define SIF_RTR_0_MAX_OFFSET … #define SIF_RTR_0_SECTION … #define mmSIF_RTR_CTRL_0_BASE … #define SIF_RTR_CTRL_0_MAX_OFFSET … #define SIF_RTR_CTRL_0_SECTION … #define mmSIF_RTR_1_BASE … #define SIF_RTR_1_MAX_OFFSET … #define SIF_RTR_1_SECTION … #define mmSIF_RTR_CTRL_1_BASE … #define SIF_RTR_CTRL_1_MAX_OFFSET … #define SIF_RTR_CTRL_1_SECTION … #define mmSIF_RTR_2_BASE … #define SIF_RTR_2_MAX_OFFSET … #define SIF_RTR_2_SECTION … #define mmSIF_RTR_CTRL_2_BASE … #define SIF_RTR_CTRL_2_MAX_OFFSET … #define SIF_RTR_CTRL_2_SECTION … #define mmSIF_RTR_3_BASE … #define SIF_RTR_3_MAX_OFFSET … #define SIF_RTR_3_SECTION … #define mmSIF_RTR_CTRL_3_BASE … #define SIF_RTR_CTRL_3_MAX_OFFSET … #define SIF_RTR_CTRL_3_SECTION … #define mmSIF_RTR_4_BASE … #define SIF_RTR_4_MAX_OFFSET … #define SIF_RTR_4_SECTION … #define mmSIF_RTR_CTRL_4_BASE … #define SIF_RTR_CTRL_4_MAX_OFFSET … #define SIF_RTR_CTRL_4_SECTION … #define mmSIF_RTR_5_BASE … #define SIF_RTR_5_MAX_OFFSET … #define SIF_RTR_5_SECTION … #define mmSIF_RTR_CTRL_5_BASE … #define SIF_RTR_CTRL_5_MAX_OFFSET … #define SIF_RTR_CTRL_5_SECTION … #define mmSIF_RTR_6_BASE … #define SIF_RTR_6_MAX_OFFSET … #define SIF_RTR_6_SECTION … #define mmSIF_RTR_CTRL_6_BASE … #define SIF_RTR_CTRL_6_MAX_OFFSET … #define SIF_RTR_CTRL_6_SECTION … #define mmSIF_RTR_7_BASE … #define SIF_RTR_7_MAX_OFFSET … #define SIF_RTR_7_SECTION … #define mmSIF_RTR_CTRL_7_BASE … #define SIF_RTR_CTRL_7_MAX_OFFSET … #define SIF_RTR_CTRL_7_SECTION … #define mmNIF_RTR_0_BASE … #define NIF_RTR_0_MAX_OFFSET … #define NIF_RTR_0_SECTION … #define mmNIF_RTR_CTRL_0_BASE … #define NIF_RTR_CTRL_0_MAX_OFFSET … #define NIF_RTR_CTRL_0_SECTION … #define mmNIF_RTR_1_BASE … #define NIF_RTR_1_MAX_OFFSET … #define NIF_RTR_1_SECTION … #define mmNIF_RTR_CTRL_1_BASE … #define NIF_RTR_CTRL_1_MAX_OFFSET … #define NIF_RTR_CTRL_1_SECTION … #define mmNIF_RTR_2_BASE … #define NIF_RTR_2_MAX_OFFSET … #define NIF_RTR_2_SECTION … #define mmNIF_RTR_CTRL_2_BASE … #define NIF_RTR_CTRL_2_MAX_OFFSET … #define NIF_RTR_CTRL_2_SECTION … #define mmNIF_RTR_3_BASE … #define NIF_RTR_3_MAX_OFFSET … #define NIF_RTR_3_SECTION … #define mmNIF_RTR_CTRL_3_BASE … #define NIF_RTR_CTRL_3_MAX_OFFSET … #define NIF_RTR_CTRL_3_SECTION … #define mmNIF_RTR_4_BASE … #define NIF_RTR_4_MAX_OFFSET … #define NIF_RTR_4_SECTION … #define mmNIF_RTR_CTRL_4_BASE … #define NIF_RTR_CTRL_4_MAX_OFFSET … #define NIF_RTR_CTRL_4_SECTION … #define mmNIF_RTR_5_BASE … #define NIF_RTR_5_MAX_OFFSET … #define NIF_RTR_5_SECTION … #define mmNIF_RTR_CTRL_5_BASE … #define NIF_RTR_CTRL_5_MAX_OFFSET … #define NIF_RTR_CTRL_5_SECTION … #define mmNIF_RTR_6_BASE … #define NIF_RTR_6_MAX_OFFSET … #define NIF_RTR_6_SECTION … #define mmNIF_RTR_CTRL_6_BASE … #define NIF_RTR_CTRL_6_MAX_OFFSET … #define NIF_RTR_CTRL_6_SECTION … #define mmNIF_RTR_7_BASE … #define NIF_RTR_7_MAX_OFFSET … #define NIF_RTR_7_SECTION … #define mmNIF_RTR_CTRL_7_BASE … #define NIF_RTR_CTRL_7_MAX_OFFSET … #define NIF_RTR_CTRL_7_SECTION … #define mmCPU_CA53_CFG_BASE … #define CPU_CA53_CFG_MAX_OFFSET … #define CPU_CA53_CFG_SECTION … #define mmCPU_IF_BASE … #define CPU_IF_MAX_OFFSET … #define CPU_IF_SECTION … #define mmCPU_TIMESTAMP_BASE … #define CPU_TIMESTAMP_MAX_OFFSET … #define CPU_TIMESTAMP_SECTION … #define mmDMA_IF_W_S_BASE … #define DMA_IF_W_S_MAX_OFFSET … #define DMA_IF_W_S_SECTION … #define mmDMA_IF_W_S_DOWN_CH0_BASE … #define DMA_IF_W_S_DOWN_CH0_MAX_OFFSET … #define DMA_IF_W_S_DOWN_CH0_SECTION … #define mmDMA_IF_W_S_DOWN_CH1_BASE … #define DMA_IF_W_S_DOWN_CH1_MAX_OFFSET … #define DMA_IF_W_S_DOWN_CH1_SECTION … #define mmDMA_W_PLL_BASE … #define DMA_W_PLL_MAX_OFFSET … #define DMA_W_PLL_SECTION … #define mmIF_W_PLL_BASE … #define IF_W_PLL_MAX_OFFSET … #define IF_W_PLL_SECTION … #define mmDMA_IF_W_S_DOWN_BASE … #define DMA_IF_W_S_DOWN_MAX_OFFSET … #define DMA_IF_W_S_DOWN_SECTION … #define mmSYNC_MNGR_GLBL_W_S_BASE … #define SYNC_MNGR_GLBL_W_S_MAX_OFFSET … #define SYNC_MNGR_GLBL_W_S_SECTION … #define mmSYNC_MNGR_OBJS_W_S_BASE … #define SYNC_MNGR_OBJS_W_S_MAX_OFFSET … #define SYNC_MNGR_OBJS_W_S_SECTION … #define mmDMA_IF_E_S_BASE … #define DMA_IF_E_S_MAX_OFFSET … #define DMA_IF_E_S_SECTION … #define mmDMA_IF_E_S_DOWN_CH0_BASE … #define DMA_IF_E_S_DOWN_CH0_MAX_OFFSET … #define DMA_IF_E_S_DOWN_CH0_SECTION … #define mmDMA_IF_E_S_DOWN_CH1_BASE … #define DMA_IF_E_S_DOWN_CH1_MAX_OFFSET … #define DMA_IF_E_S_DOWN_CH1_SECTION … #define mmIF_E_PLL_BASE … #define IF_E_PLL_MAX_OFFSET … #define IF_E_PLL_SECTION … #define mmDMA_E_PLL_BASE … #define DMA_E_PLL_MAX_OFFSET … #define DMA_E_PLL_SECTION … #define mmDMA_IF_E_S_DOWN_BASE … #define DMA_IF_E_S_DOWN_MAX_OFFSET … #define DMA_IF_E_S_DOWN_SECTION … #define mmSYNC_MNGR_GLBL_E_S_BASE … #define SYNC_MNGR_GLBL_E_S_MAX_OFFSET … #define SYNC_MNGR_GLBL_E_S_SECTION … #define mmSYNC_MNGR_OBJS_E_S_BASE … #define SYNC_MNGR_OBJS_E_S_MAX_OFFSET … #define SYNC_MNGR_OBJS_E_S_SECTION … #define mmDMA_IF_W_N_BASE … #define DMA_IF_W_N_MAX_OFFSET … #define DMA_IF_W_N_SECTION … #define mmDMA_IF_W_N_DOWN_CH0_BASE … #define DMA_IF_W_N_DOWN_CH0_MAX_OFFSET … #define DMA_IF_W_N_DOWN_CH0_SECTION … #define mmDMA_IF_W_N_DOWN_CH1_BASE … #define DMA_IF_W_N_DOWN_CH1_MAX_OFFSET … #define DMA_IF_W_N_DOWN_CH1_SECTION … #define mmMESH_W_PLL_BASE … #define MESH_W_PLL_MAX_OFFSET … #define MESH_W_PLL_SECTION … #define mmSRAM_W_PLL_BASE … #define SRAM_W_PLL_MAX_OFFSET … #define SRAM_W_PLL_SECTION … #define mmDMA_IF_W_N_DOWN_BASE … #define DMA_IF_W_N_DOWN_MAX_OFFSET … #define DMA_IF_W_N_DOWN_SECTION … #define mmSYNC_MNGR_GLBL_W_N_BASE … #define SYNC_MNGR_GLBL_W_N_MAX_OFFSET … #define SYNC_MNGR_GLBL_W_N_SECTION … #define mmSYNC_MNGR_OBJS_W_N_BASE … #define SYNC_MNGR_OBJS_W_N_MAX_OFFSET … #define SYNC_MNGR_OBJS_W_N_SECTION … #define mmDMA_IF_E_N_BASE … #define DMA_IF_E_N_MAX_OFFSET … #define DMA_IF_E_N_SECTION … #define mmDMA_IF_E_N_DOWN_CH0_BASE … #define DMA_IF_E_N_DOWN_CH0_MAX_OFFSET … #define DMA_IF_E_N_DOWN_CH0_SECTION … #define mmDMA_IF_E_N_DOWN_CH1_BASE … #define DMA_IF_E_N_DOWN_CH1_MAX_OFFSET … #define DMA_IF_E_N_DOWN_CH1_SECTION … #define mmMESH_E_PLL_BASE … #define MESH_E_PLL_MAX_OFFSET … #define MESH_E_PLL_SECTION … #define mmSRAM_E_PLL_BASE … #define SRAM_E_PLL_MAX_OFFSET … #define SRAM_E_PLL_SECTION … #define mmDMA_IF_E_N_DOWN_BASE … #define DMA_IF_E_N_DOWN_MAX_OFFSET … #define DMA_IF_E_N_DOWN_SECTION … #define mmSYNC_MNGR_GLBL_E_N_BASE … #define SYNC_MNGR_GLBL_E_N_MAX_OFFSET … #define SYNC_MNGR_GLBL_E_N_SECTION … #define mmSYNC_MNGR_OBJS_E_N_BASE … #define SYNC_MNGR_OBJS_E_N_MAX_OFFSET … #define SYNC_MNGR_OBJS_E_N_SECTION … #define mmDMA0_CORE_BASE … #define DMA0_CORE_MAX_OFFSET … #define DMA0_CORE_SECTION … #define mmDMA0_QM_BASE … #define DMA0_QM_MAX_OFFSET … #define DMA0_QM_SECTION … #define mmDMA1_CORE_BASE … #define DMA1_CORE_MAX_OFFSET … #define DMA1_CORE_SECTION … #define mmDMA1_QM_BASE … #define DMA1_QM_MAX_OFFSET … #define DMA1_QM_SECTION … #define mmDMA2_CORE_BASE … #define DMA2_CORE_MAX_OFFSET … #define DMA2_CORE_SECTION … #define mmDMA2_QM_BASE … #define DMA2_QM_MAX_OFFSET … #define DMA2_QM_SECTION … #define mmDMA3_CORE_BASE … #define DMA3_CORE_MAX_OFFSET … #define DMA3_CORE_SECTION … #define mmDMA3_QM_BASE … #define DMA3_QM_MAX_OFFSET … #define DMA3_QM_SECTION … #define mmDMA4_CORE_BASE … #define DMA4_CORE_MAX_OFFSET … #define DMA4_CORE_SECTION … #define mmDMA4_QM_BASE … #define DMA4_QM_MAX_OFFSET … #define DMA4_QM_SECTION … #define mmDMA5_CORE_BASE … #define DMA5_CORE_MAX_OFFSET … #define DMA5_CORE_SECTION … #define mmDMA5_QM_BASE … #define DMA5_QM_MAX_OFFSET … #define DMA5_QM_SECTION … #define mmDMA6_CORE_BASE … #define DMA6_CORE_MAX_OFFSET … #define DMA6_CORE_SECTION … #define mmDMA6_QM_BASE … #define DMA6_QM_MAX_OFFSET … #define DMA6_QM_SECTION … #define mmDMA7_CORE_BASE … #define DMA7_CORE_MAX_OFFSET … #define DMA7_CORE_SECTION … #define mmDMA7_QM_BASE … #define DMA7_QM_MAX_OFFSET … #define DMA7_QM_SECTION … #define mmHBM0_BASE … #define HBM0_MAX_OFFSET … #define HBM0_SECTION … #define mmHBM1_BASE … #define HBM1_MAX_OFFSET … #define HBM1_SECTION … #define mmHBM2_BASE … #define HBM2_MAX_OFFSET … #define HBM2_SECTION … #define mmHBM3_BASE … #define HBM3_MAX_OFFSET … #define HBM3_SECTION … #define mmGIC_BASE … #define GIC_MAX_OFFSET … #define GIC_SECTION … #define mmPCIE_WRAP_BASE … #define PCIE_WRAP_MAX_OFFSET … #define PCIE_WRAP_SECTION … #define mmPCIE_DBI_BASE … #define PCIE_DBI_MAX_OFFSET … #define PCIE_DBI_SECTION … #define mmPCIE_CORE_BASE … #define PCIE_CORE_MAX_OFFSET … #define PCIE_CORE_SECTION … #define mmPCIE_AUX_BASE … #define PCIE_AUX_MAX_OFFSET … #define PCIE_AUX_SECTION … #define mmPCIE_PHY_BASE … #define PCIE_PHY_MAX_OFFSET … #define PCIE_PHY_SECTION … #define mmMMU_UP_BASE … #define MMU_UP_MAX_OFFSET … #define MMU_UP_SECTION … #define mmSTLB_BASE … #define STLB_MAX_OFFSET … #define STLB_SECTION … #define mmPCIE_MSI_BASE … #define PCIE_MSI_MAX_OFFSET … #define PCIE_MSI_SECTION … #define mmPSOC_I2C_M0_BASE … #define PSOC_I2C_M0_MAX_OFFSET … #define PSOC_I2C_M0_SECTION … #define mmPSOC_I2C_M1_BASE … #define PSOC_I2C_M1_MAX_OFFSET … #define PSOC_I2C_M1_SECTION … #define mmPSOC_I2C_S_BASE … #define PSOC_I2C_S_MAX_OFFSET … #define PSOC_I2C_S_SECTION … #define mmPSOC_SPI_BASE … #define PSOC_SPI_MAX_OFFSET … #define PSOC_SPI_SECTION … #define mmPSOC_UART_0_BASE … #define PSOC_UART_0_MAX_OFFSET … #define PSOC_UART_0_SECTION … #define mmPSOC_UART_1_BASE … #define PSOC_UART_1_MAX_OFFSET … #define PSOC_UART_1_SECTION … #define mmPSOC_TIMER_BASE … #define PSOC_TIMER_MAX_OFFSET … #define PSOC_TIMER_SECTION … #define mmPSOC_WDOG_BASE … #define PSOC_WDOG_MAX_OFFSET … #define PSOC_WDOG_SECTION … #define mmPSOC_TIMESTAMP_BASE … #define PSOC_TIMESTAMP_MAX_OFFSET … #define PSOC_TIMESTAMP_SECTION … #define mmPSOC_EFUSE_BASE … #define PSOC_EFUSE_MAX_OFFSET … #define PSOC_EFUSE_SECTION … #define mmPSOC_GLOBAL_CONF_BASE … #define PSOC_GLOBAL_CONF_MAX_OFFSET … #define PSOC_GLOBAL_CONF_SECTION … #define mmPSOC_GPIO0_BASE … #define PSOC_GPIO0_MAX_OFFSET … #define PSOC_GPIO0_SECTION … #define mmPSOC_GPIO1_BASE … #define PSOC_GPIO1_MAX_OFFSET … #define PSOC_GPIO1_SECTION … #define mmPSOC_BTL_BASE … #define PSOC_BTL_MAX_OFFSET … #define PSOC_BTL_SECTION … #define mmPSOC_CS_TRACE_BASE … #define PSOC_CS_TRACE_MAX_OFFSET … #define PSOC_CS_TRACE_SECTION … #define mmPSOC_GPIO2_BASE … #define PSOC_GPIO2_MAX_OFFSET … #define PSOC_GPIO2_SECTION … #define mmPSOC_GPIO3_BASE … #define PSOC_GPIO3_MAX_OFFSET … #define PSOC_GPIO3_SECTION … #define mmPSOC_GPIO4_BASE … #define PSOC_GPIO4_MAX_OFFSET … #define PSOC_GPIO4_SECTION … #define mmPSOC_DFT_EFUSE_BASE … #define PSOC_DFT_EFUSE_MAX_OFFSET … #define PSOC_DFT_EFUSE_SECTION … #define mmPSOC_RPM_0_BASE … #define PSOC_RPM_0_MAX_OFFSET … #define PSOC_RPM_0_SECTION … #define mmPSOC_RPM_1_BASE … #define PSOC_RPM_1_MAX_OFFSET … #define PSOC_RPM_1_SECTION … #define mmPSOC_RPM_2_BASE … #define PSOC_RPM_2_MAX_OFFSET … #define PSOC_RPM_2_SECTION … #define mmPSOC_RPM_3_BASE … #define PSOC_RPM_3_MAX_OFFSET … #define PSOC_RPM_3_SECTION … #define mmPSOC_CPU_PLL_BASE … #define PSOC_CPU_PLL_MAX_OFFSET … #define PSOC_CPU_PLL_SECTION … #define mmPSOC_MME_PLL_BASE … #define PSOC_MME_PLL_MAX_OFFSET … #define PSOC_MME_PLL_SECTION … #define mmPSOC_PCI_PLL_BASE … #define PSOC_PCI_PLL_MAX_OFFSET … #define PSOC_PCI_PLL_SECTION … #define mmPSOC_TPC_PLL_BASE … #define PSOC_TPC_PLL_MAX_OFFSET … #define PSOC_TPC_PLL_SECTION … #define mmPSOC_HBM_PLL_BASE … #define PSOC_HBM_PLL_MAX_OFFSET … #define PSOC_HBM_PLL_SECTION … #define mmPSOC_PM_BASE … #define PSOC_PM_MAX_OFFSET … #define PSOC_PM_SECTION … #define mmPSOC_TS_BASE … #define PSOC_TS_MAX_OFFSET … #define PSOC_TS_SECTION … #define mmPSOC_PWM0_BASE … #define PSOC_PWM0_MAX_OFFSET … #define PSOC_PWM0_SECTION … #define mmPSOC_PWM1_BASE … #define PSOC_PWM1_MAX_OFFSET … #define PSOC_PWM1_SECTION … #define mmPSOC_PWM2_BASE … #define PSOC_PWM2_MAX_OFFSET … #define PSOC_PWM2_SECTION … #define mmPSOC_PWM3_BASE … #define PSOC_PWM3_MAX_OFFSET … #define PSOC_PWM3_SECTION … #define mmPSOC_GPIO5_BASE … #define PSOC_GPIO5_MAX_OFFSET … #define PSOC_GPIO5_SECTION … #define mmPSOC_GPIO6_BASE … #define PSOC_GPIO6_MAX_OFFSET … #define PSOC_GPIO6_SECTION … #define mmPCIE_PMA_0_BASE … #define PCIE_PMA_0_MAX_OFFSET … #define PCIE_PMA_0_SECTION … #define mmPCIE_PMA_1_BASE … #define PCIE_PMA_1_MAX_OFFSET … #define PCIE_PMA_1_SECTION … #define mmPCIE_PMA_2_BASE … #define PCIE_PMA_2_MAX_OFFSET … #define PCIE_PMA_2_SECTION … #define mmPCIE_PMA_3_BASE … #define PCIE_PMA_3_MAX_OFFSET … #define PCIE_PMA_3_SECTION … #define mmNIC0_MAC_CH0_BASE … #define NIC0_MAC_CH0_MAX_OFFSET … #define NIC0_MAC_CH0_SECTION … #define mmNIC0_MAC_CH1_BASE … #define NIC0_MAC_CH1_MAX_OFFSET … #define NIC0_MAC_CH1_SECTION … #define mmNIC0_MAC_CH2_BASE … #define NIC0_MAC_CH2_MAX_OFFSET … #define NIC0_MAC_CH2_SECTION … #define mmNIC0_MAC_CH3_BASE … #define NIC0_MAC_CH3_MAX_OFFSET … #define NIC0_MAC_CH3_SECTION … #define mmNIC0_STAT_BASE … #define NIC0_STAT_MAX_OFFSET … #define NIC0_STAT_SECTION … #define mmNIC0_MAC_XPCS91_BASE … #define NIC0_MAC_XPCS91_MAX_OFFSET … #define NIC0_MAC_XPCS91_SECTION … #define mmNIC0_MAC_CORE_BASE … #define NIC0_MAC_CORE_MAX_OFFSET … #define NIC0_MAC_CORE_SECTION … #define mmNIC0_MAC_AUX_BASE … #define NIC0_MAC_AUX_MAX_OFFSET … #define NIC0_MAC_AUX_SECTION … #define mmNIC0_PHY_BASE … #define NIC0_PHY_MAX_OFFSET … #define NIC0_PHY_SECTION … #define mmNIC0_QM0_BASE … #define NIC0_QM0_MAX_OFFSET … #define NIC0_QM0_SECTION … #define mmNIC0_QM1_BASE … #define NIC0_QM1_MAX_OFFSET … #define NIC0_QM1_SECTION … #define mmNIC0_QPC0_BASE … #define NIC0_QPC0_MAX_OFFSET … #define NIC0_QPC0_SECTION … #define mmNIC0_QPC1_BASE … #define NIC0_QPC1_MAX_OFFSET … #define NIC0_QPC1_SECTION … #define mmNIC0_RXB_BASE … #define NIC0_RXB_MAX_OFFSET … #define NIC0_RXB_SECTION … #define mmNIC0_RXE0_BASE … #define NIC0_RXE0_MAX_OFFSET … #define NIC0_RXE0_SECTION … #define mmNIC0_RXE1_BASE … #define NIC0_RXE1_MAX_OFFSET … #define NIC0_RXE1_SECTION … #define mmNIC0_RX_GW_BASE … #define NIC0_RX_GW_MAX_OFFSET … #define NIC0_RX_GW_SECTION … #define mmNIC0_TXS0_BASE … #define NIC0_TXS0_MAX_OFFSET … #define NIC0_TXS0_SECTION … #define mmNIC0_TXS1_BASE … #define NIC0_TXS1_MAX_OFFSET … #define NIC0_TXS1_SECTION … #define mmNIC0_TXE0_BASE … #define NIC0_TXE0_MAX_OFFSET … #define NIC0_TXE0_SECTION … #define mmNIC0_TXE1_BASE … #define NIC0_TXE1_MAX_OFFSET … #define NIC0_TXE1_SECTION … #define mmNIC0_TXB_BASE … #define NIC0_TXB_MAX_OFFSET … #define NIC0_TXB_SECTION … #define mmNIC0_TMR_BASE … #define NIC0_TMR_MAX_OFFSET … #define NIC0_TMR_SECTION … #define mmNIC0_TX_GW_BASE … #define NIC0_TX_GW_MAX_OFFSET … #define NIC0_TX_GW_SECTION … #define mmNIC0_TS_BASE … #define NIC0_TS_MAX_OFFSET … #define NIC0_TS_SECTION … #define mmNIC0_PLL_BASE … #define NIC0_PLL_MAX_OFFSET … #define NIC0_PLL_SECTION … #define mmNIC0_PM_BASE … #define NIC0_PM_MAX_OFFSET … #define NIC0_PM_SECTION … #define mmNIC1_MAC_CH0_BASE … #define NIC1_MAC_CH0_MAX_OFFSET … #define NIC1_MAC_CH0_SECTION … #define mmNIC1_MAC_CH1_BASE … #define NIC1_MAC_CH1_MAX_OFFSET … #define NIC1_MAC_CH1_SECTION … #define mmNIC1_MAC_CH2_BASE … #define NIC1_MAC_CH2_MAX_OFFSET … #define NIC1_MAC_CH2_SECTION … #define mmNIC1_MAC_CH3_BASE … #define NIC1_MAC_CH3_MAX_OFFSET … #define NIC1_MAC_CH3_SECTION … #define mmNIC1_STAT_BASE … #define NIC1_STAT_MAX_OFFSET … #define NIC1_STAT_SECTION … #define mmNIC1_MAC_XPCS91_BASE … #define NIC1_MAC_XPCS91_MAX_OFFSET … #define NIC1_MAC_XPCS91_SECTION … #define mmNIC1_MAC_CORE_BASE … #define NIC1_MAC_CORE_MAX_OFFSET … #define NIC1_MAC_CORE_SECTION … #define mmNIC1_MAC_AUX_BASE … #define NIC1_MAC_AUX_MAX_OFFSET … #define NIC1_MAC_AUX_SECTION … #define mmNIC1_PHY_BASE … #define NIC1_PHY_MAX_OFFSET … #define NIC1_PHY_SECTION … #define mmNIC1_QM0_BASE … #define NIC1_QM0_MAX_OFFSET … #define NIC1_QM0_SECTION … #define mmNIC1_QM1_BASE … #define NIC1_QM1_MAX_OFFSET … #define NIC1_QM1_SECTION … #define mmNIC1_QPC0_BASE … #define NIC1_QPC0_MAX_OFFSET … #define NIC1_QPC0_SECTION … #define mmNIC1_QPC1_BASE … #define NIC1_QPC1_MAX_OFFSET … #define NIC1_QPC1_SECTION … #define mmNIC1_RXB_BASE … #define NIC1_RXB_MAX_OFFSET … #define NIC1_RXB_SECTION … #define mmNIC1_RXE0_BASE … #define NIC1_RXE0_MAX_OFFSET … #define NIC1_RXE0_SECTION … #define mmNIC1_RXE1_BASE … #define NIC1_RXE1_MAX_OFFSET … #define NIC1_RXE1_SECTION … #define mmNIC1_RX_GW_BASE … #define NIC1_RX_GW_MAX_OFFSET … #define NIC1_RX_GW_SECTION … #define mmNIC1_TXS0_BASE … #define NIC1_TXS0_MAX_OFFSET … #define NIC1_TXS0_SECTION … #define mmNIC1_TXS1_BASE … #define NIC1_TXS1_MAX_OFFSET … #define NIC1_TXS1_SECTION … #define mmNIC1_TXE0_BASE … #define NIC1_TXE0_MAX_OFFSET … #define NIC1_TXE0_SECTION … #define mmNIC1_TXE1_BASE … #define NIC1_TXE1_MAX_OFFSET … #define NIC1_TXE1_SECTION … #define mmNIC1_TXB_BASE … #define NIC1_TXB_MAX_OFFSET … #define NIC1_TXB_SECTION … #define mmNIC1_TMR_BASE … #define NIC1_TMR_MAX_OFFSET … #define NIC1_TMR_SECTION … #define mmNIC1_TX_GW_BASE … #define NIC1_TX_GW_MAX_OFFSET … #define NIC1_TX_GW_SECTION … #define mmNIC1_TS_BASE … #define NIC1_TS_MAX_OFFSET … #define NIC1_TS_SECTION … #define mmNIC1_PLL_BASE … #define NIC1_PLL_MAX_OFFSET … #define NIC1_PLL_SECTION … #define mmNIC1_PM_BASE … #define NIC1_PM_MAX_OFFSET … #define NIC1_PM_SECTION … #define mmNIC2_MAC_CH0_BASE … #define NIC2_MAC_CH0_MAX_OFFSET … #define NIC2_MAC_CH0_SECTION … #define mmNIC2_MAC_CH1_BASE … #define NIC2_MAC_CH1_MAX_OFFSET … #define NIC2_MAC_CH1_SECTION … #define mmNIC2_MAC_CH2_BASE … #define NIC2_MAC_CH2_MAX_OFFSET … #define NIC2_MAC_CH2_SECTION … #define mmNIC2_MAC_CH3_BASE … #define NIC2_MAC_CH3_MAX_OFFSET … #define NIC2_MAC_CH3_SECTION … #define mmNIC2_STAT_BASE … #define NIC2_STAT_MAX_OFFSET … #define NIC2_STAT_SECTION … #define mmNIC2_MAC_XPCS91_BASE … #define NIC2_MAC_XPCS91_MAX_OFFSET … #define NIC2_MAC_XPCS91_SECTION … #define mmNIC2_MAC_CORE_BASE … #define NIC2_MAC_CORE_MAX_OFFSET … #define NIC2_MAC_CORE_SECTION … #define mmNIC2_MAC_AUX_BASE … #define NIC2_MAC_AUX_MAX_OFFSET … #define NIC2_MAC_AUX_SECTION … #define mmNIC2_PHY_BASE … #define NIC2_PHY_MAX_OFFSET … #define NIC2_PHY_SECTION … #define mmNIC2_QM0_BASE … #define NIC2_QM0_MAX_OFFSET … #define NIC2_QM0_SECTION … #define mmNIC2_QM1_BASE … #define NIC2_QM1_MAX_OFFSET … #define NIC2_QM1_SECTION … #define mmNIC2_QPC0_BASE … #define NIC2_QPC0_MAX_OFFSET … #define NIC2_QPC0_SECTION … #define mmNIC2_QPC1_BASE … #define NIC2_QPC1_MAX_OFFSET … #define NIC2_QPC1_SECTION … #define mmNIC2_RXB_BASE … #define NIC2_RXB_MAX_OFFSET … #define NIC2_RXB_SECTION … #define mmNIC2_RXE0_BASE … #define NIC2_RXE0_MAX_OFFSET … #define NIC2_RXE0_SECTION … #define mmNIC2_RXE1_BASE … #define NIC2_RXE1_MAX_OFFSET … #define NIC2_RXE1_SECTION … #define mmNIC2_RX_GW_BASE … #define NIC2_RX_GW_MAX_OFFSET … #define NIC2_RX_GW_SECTION … #define mmNIC2_TXS0_BASE … #define NIC2_TXS0_MAX_OFFSET … #define NIC2_TXS0_SECTION … #define mmNIC2_TXS1_BASE … #define NIC2_TXS1_MAX_OFFSET … #define NIC2_TXS1_SECTION … #define mmNIC2_TXE0_BASE … #define NIC2_TXE0_MAX_OFFSET … #define NIC2_TXE0_SECTION … #define mmNIC2_TXE1_BASE … #define NIC2_TXE1_MAX_OFFSET … #define NIC2_TXE1_SECTION … #define mmNIC2_TXB_BASE … #define NIC2_TXB_MAX_OFFSET … #define NIC2_TXB_SECTION … #define mmNIC2_TMR_BASE … #define NIC2_TMR_MAX_OFFSET … #define NIC2_TMR_SECTION … #define mmNIC2_TX_GW_BASE … #define NIC2_TX_GW_MAX_OFFSET … #define NIC2_TX_GW_SECTION … #define mmNIC2_HBM_PLL_BASE … #define NIC2_HBM_PLL_MAX_OFFSET … #define NIC2_HBM_PLL_SECTION … #define mmNIC2_MME_PLL_BASE … #define NIC2_MME_PLL_MAX_OFFSET … #define NIC2_MME_PLL_SECTION … #define mmNIC2_TPC_PLL_BASE … #define NIC2_TPC_PLL_MAX_OFFSET … #define NIC2_TPC_PLL_SECTION … #define mmNIC3_MAC_CH0_BASE … #define NIC3_MAC_CH0_MAX_OFFSET … #define NIC3_MAC_CH0_SECTION … #define mmNIC3_MAC_CH1_BASE … #define NIC3_MAC_CH1_MAX_OFFSET … #define NIC3_MAC_CH1_SECTION … #define mmNIC3_MAC_CH2_BASE … #define NIC3_MAC_CH2_MAX_OFFSET … #define NIC3_MAC_CH2_SECTION … #define mmNIC3_MAC_CH3_BASE … #define NIC3_MAC_CH3_MAX_OFFSET … #define NIC3_MAC_CH3_SECTION … #define mmNIC3_STAT_BASE … #define NIC3_STAT_MAX_OFFSET … #define NIC3_STAT_SECTION … #define mmNIC3_MAC_XPCS91_BASE … #define NIC3_MAC_XPCS91_MAX_OFFSET … #define NIC3_MAC_XPCS91_SECTION … #define mmNIC3_MAC_CORE_BASE … #define NIC3_MAC_CORE_MAX_OFFSET … #define NIC3_MAC_CORE_SECTION … #define mmNIC3_MAC_AUX_BASE … #define NIC3_MAC_AUX_MAX_OFFSET … #define NIC3_MAC_AUX_SECTION … #define mmNIC3_PHY_BASE … #define NIC3_PHY_MAX_OFFSET … #define NIC3_PHY_SECTION … #define mmNIC3_QM0_BASE … #define NIC3_QM0_MAX_OFFSET … #define NIC3_QM0_SECTION … #define mmNIC3_QM1_BASE … #define NIC3_QM1_MAX_OFFSET … #define NIC3_QM1_SECTION … #define mmNIC3_QPC0_BASE … #define NIC3_QPC0_MAX_OFFSET … #define NIC3_QPC0_SECTION … #define mmNIC3_QPC1_BASE … #define NIC3_QPC1_MAX_OFFSET … #define NIC3_QPC1_SECTION … #define mmNIC3_RXB_BASE … #define NIC3_RXB_MAX_OFFSET … #define NIC3_RXB_SECTION … #define mmNIC3_RXE0_BASE … #define NIC3_RXE0_MAX_OFFSET … #define NIC3_RXE0_SECTION … #define mmNIC3_RXE1_BASE … #define NIC3_RXE1_MAX_OFFSET … #define NIC3_RXE1_SECTION … #define mmNIC3_RX_GW_BASE … #define NIC3_RX_GW_MAX_OFFSET … #define NIC3_RX_GW_SECTION … #define mmNIC3_TXS0_BASE … #define NIC3_TXS0_MAX_OFFSET … #define NIC3_TXS0_SECTION … #define mmNIC3_TXS1_BASE … #define NIC3_TXS1_MAX_OFFSET … #define NIC3_TXS1_SECTION … #define mmNIC3_TXE0_BASE … #define NIC3_TXE0_MAX_OFFSET … #define NIC3_TXE0_SECTION … #define mmNIC3_TXE1_BASE … #define NIC3_TXE1_MAX_OFFSET … #define NIC3_TXE1_SECTION … #define mmNIC3_TXB_BASE … #define NIC3_TXB_MAX_OFFSET … #define NIC3_TXB_SECTION … #define mmNIC3_TMR_BASE … #define NIC3_TMR_MAX_OFFSET … #define NIC3_TMR_SECTION … #define mmNIC3_TX_GW_BASE … #define NIC3_TX_GW_MAX_OFFSET … #define NIC3_TX_GW_SECTION … #define mmNIC3_TS_BASE … #define NIC3_TS_MAX_OFFSET … #define NIC3_TS_SECTION … #define mmNIC3_PM_BASE … #define NIC3_PM_MAX_OFFSET … #define NIC3_PM_SECTION … #define mmNIC4_MAC_CH0_BASE … #define NIC4_MAC_CH0_MAX_OFFSET … #define NIC4_MAC_CH0_SECTION … #define mmNIC4_MAC_CH1_BASE … #define NIC4_MAC_CH1_MAX_OFFSET … #define NIC4_MAC_CH1_SECTION … #define mmNIC4_MAC_CH2_BASE … #define NIC4_MAC_CH2_MAX_OFFSET … #define NIC4_MAC_CH2_SECTION … #define mmNIC4_MAC_CH3_BASE … #define NIC4_MAC_CH3_MAX_OFFSET … #define NIC4_MAC_CH3_SECTION … #define mmNIC4_STAT_BASE … #define NIC4_STAT_MAX_OFFSET … #define NIC4_STAT_SECTION … #define mmNIC4_MAC_XPCS91_BASE … #define NIC4_MAC_XPCS91_MAX_OFFSET … #define NIC4_MAC_XPCS91_SECTION … #define mmNIC4_MAC_CORE_BASE … #define NIC4_MAC_CORE_MAX_OFFSET … #define NIC4_MAC_CORE_SECTION … #define mmNIC4_MAC_AUX_BASE … #define NIC4_MAC_AUX_MAX_OFFSET … #define NIC4_MAC_AUX_SECTION … #define mmNIC4_PHY_BASE … #define NIC4_PHY_MAX_OFFSET … #define NIC4_PHY_SECTION … #define mmNIC4_QM0_BASE … #define NIC4_QM0_MAX_OFFSET … #define NIC4_QM0_SECTION … #define mmNIC4_QM1_BASE … #define NIC4_QM1_MAX_OFFSET … #define NIC4_QM1_SECTION … #define mmNIC4_QPC0_BASE … #define NIC4_QPC0_MAX_OFFSET … #define NIC4_QPC0_SECTION … #define mmNIC4_QPC1_BASE … #define NIC4_QPC1_MAX_OFFSET … #define NIC4_QPC1_SECTION … #define mmNIC4_RXB_BASE … #define NIC4_RXB_MAX_OFFSET … #define NIC4_RXB_SECTION … #define mmNIC4_RXE0_BASE … #define NIC4_RXE0_MAX_OFFSET … #define NIC4_RXE0_SECTION … #define mmNIC4_RXE1_BASE … #define NIC4_RXE1_MAX_OFFSET … #define NIC4_RXE1_SECTION … #define mmNIC4_RX_GW_BASE … #define NIC4_RX_GW_MAX_OFFSET … #define NIC4_RX_GW_SECTION … #define mmNIC4_TXS0_BASE … #define NIC4_TXS0_MAX_OFFSET … #define NIC4_TXS0_SECTION … #define mmNIC4_TXS1_BASE … #define NIC4_TXS1_MAX_OFFSET … #define NIC4_TXS1_SECTION … #define mmNIC4_TXE0_BASE … #define NIC4_TXE0_MAX_OFFSET … #define NIC4_TXE0_SECTION … #define mmNIC4_TXE1_BASE … #define NIC4_TXE1_MAX_OFFSET … #define NIC4_TXE1_SECTION … #define mmNIC4_TXB_BASE … #define NIC4_TXB_MAX_OFFSET … #define NIC4_TXB_SECTION … #define mmNIC4_TMR_BASE … #define NIC4_TMR_MAX_OFFSET … #define NIC4_TMR_SECTION … #define mmNIC4_TX_GW_BASE … #define NIC4_TX_GW_MAX_OFFSET … #define NIC4_TX_GW_SECTION … #define mmTPC0_CFG_BASE … #define TPC0_CFG_MAX_OFFSET … #define TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC0_CFG_BASE … #define KERNEL_TENSOR_0_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC0_CFG_BASE … #define KERNEL_TENSOR_1_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC0_CFG_BASE … #define KERNEL_TENSOR_2_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC0_CFG_BASE … #define KERNEL_TENSOR_3_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC0_CFG_BASE … #define KERNEL_TENSOR_4_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC0_CFG_BASE … #define KERNEL_TENSOR_5_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC0_CFG_BASE … #define KERNEL_TENSOR_6_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC0_CFG_BASE … #define KERNEL_TENSOR_7_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC0_CFG_BASE … #define KERNEL_TENSOR_8_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC0_CFG_BASE … #define KERNEL_TENSOR_9_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC0_CFG_BASE … #define KERNEL_TENSOR_10_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC0_CFG_BASE … #define KERNEL_TENSOR_11_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC0_CFG_BASE … #define KERNEL_TENSOR_12_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC0_CFG_BASE … #define KERNEL_TENSOR_13_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC0_CFG_BASE … #define KERNEL_TENSOR_14_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC0_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC0_CFG_BASE … #define KERNEL_TENSOR_15_TPC0_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC0_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC0_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC0_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC0_CFG_SECTION … #define mmKERNEL_TPC0_CFG_BASE … #define KERNEL_TPC0_CFG_MAX_OFFSET … #define KERNEL_TPC0_CFG_SECTION … #define mmQM_TENSOR_0_TPC0_CFG_BASE … #define QM_TENSOR_0_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC0_CFG_SECTION … #define mmQM_TENSOR_1_TPC0_CFG_BASE … #define QM_TENSOR_1_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC0_CFG_SECTION … #define mmQM_TENSOR_2_TPC0_CFG_BASE … #define QM_TENSOR_2_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC0_CFG_SECTION … #define mmQM_TENSOR_3_TPC0_CFG_BASE … #define QM_TENSOR_3_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC0_CFG_SECTION … #define mmQM_TENSOR_4_TPC0_CFG_BASE … #define QM_TENSOR_4_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC0_CFG_SECTION … #define mmQM_TENSOR_5_TPC0_CFG_BASE … #define QM_TENSOR_5_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC0_CFG_SECTION … #define mmQM_TENSOR_6_TPC0_CFG_BASE … #define QM_TENSOR_6_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC0_CFG_SECTION … #define mmQM_TENSOR_7_TPC0_CFG_BASE … #define QM_TENSOR_7_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC0_CFG_SECTION … #define mmQM_TENSOR_8_TPC0_CFG_BASE … #define QM_TENSOR_8_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC0_CFG_SECTION … #define mmQM_TENSOR_9_TPC0_CFG_BASE … #define QM_TENSOR_9_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC0_CFG_SECTION … #define mmQM_TENSOR_10_TPC0_CFG_BASE … #define QM_TENSOR_10_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC0_CFG_SECTION … #define mmQM_TENSOR_11_TPC0_CFG_BASE … #define QM_TENSOR_11_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC0_CFG_SECTION … #define mmQM_TENSOR_12_TPC0_CFG_BASE … #define QM_TENSOR_12_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC0_CFG_SECTION … #define mmQM_TENSOR_13_TPC0_CFG_BASE … #define QM_TENSOR_13_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC0_CFG_SECTION … #define mmQM_TENSOR_14_TPC0_CFG_BASE … #define QM_TENSOR_14_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC0_CFG_SECTION … #define mmQM_TENSOR_15_TPC0_CFG_BASE … #define QM_TENSOR_15_TPC0_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC0_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC0_CFG_BASE … #define QM_SYNC_OBJECT_TPC0_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC0_CFG_SECTION … #define mmQM_TPC0_CFG_BASE … #define QM_TPC0_CFG_MAX_OFFSET … #define QM_TPC0_CFG_SECTION … #define mmTPC0_E2E_CRED_BASE … #define TPC0_E2E_CRED_MAX_OFFSET … #define TPC0_E2E_CRED_SECTION … #define mmTPC0_QM_BASE … #define TPC0_QM_MAX_OFFSET … #define TPC0_QM_SECTION … #define mmTPC1_CFG_BASE … #define TPC1_CFG_MAX_OFFSET … #define TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC1_CFG_BASE … #define KERNEL_TENSOR_0_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC1_CFG_BASE … #define KERNEL_TENSOR_1_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC1_CFG_BASE … #define KERNEL_TENSOR_2_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC1_CFG_BASE … #define KERNEL_TENSOR_3_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC1_CFG_BASE … #define KERNEL_TENSOR_4_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC1_CFG_BASE … #define KERNEL_TENSOR_5_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC1_CFG_BASE … #define KERNEL_TENSOR_6_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC1_CFG_BASE … #define KERNEL_TENSOR_7_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC1_CFG_BASE … #define KERNEL_TENSOR_8_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC1_CFG_BASE … #define KERNEL_TENSOR_9_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC1_CFG_BASE … #define KERNEL_TENSOR_10_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC1_CFG_BASE … #define KERNEL_TENSOR_11_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC1_CFG_BASE … #define KERNEL_TENSOR_12_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC1_CFG_BASE … #define KERNEL_TENSOR_13_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC1_CFG_BASE … #define KERNEL_TENSOR_14_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC1_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC1_CFG_BASE … #define KERNEL_TENSOR_15_TPC1_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC1_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC1_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC1_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC1_CFG_SECTION … #define mmKERNEL_TPC1_CFG_BASE … #define KERNEL_TPC1_CFG_MAX_OFFSET … #define KERNEL_TPC1_CFG_SECTION … #define mmQM_TENSOR_0_TPC1_CFG_BASE … #define QM_TENSOR_0_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC1_CFG_SECTION … #define mmQM_TENSOR_1_TPC1_CFG_BASE … #define QM_TENSOR_1_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC1_CFG_SECTION … #define mmQM_TENSOR_2_TPC1_CFG_BASE … #define QM_TENSOR_2_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC1_CFG_SECTION … #define mmQM_TENSOR_3_TPC1_CFG_BASE … #define QM_TENSOR_3_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC1_CFG_SECTION … #define mmQM_TENSOR_4_TPC1_CFG_BASE … #define QM_TENSOR_4_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC1_CFG_SECTION … #define mmQM_TENSOR_5_TPC1_CFG_BASE … #define QM_TENSOR_5_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC1_CFG_SECTION … #define mmQM_TENSOR_6_TPC1_CFG_BASE … #define QM_TENSOR_6_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC1_CFG_SECTION … #define mmQM_TENSOR_7_TPC1_CFG_BASE … #define QM_TENSOR_7_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC1_CFG_SECTION … #define mmQM_TENSOR_8_TPC1_CFG_BASE … #define QM_TENSOR_8_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC1_CFG_SECTION … #define mmQM_TENSOR_9_TPC1_CFG_BASE … #define QM_TENSOR_9_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC1_CFG_SECTION … #define mmQM_TENSOR_10_TPC1_CFG_BASE … #define QM_TENSOR_10_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC1_CFG_SECTION … #define mmQM_TENSOR_11_TPC1_CFG_BASE … #define QM_TENSOR_11_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC1_CFG_SECTION … #define mmQM_TENSOR_12_TPC1_CFG_BASE … #define QM_TENSOR_12_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC1_CFG_SECTION … #define mmQM_TENSOR_13_TPC1_CFG_BASE … #define QM_TENSOR_13_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC1_CFG_SECTION … #define mmQM_TENSOR_14_TPC1_CFG_BASE … #define QM_TENSOR_14_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC1_CFG_SECTION … #define mmQM_TENSOR_15_TPC1_CFG_BASE … #define QM_TENSOR_15_TPC1_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC1_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC1_CFG_BASE … #define QM_SYNC_OBJECT_TPC1_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC1_CFG_SECTION … #define mmQM_TPC1_CFG_BASE … #define QM_TPC1_CFG_MAX_OFFSET … #define QM_TPC1_CFG_SECTION … #define mmTPC1_E2E_CRED_BASE … #define TPC1_E2E_CRED_MAX_OFFSET … #define TPC1_E2E_CRED_SECTION … #define mmTPC1_QM_BASE … #define TPC1_QM_MAX_OFFSET … #define TPC1_QM_SECTION … #define mmTPC2_CFG_BASE … #define TPC2_CFG_MAX_OFFSET … #define TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC2_CFG_BASE … #define KERNEL_TENSOR_0_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC2_CFG_BASE … #define KERNEL_TENSOR_1_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC2_CFG_BASE … #define KERNEL_TENSOR_2_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC2_CFG_BASE … #define KERNEL_TENSOR_3_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC2_CFG_BASE … #define KERNEL_TENSOR_4_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC2_CFG_BASE … #define KERNEL_TENSOR_5_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC2_CFG_BASE … #define KERNEL_TENSOR_6_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC2_CFG_BASE … #define KERNEL_TENSOR_7_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC2_CFG_BASE … #define KERNEL_TENSOR_8_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC2_CFG_BASE … #define KERNEL_TENSOR_9_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC2_CFG_BASE … #define KERNEL_TENSOR_10_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC2_CFG_BASE … #define KERNEL_TENSOR_11_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC2_CFG_BASE … #define KERNEL_TENSOR_12_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC2_CFG_BASE … #define KERNEL_TENSOR_13_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC2_CFG_BASE … #define KERNEL_TENSOR_14_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC2_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC2_CFG_BASE … #define KERNEL_TENSOR_15_TPC2_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC2_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC2_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC2_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC2_CFG_SECTION … #define mmKERNEL_TPC2_CFG_BASE … #define KERNEL_TPC2_CFG_MAX_OFFSET … #define KERNEL_TPC2_CFG_SECTION … #define mmQM_TENSOR_0_TPC2_CFG_BASE … #define QM_TENSOR_0_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC2_CFG_SECTION … #define mmQM_TENSOR_1_TPC2_CFG_BASE … #define QM_TENSOR_1_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC2_CFG_SECTION … #define mmQM_TENSOR_2_TPC2_CFG_BASE … #define QM_TENSOR_2_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC2_CFG_SECTION … #define mmQM_TENSOR_3_TPC2_CFG_BASE … #define QM_TENSOR_3_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC2_CFG_SECTION … #define mmQM_TENSOR_4_TPC2_CFG_BASE … #define QM_TENSOR_4_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC2_CFG_SECTION … #define mmQM_TENSOR_5_TPC2_CFG_BASE … #define QM_TENSOR_5_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC2_CFG_SECTION … #define mmQM_TENSOR_6_TPC2_CFG_BASE … #define QM_TENSOR_6_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC2_CFG_SECTION … #define mmQM_TENSOR_7_TPC2_CFG_BASE … #define QM_TENSOR_7_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC2_CFG_SECTION … #define mmQM_TENSOR_8_TPC2_CFG_BASE … #define QM_TENSOR_8_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC2_CFG_SECTION … #define mmQM_TENSOR_9_TPC2_CFG_BASE … #define QM_TENSOR_9_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC2_CFG_SECTION … #define mmQM_TENSOR_10_TPC2_CFG_BASE … #define QM_TENSOR_10_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC2_CFG_SECTION … #define mmQM_TENSOR_11_TPC2_CFG_BASE … #define QM_TENSOR_11_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC2_CFG_SECTION … #define mmQM_TENSOR_12_TPC2_CFG_BASE … #define QM_TENSOR_12_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC2_CFG_SECTION … #define mmQM_TENSOR_13_TPC2_CFG_BASE … #define QM_TENSOR_13_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC2_CFG_SECTION … #define mmQM_TENSOR_14_TPC2_CFG_BASE … #define QM_TENSOR_14_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC2_CFG_SECTION … #define mmQM_TENSOR_15_TPC2_CFG_BASE … #define QM_TENSOR_15_TPC2_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC2_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC2_CFG_BASE … #define QM_SYNC_OBJECT_TPC2_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC2_CFG_SECTION … #define mmQM_TPC2_CFG_BASE … #define QM_TPC2_CFG_MAX_OFFSET … #define QM_TPC2_CFG_SECTION … #define mmTPC2_E2E_CRED_BASE … #define TPC2_E2E_CRED_MAX_OFFSET … #define TPC2_E2E_CRED_SECTION … #define mmTPC2_QM_BASE … #define TPC2_QM_MAX_OFFSET … #define TPC2_QM_SECTION … #define mmTPC3_CFG_BASE … #define TPC3_CFG_MAX_OFFSET … #define TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC3_CFG_BASE … #define KERNEL_TENSOR_0_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC3_CFG_BASE … #define KERNEL_TENSOR_1_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC3_CFG_BASE … #define KERNEL_TENSOR_2_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC3_CFG_BASE … #define KERNEL_TENSOR_3_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC3_CFG_BASE … #define KERNEL_TENSOR_4_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC3_CFG_BASE … #define KERNEL_TENSOR_5_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC3_CFG_BASE … #define KERNEL_TENSOR_6_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC3_CFG_BASE … #define KERNEL_TENSOR_7_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC3_CFG_BASE … #define KERNEL_TENSOR_8_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC3_CFG_BASE … #define KERNEL_TENSOR_9_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC3_CFG_BASE … #define KERNEL_TENSOR_10_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC3_CFG_BASE … #define KERNEL_TENSOR_11_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC3_CFG_BASE … #define KERNEL_TENSOR_12_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC3_CFG_BASE … #define KERNEL_TENSOR_13_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC3_CFG_BASE … #define KERNEL_TENSOR_14_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC3_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC3_CFG_BASE … #define KERNEL_TENSOR_15_TPC3_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC3_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC3_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC3_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC3_CFG_SECTION … #define mmKERNEL_TPC3_CFG_BASE … #define KERNEL_TPC3_CFG_MAX_OFFSET … #define KERNEL_TPC3_CFG_SECTION … #define mmQM_TENSOR_0_TPC3_CFG_BASE … #define QM_TENSOR_0_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC3_CFG_SECTION … #define mmQM_TENSOR_1_TPC3_CFG_BASE … #define QM_TENSOR_1_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC3_CFG_SECTION … #define mmQM_TENSOR_2_TPC3_CFG_BASE … #define QM_TENSOR_2_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC3_CFG_SECTION … #define mmQM_TENSOR_3_TPC3_CFG_BASE … #define QM_TENSOR_3_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC3_CFG_SECTION … #define mmQM_TENSOR_4_TPC3_CFG_BASE … #define QM_TENSOR_4_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC3_CFG_SECTION … #define mmQM_TENSOR_5_TPC3_CFG_BASE … #define QM_TENSOR_5_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC3_CFG_SECTION … #define mmQM_TENSOR_6_TPC3_CFG_BASE … #define QM_TENSOR_6_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC3_CFG_SECTION … #define mmQM_TENSOR_7_TPC3_CFG_BASE … #define QM_TENSOR_7_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC3_CFG_SECTION … #define mmQM_TENSOR_8_TPC3_CFG_BASE … #define QM_TENSOR_8_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC3_CFG_SECTION … #define mmQM_TENSOR_9_TPC3_CFG_BASE … #define QM_TENSOR_9_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC3_CFG_SECTION … #define mmQM_TENSOR_10_TPC3_CFG_BASE … #define QM_TENSOR_10_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC3_CFG_SECTION … #define mmQM_TENSOR_11_TPC3_CFG_BASE … #define QM_TENSOR_11_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC3_CFG_SECTION … #define mmQM_TENSOR_12_TPC3_CFG_BASE … #define QM_TENSOR_12_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC3_CFG_SECTION … #define mmQM_TENSOR_13_TPC3_CFG_BASE … #define QM_TENSOR_13_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC3_CFG_SECTION … #define mmQM_TENSOR_14_TPC3_CFG_BASE … #define QM_TENSOR_14_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC3_CFG_SECTION … #define mmQM_TENSOR_15_TPC3_CFG_BASE … #define QM_TENSOR_15_TPC3_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC3_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC3_CFG_BASE … #define QM_SYNC_OBJECT_TPC3_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC3_CFG_SECTION … #define mmQM_TPC3_CFG_BASE … #define QM_TPC3_CFG_MAX_OFFSET … #define QM_TPC3_CFG_SECTION … #define mmTPC3_E2E_CRED_BASE … #define TPC3_E2E_CRED_MAX_OFFSET … #define TPC3_E2E_CRED_SECTION … #define mmTPC3_QM_BASE … #define TPC3_QM_MAX_OFFSET … #define TPC3_QM_SECTION … #define mmTPC4_CFG_BASE … #define TPC4_CFG_MAX_OFFSET … #define TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC4_CFG_BASE … #define KERNEL_TENSOR_0_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC4_CFG_BASE … #define KERNEL_TENSOR_1_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC4_CFG_BASE … #define KERNEL_TENSOR_2_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC4_CFG_BASE … #define KERNEL_TENSOR_3_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC4_CFG_BASE … #define KERNEL_TENSOR_4_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC4_CFG_BASE … #define KERNEL_TENSOR_5_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC4_CFG_BASE … #define KERNEL_TENSOR_6_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC4_CFG_BASE … #define KERNEL_TENSOR_7_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC4_CFG_BASE … #define KERNEL_TENSOR_8_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC4_CFG_BASE … #define KERNEL_TENSOR_9_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC4_CFG_BASE … #define KERNEL_TENSOR_10_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC4_CFG_BASE … #define KERNEL_TENSOR_11_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC4_CFG_BASE … #define KERNEL_TENSOR_12_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC4_CFG_BASE … #define KERNEL_TENSOR_13_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC4_CFG_BASE … #define KERNEL_TENSOR_14_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC4_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC4_CFG_BASE … #define KERNEL_TENSOR_15_TPC4_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC4_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC4_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC4_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC4_CFG_SECTION … #define mmKERNEL_TPC4_CFG_BASE … #define KERNEL_TPC4_CFG_MAX_OFFSET … #define KERNEL_TPC4_CFG_SECTION … #define mmQM_TENSOR_0_TPC4_CFG_BASE … #define QM_TENSOR_0_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC4_CFG_SECTION … #define mmQM_TENSOR_1_TPC4_CFG_BASE … #define QM_TENSOR_1_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC4_CFG_SECTION … #define mmQM_TENSOR_2_TPC4_CFG_BASE … #define QM_TENSOR_2_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC4_CFG_SECTION … #define mmQM_TENSOR_3_TPC4_CFG_BASE … #define QM_TENSOR_3_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC4_CFG_SECTION … #define mmQM_TENSOR_4_TPC4_CFG_BASE … #define QM_TENSOR_4_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC4_CFG_SECTION … #define mmQM_TENSOR_5_TPC4_CFG_BASE … #define QM_TENSOR_5_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC4_CFG_SECTION … #define mmQM_TENSOR_6_TPC4_CFG_BASE … #define QM_TENSOR_6_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC4_CFG_SECTION … #define mmQM_TENSOR_7_TPC4_CFG_BASE … #define QM_TENSOR_7_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC4_CFG_SECTION … #define mmQM_TENSOR_8_TPC4_CFG_BASE … #define QM_TENSOR_8_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC4_CFG_SECTION … #define mmQM_TENSOR_9_TPC4_CFG_BASE … #define QM_TENSOR_9_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC4_CFG_SECTION … #define mmQM_TENSOR_10_TPC4_CFG_BASE … #define QM_TENSOR_10_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC4_CFG_SECTION … #define mmQM_TENSOR_11_TPC4_CFG_BASE … #define QM_TENSOR_11_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC4_CFG_SECTION … #define mmQM_TENSOR_12_TPC4_CFG_BASE … #define QM_TENSOR_12_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC4_CFG_SECTION … #define mmQM_TENSOR_13_TPC4_CFG_BASE … #define QM_TENSOR_13_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC4_CFG_SECTION … #define mmQM_TENSOR_14_TPC4_CFG_BASE … #define QM_TENSOR_14_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC4_CFG_SECTION … #define mmQM_TENSOR_15_TPC4_CFG_BASE … #define QM_TENSOR_15_TPC4_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC4_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC4_CFG_BASE … #define QM_SYNC_OBJECT_TPC4_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC4_CFG_SECTION … #define mmQM_TPC4_CFG_BASE … #define QM_TPC4_CFG_MAX_OFFSET … #define QM_TPC4_CFG_SECTION … #define mmTPC4_E2E_CRED_BASE … #define TPC4_E2E_CRED_MAX_OFFSET … #define TPC4_E2E_CRED_SECTION … #define mmTPC4_QM_BASE … #define TPC4_QM_MAX_OFFSET … #define TPC4_QM_SECTION … #define mmTPC5_CFG_BASE … #define TPC5_CFG_MAX_OFFSET … #define TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC5_CFG_BASE … #define KERNEL_TENSOR_0_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC5_CFG_BASE … #define KERNEL_TENSOR_1_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC5_CFG_BASE … #define KERNEL_TENSOR_2_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC5_CFG_BASE … #define KERNEL_TENSOR_3_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC5_CFG_BASE … #define KERNEL_TENSOR_4_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC5_CFG_BASE … #define KERNEL_TENSOR_5_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC5_CFG_BASE … #define KERNEL_TENSOR_6_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC5_CFG_BASE … #define KERNEL_TENSOR_7_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC5_CFG_BASE … #define KERNEL_TENSOR_8_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC5_CFG_BASE … #define KERNEL_TENSOR_9_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC5_CFG_BASE … #define KERNEL_TENSOR_10_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC5_CFG_BASE … #define KERNEL_TENSOR_11_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC5_CFG_BASE … #define KERNEL_TENSOR_12_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC5_CFG_BASE … #define KERNEL_TENSOR_13_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC5_CFG_BASE … #define KERNEL_TENSOR_14_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC5_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC5_CFG_BASE … #define KERNEL_TENSOR_15_TPC5_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC5_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC5_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC5_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC5_CFG_SECTION … #define mmKERNEL_TPC5_CFG_BASE … #define KERNEL_TPC5_CFG_MAX_OFFSET … #define KERNEL_TPC5_CFG_SECTION … #define mmQM_TENSOR_0_TPC5_CFG_BASE … #define QM_TENSOR_0_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC5_CFG_SECTION … #define mmQM_TENSOR_1_TPC5_CFG_BASE … #define QM_TENSOR_1_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC5_CFG_SECTION … #define mmQM_TENSOR_2_TPC5_CFG_BASE … #define QM_TENSOR_2_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC5_CFG_SECTION … #define mmQM_TENSOR_3_TPC5_CFG_BASE … #define QM_TENSOR_3_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC5_CFG_SECTION … #define mmQM_TENSOR_4_TPC5_CFG_BASE … #define QM_TENSOR_4_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC5_CFG_SECTION … #define mmQM_TENSOR_5_TPC5_CFG_BASE … #define QM_TENSOR_5_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC5_CFG_SECTION … #define mmQM_TENSOR_6_TPC5_CFG_BASE … #define QM_TENSOR_6_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC5_CFG_SECTION … #define mmQM_TENSOR_7_TPC5_CFG_BASE … #define QM_TENSOR_7_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC5_CFG_SECTION … #define mmQM_TENSOR_8_TPC5_CFG_BASE … #define QM_TENSOR_8_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC5_CFG_SECTION … #define mmQM_TENSOR_9_TPC5_CFG_BASE … #define QM_TENSOR_9_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC5_CFG_SECTION … #define mmQM_TENSOR_10_TPC5_CFG_BASE … #define QM_TENSOR_10_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC5_CFG_SECTION … #define mmQM_TENSOR_11_TPC5_CFG_BASE … #define QM_TENSOR_11_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC5_CFG_SECTION … #define mmQM_TENSOR_12_TPC5_CFG_BASE … #define QM_TENSOR_12_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC5_CFG_SECTION … #define mmQM_TENSOR_13_TPC5_CFG_BASE … #define QM_TENSOR_13_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC5_CFG_SECTION … #define mmQM_TENSOR_14_TPC5_CFG_BASE … #define QM_TENSOR_14_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC5_CFG_SECTION … #define mmQM_TENSOR_15_TPC5_CFG_BASE … #define QM_TENSOR_15_TPC5_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC5_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC5_CFG_BASE … #define QM_SYNC_OBJECT_TPC5_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC5_CFG_SECTION … #define mmQM_TPC5_CFG_BASE … #define QM_TPC5_CFG_MAX_OFFSET … #define QM_TPC5_CFG_SECTION … #define mmTPC5_E2E_CRED_BASE … #define TPC5_E2E_CRED_MAX_OFFSET … #define TPC5_E2E_CRED_SECTION … #define mmTPC5_QM_BASE … #define TPC5_QM_MAX_OFFSET … #define TPC5_QM_SECTION … #define mmTPC6_CFG_BASE … #define TPC6_CFG_MAX_OFFSET … #define TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC6_CFG_BASE … #define KERNEL_TENSOR_0_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC6_CFG_BASE … #define KERNEL_TENSOR_1_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC6_CFG_BASE … #define KERNEL_TENSOR_2_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC6_CFG_BASE … #define KERNEL_TENSOR_3_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC6_CFG_BASE … #define KERNEL_TENSOR_4_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC6_CFG_BASE … #define KERNEL_TENSOR_5_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC6_CFG_BASE … #define KERNEL_TENSOR_6_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC6_CFG_BASE … #define KERNEL_TENSOR_7_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC6_CFG_BASE … #define KERNEL_TENSOR_8_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC6_CFG_BASE … #define KERNEL_TENSOR_9_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC6_CFG_BASE … #define KERNEL_TENSOR_10_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC6_CFG_BASE … #define KERNEL_TENSOR_11_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC6_CFG_BASE … #define KERNEL_TENSOR_12_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC6_CFG_BASE … #define KERNEL_TENSOR_13_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC6_CFG_BASE … #define KERNEL_TENSOR_14_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC6_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC6_CFG_BASE … #define KERNEL_TENSOR_15_TPC6_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC6_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC6_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC6_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC6_CFG_SECTION … #define mmKERNEL_TPC6_CFG_BASE … #define KERNEL_TPC6_CFG_MAX_OFFSET … #define KERNEL_TPC6_CFG_SECTION … #define mmQM_TENSOR_0_TPC6_CFG_BASE … #define QM_TENSOR_0_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC6_CFG_SECTION … #define mmQM_TENSOR_1_TPC6_CFG_BASE … #define QM_TENSOR_1_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC6_CFG_SECTION … #define mmQM_TENSOR_2_TPC6_CFG_BASE … #define QM_TENSOR_2_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC6_CFG_SECTION … #define mmQM_TENSOR_3_TPC6_CFG_BASE … #define QM_TENSOR_3_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC6_CFG_SECTION … #define mmQM_TENSOR_4_TPC6_CFG_BASE … #define QM_TENSOR_4_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC6_CFG_SECTION … #define mmQM_TENSOR_5_TPC6_CFG_BASE … #define QM_TENSOR_5_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC6_CFG_SECTION … #define mmQM_TENSOR_6_TPC6_CFG_BASE … #define QM_TENSOR_6_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC6_CFG_SECTION … #define mmQM_TENSOR_7_TPC6_CFG_BASE … #define QM_TENSOR_7_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC6_CFG_SECTION … #define mmQM_TENSOR_8_TPC6_CFG_BASE … #define QM_TENSOR_8_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC6_CFG_SECTION … #define mmQM_TENSOR_9_TPC6_CFG_BASE … #define QM_TENSOR_9_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC6_CFG_SECTION … #define mmQM_TENSOR_10_TPC6_CFG_BASE … #define QM_TENSOR_10_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC6_CFG_SECTION … #define mmQM_TENSOR_11_TPC6_CFG_BASE … #define QM_TENSOR_11_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC6_CFG_SECTION … #define mmQM_TENSOR_12_TPC6_CFG_BASE … #define QM_TENSOR_12_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC6_CFG_SECTION … #define mmQM_TENSOR_13_TPC6_CFG_BASE … #define QM_TENSOR_13_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC6_CFG_SECTION … #define mmQM_TENSOR_14_TPC6_CFG_BASE … #define QM_TENSOR_14_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC6_CFG_SECTION … #define mmQM_TENSOR_15_TPC6_CFG_BASE … #define QM_TENSOR_15_TPC6_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC6_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC6_CFG_BASE … #define QM_SYNC_OBJECT_TPC6_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC6_CFG_SECTION … #define mmQM_TPC6_CFG_BASE … #define QM_TPC6_CFG_MAX_OFFSET … #define QM_TPC6_CFG_SECTION … #define mmTPC6_E2E_CRED_BASE … #define TPC6_E2E_CRED_MAX_OFFSET … #define TPC6_E2E_CRED_SECTION … #define mmTPC6_QM_BASE … #define TPC6_QM_MAX_OFFSET … #define TPC6_QM_SECTION … #define mmTPC7_CFG_BASE … #define TPC7_CFG_MAX_OFFSET … #define TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC7_CFG_BASE … #define KERNEL_TENSOR_0_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC7_CFG_BASE … #define KERNEL_TENSOR_1_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC7_CFG_BASE … #define KERNEL_TENSOR_2_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC7_CFG_BASE … #define KERNEL_TENSOR_3_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC7_CFG_BASE … #define KERNEL_TENSOR_4_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC7_CFG_BASE … #define KERNEL_TENSOR_5_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC7_CFG_BASE … #define KERNEL_TENSOR_6_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC7_CFG_BASE … #define KERNEL_TENSOR_7_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC7_CFG_BASE … #define KERNEL_TENSOR_8_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC7_CFG_BASE … #define KERNEL_TENSOR_9_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC7_CFG_BASE … #define KERNEL_TENSOR_10_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC7_CFG_BASE … #define KERNEL_TENSOR_11_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC7_CFG_BASE … #define KERNEL_TENSOR_12_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC7_CFG_BASE … #define KERNEL_TENSOR_13_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC7_CFG_BASE … #define KERNEL_TENSOR_14_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC7_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC7_CFG_BASE … #define KERNEL_TENSOR_15_TPC7_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC7_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC7_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC7_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC7_CFG_SECTION … #define mmKERNEL_TPC7_CFG_BASE … #define KERNEL_TPC7_CFG_MAX_OFFSET … #define KERNEL_TPC7_CFG_SECTION … #define mmQM_TENSOR_0_TPC7_CFG_BASE … #define QM_TENSOR_0_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC7_CFG_SECTION … #define mmQM_TENSOR_1_TPC7_CFG_BASE … #define QM_TENSOR_1_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC7_CFG_SECTION … #define mmQM_TENSOR_2_TPC7_CFG_BASE … #define QM_TENSOR_2_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC7_CFG_SECTION … #define mmQM_TENSOR_3_TPC7_CFG_BASE … #define QM_TENSOR_3_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC7_CFG_SECTION … #define mmQM_TENSOR_4_TPC7_CFG_BASE … #define QM_TENSOR_4_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC7_CFG_SECTION … #define mmQM_TENSOR_5_TPC7_CFG_BASE … #define QM_TENSOR_5_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC7_CFG_SECTION … #define mmQM_TENSOR_6_TPC7_CFG_BASE … #define QM_TENSOR_6_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC7_CFG_SECTION … #define mmQM_TENSOR_7_TPC7_CFG_BASE … #define QM_TENSOR_7_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC7_CFG_SECTION … #define mmQM_TENSOR_8_TPC7_CFG_BASE … #define QM_TENSOR_8_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC7_CFG_SECTION … #define mmQM_TENSOR_9_TPC7_CFG_BASE … #define QM_TENSOR_9_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC7_CFG_SECTION … #define mmQM_TENSOR_10_TPC7_CFG_BASE … #define QM_TENSOR_10_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC7_CFG_SECTION … #define mmQM_TENSOR_11_TPC7_CFG_BASE … #define QM_TENSOR_11_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC7_CFG_SECTION … #define mmQM_TENSOR_12_TPC7_CFG_BASE … #define QM_TENSOR_12_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC7_CFG_SECTION … #define mmQM_TENSOR_13_TPC7_CFG_BASE … #define QM_TENSOR_13_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC7_CFG_SECTION … #define mmQM_TENSOR_14_TPC7_CFG_BASE … #define QM_TENSOR_14_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC7_CFG_SECTION … #define mmQM_TENSOR_15_TPC7_CFG_BASE … #define QM_TENSOR_15_TPC7_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC7_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC7_CFG_BASE … #define QM_SYNC_OBJECT_TPC7_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC7_CFG_SECTION … #define mmQM_TPC7_CFG_BASE … #define QM_TPC7_CFG_MAX_OFFSET … #define QM_TPC7_CFG_SECTION … #define mmTPC7_E2E_CRED_BASE … #define TPC7_E2E_CRED_MAX_OFFSET … #define TPC7_E2E_CRED_SECTION … #define mmTPC7_QM_BASE … #define TPC7_QM_MAX_OFFSET … #define TPC7_QM_SECTION … #define mmMME_S_ROM_TABLE_BASE … #define MME_S_ROM_TABLE_MAX_OFFSET … #define MME_S_ROM_TABLE_SECTION … #define mmMME0_ACC_STM_BASE … #define MME0_ACC_STM_MAX_OFFSET … #define MME0_ACC_STM_SECTION … #define mmMME0_ACC_CTI_BASE … #define MME0_ACC_CTI_MAX_OFFSET … #define MME0_ACC_CTI_SECTION … #define mmMME0_ACC_ETF_BASE … #define MME0_ACC_ETF_MAX_OFFSET … #define MME0_ACC_ETF_SECTION … #define mmMME0_ACC_SPMU_BASE … #define MME0_ACC_SPMU_MAX_OFFSET … #define MME0_ACC_SPMU_SECTION … #define mmMME0_ACC_CTI0_BASE … #define MME0_ACC_CTI0_MAX_OFFSET … #define MME0_ACC_CTI0_SECTION … #define mmMME0_ACC_CTI1_BASE … #define MME0_ACC_CTI1_MAX_OFFSET … #define MME0_ACC_CTI1_SECTION … #define mmMME0_ACC_BMON0_BASE … #define MME0_ACC_BMON0_MAX_OFFSET … #define MME0_ACC_BMON0_SECTION … #define mmMME0_ACC_FUNNEL_BASE … #define MME0_ACC_FUNNEL_MAX_OFFSET … #define MME0_ACC_FUNNEL_SECTION … #define mmMME0_SBAB_STM_BASE … #define MME0_SBAB_STM_MAX_OFFSET … #define MME0_SBAB_STM_SECTION … #define mmMME0_SBAB_CTI_BASE … #define MME0_SBAB_CTI_MAX_OFFSET … #define MME0_SBAB_CTI_SECTION … #define mmMME0_SBAB_ETF_BASE … #define MME0_SBAB_ETF_MAX_OFFSET … #define MME0_SBAB_ETF_SECTION … #define mmMME0_SBAB_SPMU_BASE … #define MME0_SBAB_SPMU_MAX_OFFSET … #define MME0_SBAB_SPMU_SECTION … #define mmMME0_SBAB_CTI0_BASE … #define MME0_SBAB_CTI0_MAX_OFFSET … #define MME0_SBAB_CTI0_SECTION … #define mmMME0_SBAB_CTI1_BASE … #define MME0_SBAB_CTI1_MAX_OFFSET … #define MME0_SBAB_CTI1_SECTION … #define mmMME0_SBAB_BMON0_BASE … #define MME0_SBAB_BMON0_MAX_OFFSET … #define MME0_SBAB_BMON0_SECTION … #define mmMME0_SBAB_BMON1_BASE … #define MME0_SBAB_BMON1_MAX_OFFSET … #define MME0_SBAB_BMON1_SECTION … #define mmMME0_CTRL_STM_BASE … #define MME0_CTRL_STM_MAX_OFFSET … #define MME0_CTRL_STM_SECTION … #define mmMME0_CTRL_CTI_BASE … #define MME0_CTRL_CTI_MAX_OFFSET … #define MME0_CTRL_CTI_SECTION … #define mmMME0_CTRL_ETF_BASE … #define MME0_CTRL_ETF_MAX_OFFSET … #define MME0_CTRL_ETF_SECTION … #define mmMME0_CTRL_SPMU_BASE … #define MME0_CTRL_SPMU_MAX_OFFSET … #define MME0_CTRL_SPMU_SECTION … #define mmMME0_CTRL_CTI0_BASE … #define MME0_CTRL_CTI0_MAX_OFFSET … #define MME0_CTRL_CTI0_SECTION … #define mmMME0_CTRL_CTI1_BASE … #define MME0_CTRL_CTI1_MAX_OFFSET … #define MME0_CTRL_CTI1_SECTION … #define mmMME0_CTRL_BMON0_BASE … #define MME0_CTRL_BMON0_MAX_OFFSET … #define MME0_CTRL_BMON0_SECTION … #define mmMME0_CTRL_BMON1_BASE … #define MME0_CTRL_BMON1_MAX_OFFSET … #define MME0_CTRL_BMON1_SECTION … #define mmMME1_ACC_STM_BASE … #define MME1_ACC_STM_MAX_OFFSET … #define MME1_ACC_STM_SECTION … #define mmMME1_ACC_CTI_BASE … #define MME1_ACC_CTI_MAX_OFFSET … #define MME1_ACC_CTI_SECTION … #define mmMME1_ACC_ETF_BASE … #define MME1_ACC_ETF_MAX_OFFSET … #define MME1_ACC_ETF_SECTION … #define mmMME1_ACC_SPMU_BASE … #define MME1_ACC_SPMU_MAX_OFFSET … #define MME1_ACC_SPMU_SECTION … #define mmMME1_ACC_CTI0_BASE … #define MME1_ACC_CTI0_MAX_OFFSET … #define MME1_ACC_CTI0_SECTION … #define mmMME1_ACC_CTI1_BASE … #define MME1_ACC_CTI1_MAX_OFFSET … #define MME1_ACC_CTI1_SECTION … #define mmMME1_ACC_BMON0_BASE … #define MME1_ACC_BMON0_MAX_OFFSET … #define MME1_ACC_BMON0_SECTION … #define mmMME1_ACC_FUNNEL_BASE … #define MME1_ACC_FUNNEL_MAX_OFFSET … #define MME1_ACC_FUNNEL_SECTION … #define mmMME1_SBAB_STM_BASE … #define MME1_SBAB_STM_MAX_OFFSET … #define MME1_SBAB_STM_SECTION … #define mmMME1_SBAB_CTI_BASE … #define MME1_SBAB_CTI_MAX_OFFSET … #define MME1_SBAB_CTI_SECTION … #define mmMME1_SBAB_ETF_BASE … #define MME1_SBAB_ETF_MAX_OFFSET … #define MME1_SBAB_ETF_SECTION … #define mmMME1_SBAB_SPMU_BASE … #define MME1_SBAB_SPMU_MAX_OFFSET … #define MME1_SBAB_SPMU_SECTION … #define mmMME1_SBAB_CTI0_BASE … #define MME1_SBAB_CTI0_MAX_OFFSET … #define MME1_SBAB_CTI0_SECTION … #define mmMME1_SBAB_CTI1_BASE … #define MME1_SBAB_CTI1_MAX_OFFSET … #define MME1_SBAB_CTI1_SECTION … #define mmMME1_SBAB_BMON0_BASE … #define MME1_SBAB_BMON0_MAX_OFFSET … #define MME1_SBAB_BMON0_SECTION … #define mmMME1_SBAB_BMON1_BASE … #define MME1_SBAB_BMON1_MAX_OFFSET … #define MME1_SBAB_BMON1_SECTION … #define mmMME1_CTRL_STM_BASE … #define MME1_CTRL_STM_MAX_OFFSET … #define MME1_CTRL_STM_SECTION … #define mmMME1_CTRL_CTI_BASE … #define MME1_CTRL_CTI_MAX_OFFSET … #define MME1_CTRL_CTI_SECTION … #define mmMME1_CTRL_ETF_BASE … #define MME1_CTRL_ETF_MAX_OFFSET … #define MME1_CTRL_ETF_SECTION … #define mmMME1_CTRL_SPMU_BASE … #define MME1_CTRL_SPMU_MAX_OFFSET … #define MME1_CTRL_SPMU_SECTION … #define mmMME1_CTRL_CTI0_BASE … #define MME1_CTRL_CTI0_MAX_OFFSET … #define MME1_CTRL_CTI0_SECTION … #define mmMME1_CTRL_CTI1_BASE … #define MME1_CTRL_CTI1_MAX_OFFSET … #define MME1_CTRL_CTI1_SECTION … #define mmMME1_CTRL_BMON0_BASE … #define MME1_CTRL_BMON0_MAX_OFFSET … #define MME1_CTRL_BMON0_SECTION … #define mmMME1_CTRL_BMON1_BASE … #define MME1_CTRL_BMON1_MAX_OFFSET … #define MME1_CTRL_BMON1_SECTION … #define mmMME_N_ROM_TABLE_BASE … #define MME_N_ROM_TABLE_MAX_OFFSET … #define MME_N_ROM_TABLE_SECTION … #define mmMME2_ACC_STM_BASE … #define MME2_ACC_STM_MAX_OFFSET … #define MME2_ACC_STM_SECTION … #define mmMME2_ACC_CTI_BASE … #define MME2_ACC_CTI_MAX_OFFSET … #define MME2_ACC_CTI_SECTION … #define mmMME2_MME2_ACC_ETF_BASE … #define MME2_MME2_ACC_ETF_MAX_OFFSET … #define MME2_MME2_ACC_ETF_SECTION … #define mmMME2_ACC_SPMU_BASE … #define MME2_ACC_SPMU_MAX_OFFSET … #define MME2_ACC_SPMU_SECTION … #define mmMME2_ACC_CTI0_BASE … #define MME2_ACC_CTI0_MAX_OFFSET … #define MME2_ACC_CTI0_SECTION … #define mmMME2_ACC_CTI1_BASE … #define MME2_ACC_CTI1_MAX_OFFSET … #define MME2_ACC_CTI1_SECTION … #define mmMME2_ACC_BMON0_BASE … #define MME2_ACC_BMON0_MAX_OFFSET … #define MME2_ACC_BMON0_SECTION … #define mmMME2_ACC_FUNNEL_BASE … #define MME2_ACC_FUNNEL_MAX_OFFSET … #define MME2_ACC_FUNNEL_SECTION … #define mmMME2_SBAB_STM_BASE … #define MME2_SBAB_STM_MAX_OFFSET … #define MME2_SBAB_STM_SECTION … #define mmMME2_SBAB_CTI_BASE … #define MME2_SBAB_CTI_MAX_OFFSET … #define MME2_SBAB_CTI_SECTION … #define mmMME2_SBAB_ETF_BASE … #define MME2_SBAB_ETF_MAX_OFFSET … #define MME2_SBAB_ETF_SECTION … #define mmMME2_SBAB_SPMU_BASE … #define MME2_SBAB_SPMU_MAX_OFFSET … #define MME2_SBAB_SPMU_SECTION … #define mmMME2_SBAB_CTI0_BASE … #define MME2_SBAB_CTI0_MAX_OFFSET … #define MME2_SBAB_CTI0_SECTION … #define mmMME2_SBAB_CTI1_BASE … #define MME2_SBAB_CTI1_MAX_OFFSET … #define MME2_SBAB_CTI1_SECTION … #define mmMME2_SBAB_BMON0_BASE … #define MME2_SBAB_BMON0_MAX_OFFSET … #define MME2_SBAB_BMON0_SECTION … #define mmMME2_SBAB_BMON1_BASE … #define MME2_SBAB_BMON1_MAX_OFFSET … #define MME2_SBAB_BMON1_SECTION … #define mmMME2_CTRL_STM_BASE … #define MME2_CTRL_STM_MAX_OFFSET … #define MME2_CTRL_STM_SECTION … #define mmMME2_CTRL_CTI_BASE … #define MME2_CTRL_CTI_MAX_OFFSET … #define MME2_CTRL_CTI_SECTION … #define mmMME2_CTRL_ETF_BASE … #define MME2_CTRL_ETF_MAX_OFFSET … #define MME2_CTRL_ETF_SECTION … #define mmMME2_CTRL_SPMU_BASE … #define MME2_CTRL_SPMU_MAX_OFFSET … #define MME2_CTRL_SPMU_SECTION … #define mmMME2_CTRL_CTI0_BASE … #define MME2_CTRL_CTI0_MAX_OFFSET … #define MME2_CTRL_CTI0_SECTION … #define mmMME2_CTRL_CTI1_BASE … #define MME2_CTRL_CTI1_MAX_OFFSET … #define MME2_CTRL_CTI1_SECTION … #define mmMME2_CTRL_BMON0_BASE … #define MME2_CTRL_BMON0_MAX_OFFSET … #define MME2_CTRL_BMON0_SECTION … #define mmMME2_CTRL_BMON1_BASE … #define MME2_CTRL_BMON1_MAX_OFFSET … #define MME2_CTRL_BMON1_SECTION … #define mmMME3_ACC_STM_BASE … #define MME3_ACC_STM_MAX_OFFSET … #define MME3_ACC_STM_SECTION … #define mmMME3_ACC_CTI_BASE … #define MME3_ACC_CTI_MAX_OFFSET … #define MME3_ACC_CTI_SECTION … #define mmMME3_ACC_ETF_BASE … #define MME3_ACC_ETF_MAX_OFFSET … #define MME3_ACC_ETF_SECTION … #define mmMME3_ACC_SPMU_BASE … #define MME3_ACC_SPMU_MAX_OFFSET … #define MME3_ACC_SPMU_SECTION … #define mmMME3_ACC_CTI0_BASE … #define MME3_ACC_CTI0_MAX_OFFSET … #define MME3_ACC_CTI0_SECTION … #define mmMME3_ACC_CTI1_BASE … #define MME3_ACC_CTI1_MAX_OFFSET … #define MME3_ACC_CTI1_SECTION … #define mmMME3_ACC_BMON0_BASE … #define MME3_ACC_BMON0_MAX_OFFSET … #define MME3_ACC_BMON0_SECTION … #define mmMME3_ACC_FUNNEL_BASE … #define MME3_ACC_FUNNEL_MAX_OFFSET … #define MME3_ACC_FUNNEL_SECTION … #define mmMME3_SBAB_STM_BASE … #define MME3_SBAB_STM_MAX_OFFSET … #define MME3_SBAB_STM_SECTION … #define mmMME3_SBAB_CTI_BASE … #define MME3_SBAB_CTI_MAX_OFFSET … #define MME3_SBAB_CTI_SECTION … #define mmMME3_SBAB_ETF_BASE … #define MME3_SBAB_ETF_MAX_OFFSET … #define MME3_SBAB_ETF_SECTION … #define mmMME3_SBAB_SPMU_BASE … #define MME3_SBAB_SPMU_MAX_OFFSET … #define MME3_SBAB_SPMU_SECTION … #define mmMME3_SBAB_CTI0_BASE … #define MME3_SBAB_CTI0_MAX_OFFSET … #define MME3_SBAB_CTI0_SECTION … #define mmMME3_SBAB_CTI1_BASE … #define MME3_SBAB_CTI1_MAX_OFFSET … #define MME3_SBAB_CTI1_SECTION … #define mmMME3_SBAB_BMON0_BASE … #define MME3_SBAB_BMON0_MAX_OFFSET … #define MME3_SBAB_BMON0_SECTION … #define mmMME3_SBAB_BMON1_BASE … #define MME3_SBAB_BMON1_MAX_OFFSET … #define MME3_SBAB_BMON1_SECTION … #define mmMME3_CTRL_STM_BASE … #define MME3_CTRL_STM_MAX_OFFSET … #define MME3_CTRL_STM_SECTION … #define mmMME3_CTRL_CTI_BASE … #define MME3_CTRL_CTI_MAX_OFFSET … #define MME3_CTRL_CTI_SECTION … #define mmMME3_CTRL_ETF_BASE … #define MME3_CTRL_ETF_MAX_OFFSET … #define MME3_CTRL_ETF_SECTION … #define mmMME3_CTRL_SPMU_BASE … #define MME3_CTRL_SPMU_MAX_OFFSET … #define MME3_CTRL_SPMU_SECTION … #define mmMME3_CTRL_CTI0_BASE … #define MME3_CTRL_CTI0_MAX_OFFSET … #define MME3_CTRL_CTI0_SECTION … #define mmMME3_CTRL_CTI1_BASE … #define MME3_CTRL_CTI1_MAX_OFFSET … #define MME3_CTRL_CTI1_SECTION … #define mmMME3_CTRL_BMON0_BASE … #define MME3_CTRL_BMON0_MAX_OFFSET … #define MME3_CTRL_BMON0_SECTION … #define mmMME3_CTRL_BMON1_BASE … #define MME3_CTRL_BMON1_MAX_OFFSET … #define MME3_CTRL_BMON1_SECTION … #define mmIC_ROM_TABLE_BASE … #define IC_ROM_TABLE_MAX_OFFSET … #define IC_ROM_TABLE_SECTION … #define mmSRAM_Y0_X0_FUNNEL_BASE … #define SRAM_Y0_X0_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X0_FUNNEL_SECTION … #define mmSRAM_Y0_X1_FUNNEL_BASE … #define SRAM_Y0_X1_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X1_FUNNEL_SECTION … #define mmSRAM_Y0_X2_FUNNEL_BASE … #define SRAM_Y0_X2_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X2_FUNNEL_SECTION … #define mmSRAM_Y0_X3_FUNNEL_BASE … #define SRAM_Y0_X3_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X3_FUNNEL_SECTION … #define mmSRAM_Y0_X4_FUNNEL_BASE … #define SRAM_Y0_X4_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X4_FUNNEL_SECTION … #define mmSRAM_Y0_X5_FUNNEL_BASE … #define SRAM_Y0_X5_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X5_FUNNEL_SECTION … #define mmSRAM_Y0_X6_FUNNEL_BASE … #define SRAM_Y0_X6_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X6_FUNNEL_SECTION … #define mmSRAM_Y0_X7_FUNNEL_BASE … #define SRAM_Y0_X7_FUNNEL_MAX_OFFSET … #define SRAM_Y0_X7_FUNNEL_SECTION … #define mmSRAM_Y1_X0_FUNNEL_BASE … #define SRAM_Y1_X0_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X0_FUNNEL_SECTION … #define mmSRAM_Y1_X1_FUNNEL_BASE … #define SRAM_Y1_X1_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X1_FUNNEL_SECTION … #define mmSRAM_Y1_X2_FUNNEL_BASE … #define SRAM_Y1_X2_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X2_FUNNEL_SECTION … #define mmSRAM_Y1_X3_FUNNEL_BASE … #define SRAM_Y1_X3_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X3_FUNNEL_SECTION … #define mmSRAM_Y1_X4_FUNNEL_BASE … #define SRAM_Y1_X4_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X4_FUNNEL_SECTION … #define mmSRAM_Y1_X5_FUNNEL_BASE … #define SRAM_Y1_X5_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X5_FUNNEL_SECTION … #define mmSRAM_Y1_X6_FUNNEL_BASE … #define SRAM_Y1_X6_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X6_FUNNEL_SECTION … #define mmSRAM_Y1_X7_FUNNEL_BASE … #define SRAM_Y1_X7_FUNNEL_MAX_OFFSET … #define SRAM_Y1_X7_FUNNEL_SECTION … #define mmSRAM_Y2_X0_FUNNEL_BASE … #define SRAM_Y2_X0_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X0_FUNNEL_SECTION … #define mmSRAM_Y2_X1_FUNNEL_BASE … #define SRAM_Y2_X1_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X1_FUNNEL_SECTION … #define mmSRAM_Y2_X2_FUNNEL_BASE … #define SRAM_Y2_X2_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X2_FUNNEL_SECTION … #define mmSRAM_Y2_X3_FUNNEL_BASE … #define SRAM_Y2_X3_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X3_FUNNEL_SECTION … #define mmSRAM_Y2_X4_FUNNEL_BASE … #define SRAM_Y2_X4_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X4_FUNNEL_SECTION … #define mmSRAM_Y2_X5_FUNNEL_BASE … #define SRAM_Y2_X5_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X5_FUNNEL_SECTION … #define mmSRAM_Y2_X6_FUNNEL_BASE … #define SRAM_Y2_X6_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X6_FUNNEL_SECTION … #define mmSRAM_Y2_X7_FUNNEL_BASE … #define SRAM_Y2_X7_FUNNEL_MAX_OFFSET … #define SRAM_Y2_X7_FUNNEL_SECTION … #define mmSRAM_Y3_X0_FUNNEL_BASE … #define SRAM_Y3_X0_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X0_FUNNEL_SECTION … #define mmSRAM_Y3_X1_FUNNEL_BASE … #define SRAM_Y3_X1_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X1_FUNNEL_SECTION … #define mmSRAM_Y3_X2_FUNNEL_BASE … #define SRAM_Y3_X2_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X2_FUNNEL_SECTION … #define mmSRAM_Y3_X4_FUNNEL_BASE … #define SRAM_Y3_X4_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X4_FUNNEL_SECTION … #define mmSRAM_Y3_X3_FUNNEL_BASE … #define SRAM_Y3_X3_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X3_FUNNEL_SECTION … #define mmSRAM_Y3_X5_FUNNEL_BASE … #define SRAM_Y3_X5_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X5_FUNNEL_SECTION … #define mmSRAM_Y3_X6_FUNNEL_BASE … #define SRAM_Y3_X6_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X6_FUNNEL_SECTION … #define mmSRAM_Y3_X7_FUNNEL_BASE … #define SRAM_Y3_X7_FUNNEL_MAX_OFFSET … #define SRAM_Y3_X7_FUNNEL_SECTION … #define mmIF_ROM_TABLE_BASE … #define IF_ROM_TABLE_MAX_OFFSET … #define IF_ROM_TABLE_SECTION … #define mmSIF_FUNNEL_0_BASE … #define SIF_FUNNEL_0_MAX_OFFSET … #define SIF_FUNNEL_0_SECTION … #define mmSIF_FUNNEL_1_BASE … #define SIF_FUNNEL_1_MAX_OFFSET … #define SIF_FUNNEL_1_SECTION … #define mmSIF_FUNNEL_2_BASE … #define SIF_FUNNEL_2_MAX_OFFSET … #define SIF_FUNNEL_2_SECTION … #define mmSIF_FUNNEL_3_BASE … #define SIF_FUNNEL_3_MAX_OFFSET … #define SIF_FUNNEL_3_SECTION … #define mmSIF_FUNNEL_4_BASE … #define SIF_FUNNEL_4_MAX_OFFSET … #define SIF_FUNNEL_4_SECTION … #define mmSIF_FUNNEL_5_BASE … #define SIF_FUNNEL_5_MAX_OFFSET … #define SIF_FUNNEL_5_SECTION … #define mmSIF_FUNNEL_6_BASE … #define SIF_FUNNEL_6_MAX_OFFSET … #define SIF_FUNNEL_6_SECTION … #define mmSIF_FUNNEL_7_BASE … #define SIF_FUNNEL_7_MAX_OFFSET … #define SIF_FUNNEL_7_SECTION … #define mmNIF_FUNNEL_0_BASE … #define NIF_FUNNEL_0_MAX_OFFSET … #define NIF_FUNNEL_0_SECTION … #define mmNIF_FUNNEL_1_BASE … #define NIF_FUNNEL_1_MAX_OFFSET … #define NIF_FUNNEL_1_SECTION … #define mmNIF_FUNNEL_2_BASE … #define NIF_FUNNEL_2_MAX_OFFSET … #define NIF_FUNNEL_2_SECTION … #define mmNIF_FUNNEL_3_BASE … #define NIF_FUNNEL_3_MAX_OFFSET … #define NIF_FUNNEL_3_SECTION … #define mmNIF_FUNNEL_4_BASE … #define NIF_FUNNEL_4_MAX_OFFSET … #define NIF_FUNNEL_4_SECTION … #define mmNIF_FUNNEL_5_BASE … #define NIF_FUNNEL_5_MAX_OFFSET … #define NIF_FUNNEL_5_SECTION … #define mmNIF_FUNNEL_6_BASE … #define NIF_FUNNEL_6_MAX_OFFSET … #define NIF_FUNNEL_6_SECTION … #define mmNIF_FUNNEL_7_BASE … #define NIF_FUNNEL_7_MAX_OFFSET … #define NIF_FUNNEL_7_SECTION … #define mmDMA_IF_ROM_TABLE_BASE … #define DMA_IF_ROM_TABLE_MAX_OFFSET … #define DMA_IF_ROM_TABLE_SECTION … #define mmDMA_IF_W_S_STM_BASE … #define DMA_IF_W_S_STM_MAX_OFFSET … #define DMA_IF_W_S_STM_SECTION … #define mmDMA_IF_W_S_CTI_BASE … #define DMA_IF_W_S_CTI_MAX_OFFSET … #define DMA_IF_W_S_CTI_SECTION … #define mmDMA_IF_W_S_ETF_BASE … #define DMA_IF_W_S_ETF_MAX_OFFSET … #define DMA_IF_W_S_ETF_SECTION … #define mmDMA_IF_W_S_BMON0_CTI_BASE … #define DMA_IF_W_S_BMON0_CTI_MAX_OFFSET … #define DMA_IF_W_S_BMON0_CTI_SECTION … #define mmDMA_IF_W_S_BMON1_CTI_BASE … #define DMA_IF_W_S_BMON1_CTI_MAX_OFFSET … #define DMA_IF_W_S_BMON1_CTI_SECTION … #define mmDMA_IF_W_S_HBM0_WR_BMON_BASE … #define DMA_IF_W_S_HBM0_WR_BMON_MAX_OFFSET … #define DMA_IF_W_S_HBM0_WR_BMON_SECTION … #define mmDMA_IF_W_S_HBM0_RD_BMON_BASE … #define DMA_IF_W_S_HBM0_RD_BMON_MAX_OFFSET … #define DMA_IF_W_S_HBM0_RD_BMON_SECTION … #define mmDMA_IF_W_S_HBM1_WR_BMON_BASE … #define DMA_IF_W_S_HBM1_WR_BMON_MAX_OFFSET … #define DMA_IF_W_S_HBM1_WR_BMON_SECTION … #define mmDMA_IF_W_S_HBM1_RD_BMON_BASE … #define DMA_IF_W_S_HBM1_RD_BMON_MAX_OFFSET … #define DMA_IF_W_S_HBM1_RD_BMON_SECTION … #define mmDMA_IF_W_S_SOB_WR_BMON_BASE … #define DMA_IF_W_S_SOB_WR_BMON_MAX_OFFSET … #define DMA_IF_W_S_SOB_WR_BMON_SECTION … #define mmDMA_IF_W_S_FUNNEL_BASE … #define DMA_IF_W_S_FUNNEL_MAX_OFFSET … #define DMA_IF_W_S_FUNNEL_SECTION … #define mmDMA_IF_E_S_STM_BASE … #define DMA_IF_E_S_STM_MAX_OFFSET … #define DMA_IF_E_S_STM_SECTION … #define mmDMA_IF_E_S_CTI_BASE … #define DMA_IF_E_S_CTI_MAX_OFFSET … #define DMA_IF_E_S_CTI_SECTION … #define mmDMA_IF_E_S_ETF_BASE … #define DMA_IF_E_S_ETF_MAX_OFFSET … #define DMA_IF_E_S_ETF_SECTION … #define mmDMA_IF_E_S_BMON0_CTI_BASE … #define DMA_IF_E_S_BMON0_CTI_MAX_OFFSET … #define DMA_IF_E_S_BMON0_CTI_SECTION … #define mmDMA_IF_E_S_BMON1_CTI_BASE … #define DMA_IF_E_S_BMON1_CTI_MAX_OFFSET … #define DMA_IF_E_S_BMON1_CTI_SECTION … #define mmDMA_IF_E_S_HBM0_WR_BMON_BASE … #define DMA_IF_E_S_HBM0_WR_BMON_MAX_OFFSET … #define DMA_IF_E_S_HBM0_WR_BMON_SECTION … #define mmDMA_IF_E_S_HBM0_RD_BMON_BASE … #define DMA_IF_E_S_HBM0_RD_BMON_MAX_OFFSET … #define DMA_IF_E_S_HBM0_RD_BMON_SECTION … #define mmDMA_IF_E_S_HBM1_WR_BMON_BASE … #define DMA_IF_E_S_HBM1_WR_BMON_MAX_OFFSET … #define DMA_IF_E_S_HBM1_WR_BMON_SECTION … #define mmDMA_IF_E_S_HBM1_RD_BMON_BASE … #define DMA_IF_E_S_HBM1_RD_BMON_MAX_OFFSET … #define DMA_IF_E_S_HBM1_RD_BMON_SECTION … #define mmDMA_IF_E_S_SOB_WR_BMON_BASE … #define DMA_IF_E_S_SOB_WR_BMON_MAX_OFFSET … #define DMA_IF_E_S_SOB_WR_BMON_SECTION … #define mmDMA_IF_E_S_FUNNEL_BASE … #define DMA_IF_E_S_FUNNEL_MAX_OFFSET … #define DMA_IF_E_S_FUNNEL_SECTION … #define mmDMA_IF_W_N_STM_BASE … #define DMA_IF_W_N_STM_MAX_OFFSET … #define DMA_IF_W_N_STM_SECTION … #define mmDMA_IF_W_N_CTI_BASE … #define DMA_IF_W_N_CTI_MAX_OFFSET … #define DMA_IF_W_N_CTI_SECTION … #define mmDMA_IF_W_N_ETF_BASE … #define DMA_IF_W_N_ETF_MAX_OFFSET … #define DMA_IF_W_N_ETF_SECTION … #define mmDMA_IF_W_N_BMON0_CTI_BASE … #define DMA_IF_W_N_BMON0_CTI_MAX_OFFSET … #define DMA_IF_W_N_BMON0_CTI_SECTION … #define mmDMA_IF_W_N_BMON1_CTI_BASE … #define DMA_IF_W_N_BMON1_CTI_MAX_OFFSET … #define DMA_IF_W_N_BMON1_CTI_SECTION … #define mmDMA_IF_W_N_HBM0_WR_BMON_BASE … #define DMA_IF_W_N_HBM0_WR_BMON_MAX_OFFSET … #define DMA_IF_W_N_HBM0_WR_BMON_SECTION … #define mmDMA_IF_W_N_HBM0_RD_BMON_BASE … #define DMA_IF_W_N_HBM0_RD_BMON_MAX_OFFSET … #define DMA_IF_W_N_HBM0_RD_BMON_SECTION … #define mmDMA_IF_W_N_HBM1_WR_BMON_BASE … #define DMA_IF_W_N_HBM1_WR_BMON_MAX_OFFSET … #define DMA_IF_W_N_HBM1_WR_BMON_SECTION … #define mmDMA_IF_W_N_HBM1_RD_BMON_BASE … #define DMA_IF_W_N_HBM1_RD_BMON_MAX_OFFSET … #define DMA_IF_W_N_HBM1_RD_BMON_SECTION … #define mmDMA_IF_W_N_SOB_WR_BMON_BASE … #define DMA_IF_W_N_SOB_WR_BMON_MAX_OFFSET … #define DMA_IF_W_N_SOB_WR_BMON_SECTION … #define mmDMA_IF_W_N_FUNNEL_BASE … #define DMA_IF_W_N_FUNNEL_MAX_OFFSET … #define DMA_IF_W_N_FUNNEL_SECTION … #define mmDMA_IF_E_N_STM_BASE … #define DMA_IF_E_N_STM_MAX_OFFSET … #define DMA_IF_E_N_STM_SECTION … #define mmDMA_IF_E_N_CTI_BASE … #define DMA_IF_E_N_CTI_MAX_OFFSET … #define DMA_IF_E_N_CTI_SECTION … #define mmDMA_IF_E_N_ETF_BASE … #define DMA_IF_E_N_ETF_MAX_OFFSET … #define DMA_IF_E_N_ETF_SECTION … #define mmDMA_IF_E_N_BMON0_CTI_BASE … #define DMA_IF_E_N_BMON0_CTI_MAX_OFFSET … #define DMA_IF_E_N_BMON0_CTI_SECTION … #define mmDMA_IF_E_N_BMON1_CTI_BASE … #define DMA_IF_E_N_BMON1_CTI_MAX_OFFSET … #define DMA_IF_E_N_BMON1_CTI_SECTION … #define mmDMA_IF_E_N_HBM0_WR_BMON_BASE … #define DMA_IF_E_N_HBM0_WR_BMON_MAX_OFFSET … #define DMA_IF_E_N_HBM0_WR_BMON_SECTION … #define mmDMA_IF_E_N_HBM0_RD_BMON_BASE … #define DMA_IF_E_N_HBM0_RD_BMON_MAX_OFFSET … #define DMA_IF_E_N_HBM0_RD_BMON_SECTION … #define mmDMA_IF_E_N_HBM1_WR_BMON_BASE … #define DMA_IF_E_N_HBM1_WR_BMON_MAX_OFFSET … #define DMA_IF_E_N_HBM1_WR_BMON_SECTION … #define mmDMA_IF_E_N_HBM1_RD_BMON_BASE … #define DMA_IF_E_N_HBM1_RD_BMON_MAX_OFFSET … #define DMA_IF_E_N_HBM1_RD_BMON_SECTION … #define mmDMA_IF_E_N_SOB_WR_BMON_BASE … #define DMA_IF_E_N_SOB_WR_BMON_MAX_OFFSET … #define DMA_IF_E_N_SOB_WR_BMON_SECTION … #define mmDMA_IF_E_N_FUNNEL_BASE … #define DMA_IF_E_N_FUNNEL_MAX_OFFSET … #define DMA_IF_E_N_FUNNEL_SECTION … #define mmCPU_ROM_TABLE_BASE … #define CPU_ROM_TABLE_MAX_OFFSET … #define CPU_ROM_TABLE_SECTION … #define mmCPU_ETF_0_BASE … #define CPU_ETF_0_MAX_OFFSET … #define CPU_ETF_0_SECTION … #define mmCPU_ETF_1_BASE … #define CPU_ETF_1_MAX_OFFSET … #define CPU_ETF_1_SECTION … #define mmCPU_CTI_BASE … #define CPU_CTI_MAX_OFFSET … #define CPU_CTI_SECTION … #define mmCPU_FUNNEL_BASE … #define CPU_FUNNEL_MAX_OFFSET … #define CPU_FUNNEL_SECTION … #define mmCPU_STM_BASE … #define CPU_STM_MAX_OFFSET … #define CPU_STM_SECTION … #define mmCPU_CTI_TRACE_BASE … #define CPU_CTI_TRACE_MAX_OFFSET … #define CPU_CTI_TRACE_SECTION … #define mmCPU_ETF_TRACE_BASE … #define CPU_ETF_TRACE_MAX_OFFSET … #define CPU_ETF_TRACE_SECTION … #define mmCPU_WR_BMON_BASE … #define CPU_WR_BMON_MAX_OFFSET … #define CPU_WR_BMON_SECTION … #define mmCPU_RD_BMON_BASE … #define CPU_RD_BMON_MAX_OFFSET … #define CPU_RD_BMON_SECTION … #define mmDMA_ROM_TABLE_BASE … #define DMA_ROM_TABLE_MAX_OFFSET … #define DMA_ROM_TABLE_SECTION … #define mmDMA_CH_0_CS_STM_BASE … #define DMA_CH_0_CS_STM_MAX_OFFSET … #define DMA_CH_0_CS_STM_SECTION … #define mmDMA_CH_0_CS_CTI_BASE … #define DMA_CH_0_CS_CTI_MAX_OFFSET … #define DMA_CH_0_CS_CTI_SECTION … #define mmDMA_CH_0_CS_ETF_BASE … #define DMA_CH_0_CS_ETF_MAX_OFFSET … #define DMA_CH_0_CS_ETF_SECTION … #define mmDMA_CH_0_CS_SPMU_BASE … #define DMA_CH_0_CS_SPMU_MAX_OFFSET … #define DMA_CH_0_CS_SPMU_SECTION … #define mmDMA_CH_0_BMON_CTI_BASE … #define DMA_CH_0_BMON_CTI_MAX_OFFSET … #define DMA_CH_0_BMON_CTI_SECTION … #define mmDMA_CH_0_USER_CTI_BASE … #define DMA_CH_0_USER_CTI_MAX_OFFSET … #define DMA_CH_0_USER_CTI_SECTION … #define mmDMA_CH_0_BMON_0_BASE … #define DMA_CH_0_BMON_0_MAX_OFFSET … #define DMA_CH_0_BMON_0_SECTION … #define mmDMA_CH_0_BMON_1_BASE … #define DMA_CH_0_BMON_1_MAX_OFFSET … #define DMA_CH_0_BMON_1_SECTION … #define mmDMA_CH_1_CS_STM_BASE … #define DMA_CH_1_CS_STM_MAX_OFFSET … #define DMA_CH_1_CS_STM_SECTION … #define mmDMA_CH_1_CS_CTI_BASE … #define DMA_CH_1_CS_CTI_MAX_OFFSET … #define DMA_CH_1_CS_CTI_SECTION … #define mmDMA_CH_1_CS_ETF_BASE … #define DMA_CH_1_CS_ETF_MAX_OFFSET … #define DMA_CH_1_CS_ETF_SECTION … #define mmDMA_CH_1_CS_SPMU_BASE … #define DMA_CH_1_CS_SPMU_MAX_OFFSET … #define DMA_CH_1_CS_SPMU_SECTION … #define mmDMA_CH_1_BMON_CTI_BASE … #define DMA_CH_1_BMON_CTI_MAX_OFFSET … #define DMA_CH_1_BMON_CTI_SECTION … #define mmDMA_CH_1_USER_CTI_BASE … #define DMA_CH_1_USER_CTI_MAX_OFFSET … #define DMA_CH_1_USER_CTI_SECTION … #define mmDMA_CH_1_BMON_0_BASE … #define DMA_CH_1_BMON_0_MAX_OFFSET … #define DMA_CH_1_BMON_0_SECTION … #define mmDMA_CH_1_BMON_1_BASE … #define DMA_CH_1_BMON_1_MAX_OFFSET … #define DMA_CH_1_BMON_1_SECTION … #define mmDMA_CH_2_CS_STM_BASE … #define DMA_CH_2_CS_STM_MAX_OFFSET … #define DMA_CH_2_CS_STM_SECTION … #define mmDMA_CH_2_CS_CTI_BASE … #define DMA_CH_2_CS_CTI_MAX_OFFSET … #define DMA_CH_2_CS_CTI_SECTION … #define mmDMA_CH_2_CS_ETF_BASE … #define DMA_CH_2_CS_ETF_MAX_OFFSET … #define DMA_CH_2_CS_ETF_SECTION … #define mmDMA_CH_2_CS_SPMU_BASE … #define DMA_CH_2_CS_SPMU_MAX_OFFSET … #define DMA_CH_2_CS_SPMU_SECTION … #define mmDMA_CH_2_BMON_CTI_BASE … #define DMA_CH_2_BMON_CTI_MAX_OFFSET … #define DMA_CH_2_BMON_CTI_SECTION … #define mmDMA_CH_2_USER_CTI_BASE … #define DMA_CH_2_USER_CTI_MAX_OFFSET … #define DMA_CH_2_USER_CTI_SECTION … #define mmDMA_CH_2_BMON_0_BASE … #define DMA_CH_2_BMON_0_MAX_OFFSET … #define DMA_CH_2_BMON_0_SECTION … #define mmDMA_CH_2_BMON_1_BASE … #define DMA_CH_2_BMON_1_MAX_OFFSET … #define DMA_CH_2_BMON_1_SECTION … #define mmDMA_CH_3_CS_STM_BASE … #define DMA_CH_3_CS_STM_MAX_OFFSET … #define DMA_CH_3_CS_STM_SECTION … #define mmDMA_CH_3_CS_CTI_BASE … #define DMA_CH_3_CS_CTI_MAX_OFFSET … #define DMA_CH_3_CS_CTI_SECTION … #define mmDMA_CH_3_CS_ETF_BASE … #define DMA_CH_3_CS_ETF_MAX_OFFSET … #define DMA_CH_3_CS_ETF_SECTION … #define mmDMA_CH_3_CS_SPMU_BASE … #define DMA_CH_3_CS_SPMU_MAX_OFFSET … #define DMA_CH_3_CS_SPMU_SECTION … #define mmDMA_CH_3_BMON_CTI_BASE … #define DMA_CH_3_BMON_CTI_MAX_OFFSET … #define DMA_CH_3_BMON_CTI_SECTION … #define mmDMA_CH_3_USER_CTI_BASE … #define DMA_CH_3_USER_CTI_MAX_OFFSET … #define DMA_CH_3_USER_CTI_SECTION … #define mmDMA_CH_3_BMON_0_BASE … #define DMA_CH_3_BMON_0_MAX_OFFSET … #define DMA_CH_3_BMON_0_SECTION … #define mmDMA_CH_3_BMON_1_BASE … #define DMA_CH_3_BMON_1_MAX_OFFSET … #define DMA_CH_3_BMON_1_SECTION … #define mmDMA_CH_4_CS_STM_BASE … #define DMA_CH_4_CS_STM_MAX_OFFSET … #define DMA_CH_4_CS_STM_SECTION … #define mmDMA_CH_4_CS_CTI_BASE … #define DMA_CH_4_CS_CTI_MAX_OFFSET … #define DMA_CH_4_CS_CTI_SECTION … #define mmDMA_CH_4_CS_ETF_BASE … #define DMA_CH_4_CS_ETF_MAX_OFFSET … #define DMA_CH_4_CS_ETF_SECTION … #define mmDMA_CH_4_CS_SPMU_BASE … #define DMA_CH_4_CS_SPMU_MAX_OFFSET … #define DMA_CH_4_CS_SPMU_SECTION … #define mmDMA_CH_4_BMON_CTI_BASE … #define DMA_CH_4_BMON_CTI_MAX_OFFSET … #define DMA_CH_4_BMON_CTI_SECTION … #define mmDMA_CH_4_USER_CTI_BASE … #define DMA_CH_4_USER_CTI_MAX_OFFSET … #define DMA_CH_4_USER_CTI_SECTION … #define mmDMA_CH_4_BMON_0_BASE … #define DMA_CH_4_BMON_0_MAX_OFFSET … #define DMA_CH_4_BMON_0_SECTION … #define mmDMA_CH_4_BMON_1_BASE … #define DMA_CH_4_BMON_1_MAX_OFFSET … #define DMA_CH_4_BMON_1_SECTION … #define mmDMA_CH_5_CS_STM_BASE … #define DMA_CH_5_CS_STM_MAX_OFFSET … #define DMA_CH_5_CS_STM_SECTION … #define mmDMA_CH_5_CS_CTI_BASE … #define DMA_CH_5_CS_CTI_MAX_OFFSET … #define DMA_CH_5_CS_CTI_SECTION … #define mmDMA_CH_5_CS_ETF_BASE … #define DMA_CH_5_CS_ETF_MAX_OFFSET … #define DMA_CH_5_CS_ETF_SECTION … #define mmDMA_CH_5_CS_SPMU_BASE … #define DMA_CH_5_CS_SPMU_MAX_OFFSET … #define DMA_CH_5_CS_SPMU_SECTION … #define mmDMA_CH_5_BMON_CTI_BASE … #define DMA_CH_5_BMON_CTI_MAX_OFFSET … #define DMA_CH_5_BMON_CTI_SECTION … #define mmDMA_CH_5_USER_CTI_BASE … #define DMA_CH_5_USER_CTI_MAX_OFFSET … #define DMA_CH_5_USER_CTI_SECTION … #define mmDMA_CH_5_BMON_0_BASE … #define DMA_CH_5_BMON_0_MAX_OFFSET … #define DMA_CH_5_BMON_0_SECTION … #define mmDMA_CH_5_BMON_1_BASE … #define DMA_CH_5_BMON_1_MAX_OFFSET … #define DMA_CH_5_BMON_1_SECTION … #define mmDMA_CH_6_CS_STM_BASE … #define DMA_CH_6_CS_STM_MAX_OFFSET … #define DMA_CH_6_CS_STM_SECTION … #define mmDMA_CH_6_CS_CTI_BASE … #define DMA_CH_6_CS_CTI_MAX_OFFSET … #define DMA_CH_6_CS_CTI_SECTION … #define mmDMA_CH_6_CS_ETF_BASE … #define DMA_CH_6_CS_ETF_MAX_OFFSET … #define DMA_CH_6_CS_ETF_SECTION … #define mmDMA_CH_6_CS_SPMU_BASE … #define DMA_CH_6_CS_SPMU_MAX_OFFSET … #define DMA_CH_6_CS_SPMU_SECTION … #define mmDMA_CH_6_BMON_CTI_BASE … #define DMA_CH_6_BMON_CTI_MAX_OFFSET … #define DMA_CH_6_BMON_CTI_SECTION … #define mmDMA_CH_6_USER_CTI_BASE … #define DMA_CH_6_USER_CTI_MAX_OFFSET … #define DMA_CH_6_USER_CTI_SECTION … #define mmDMA_CH_6_BMON_0_BASE … #define DMA_CH_6_BMON_0_MAX_OFFSET … #define DMA_CH_6_BMON_0_SECTION … #define mmDMA_CH_6_BMON_1_BASE … #define DMA_CH_6_BMON_1_MAX_OFFSET … #define DMA_CH_6_BMON_1_SECTION … #define mmDMA_CH_7_CS_STM_BASE … #define DMA_CH_7_CS_STM_MAX_OFFSET … #define DMA_CH_7_CS_STM_SECTION … #define mmDMA_CH_7_CS_CTI_BASE … #define DMA_CH_7_CS_CTI_MAX_OFFSET … #define DMA_CH_7_CS_CTI_SECTION … #define mmDMA_CH_7_CS_ETF_BASE … #define DMA_CH_7_CS_ETF_MAX_OFFSET … #define DMA_CH_7_CS_ETF_SECTION … #define mmDMA_CH_7_CS_SPMU_BASE … #define DMA_CH_7_CS_SPMU_MAX_OFFSET … #define DMA_CH_7_CS_SPMU_SECTION … #define mmDMA_CH_7_BMON_CTI_BASE … #define DMA_CH_7_BMON_CTI_MAX_OFFSET … #define DMA_CH_7_BMON_CTI_SECTION … #define mmDMA_CH_7_USER_CTI_BASE … #define DMA_CH_7_USER_CTI_MAX_OFFSET … #define DMA_CH_7_USER_CTI_SECTION … #define mmDMA_CH_7_BMON_0_BASE … #define DMA_CH_7_BMON_0_MAX_OFFSET … #define DMA_CH_7_BMON_0_SECTION … #define mmDMA_CH_7_BMON_1_BASE … #define DMA_CH_7_BMON_1_MAX_OFFSET … #define DMA_CH_7_BMON_1_SECTION … #define mmNIC_TPC_FUNNEL_W_S_BASE … #define NIC_TPC_FUNNEL_W_S_MAX_OFFSET … #define NIC_TPC_FUNNEL_W_S_SECTION … #define mmNIC_TPC_FUNNEL_E_S_BASE … #define NIC_TPC_FUNNEL_E_S_MAX_OFFSET … #define NIC_TPC_FUNNEL_E_S_SECTION … #define mmNIC_TPC_FUNNEL_W_N_BASE … #define NIC_TPC_FUNNEL_W_N_MAX_OFFSET … #define NIC_TPC_FUNNEL_W_N_SECTION … #define mmNIC_TPC_FUNNEL_E_N_BASE … #define NIC_TPC_FUNNEL_E_N_MAX_OFFSET … #define NIC_TPC_FUNNEL_E_N_SECTION … #define mmCA53_BASE … #define CA53_MAX_OFFSET … #define CA53_SECTION … #define mmPCI_ROM_TABLE_BASE … #define PCI_ROM_TABLE_MAX_OFFSET … #define PCI_ROM_TABLE_SECTION … #define mmPCIE_STM_BASE … #define PCIE_STM_MAX_OFFSET … #define PCIE_STM_SECTION … #define mmPCIE_ETF_BASE … #define PCIE_ETF_MAX_OFFSET … #define PCIE_ETF_SECTION … #define mmPCIE_CTI_0_BASE … #define PCIE_CTI_0_MAX_OFFSET … #define PCIE_CTI_0_SECTION … #define mmPCIE_SPMU_BASE … #define PCIE_SPMU_MAX_OFFSET … #define PCIE_SPMU_SECTION … #define mmPCIE_CTI_1_BASE … #define PCIE_CTI_1_MAX_OFFSET … #define PCIE_CTI_1_SECTION … #define mmPCIE_FUNNEL_BASE … #define PCIE_FUNNEL_MAX_OFFSET … #define PCIE_FUNNEL_SECTION … #define mmPCIE_BMON_MSTR_WR_BASE … #define PCIE_BMON_MSTR_WR_MAX_OFFSET … #define PCIE_BMON_MSTR_WR_SECTION … #define mmPCIE_BMON_MSTR_RD_BASE … #define PCIE_BMON_MSTR_RD_MAX_OFFSET … #define PCIE_BMON_MSTR_RD_SECTION … #define mmPCIE_BMON_SLV_WR_BASE … #define PCIE_BMON_SLV_WR_MAX_OFFSET … #define PCIE_BMON_SLV_WR_SECTION … #define mmPCIE_BMON_SLV_RD_BASE … #define PCIE_BMON_SLV_RD_MAX_OFFSET … #define PCIE_BMON_SLV_RD_SECTION … #define mmMMU_CS_STM_BASE … #define MMU_CS_STM_MAX_OFFSET … #define MMU_CS_STM_SECTION … #define mmMMU_CS_CTI_BASE … #define MMU_CS_CTI_MAX_OFFSET … #define MMU_CS_CTI_SECTION … #define mmMMU_CS_ETF_BASE … #define MMU_CS_ETF_MAX_OFFSET … #define MMU_CS_ETF_SECTION … #define mmMMU_CS_SPMU_BASE … #define MMU_CS_SPMU_MAX_OFFSET … #define MMU_CS_SPMU_SECTION … #define mmMMU_BMON_CTI_BASE … #define MMU_BMON_CTI_MAX_OFFSET … #define MMU_BMON_CTI_SECTION … #define mmMMU_USER_CTI_BASE … #define MMU_USER_CTI_MAX_OFFSET … #define MMU_USER_CTI_SECTION … #define mmMMU_BMON_0_BASE … #define MMU_BMON_0_MAX_OFFSET … #define MMU_BMON_0_SECTION … #define mmMMU_BMON_1_BASE … #define MMU_BMON_1_MAX_OFFSET … #define MMU_BMON_1_SECTION … #define mmPSOC_CTI_BASE … #define PSOC_CTI_MAX_OFFSET … #define PSOC_CTI_SECTION … #define mmPSOC_STM_BASE … #define PSOC_STM_MAX_OFFSET … #define PSOC_STM_SECTION … #define mmPSOC_FUNNEL_BASE … #define PSOC_FUNNEL_MAX_OFFSET … #define PSOC_FUNNEL_SECTION … #define mmPSOC_ETR_BASE … #define PSOC_ETR_MAX_OFFSET … #define PSOC_ETR_SECTION … #define mmPSOC_ETF_BASE … #define PSOC_ETF_MAX_OFFSET … #define PSOC_ETF_SECTION … #define mmPSOC_TS_CTI_BASE … #define PSOC_TS_CTI_MAX_OFFSET … #define PSOC_TS_CTI_SECTION … #define mmTOP_ROM_TABLE_BASE … #define TOP_ROM_TABLE_MAX_OFFSET … #define TOP_ROM_TABLE_SECTION … #define mmNIC0_ROM_TABLE_BASE … #define NIC0_ROM_TABLE_MAX_OFFSET … #define NIC0_ROM_TABLE_SECTION … #define mmSTM_0_NIC0_DBG_BASE … #define STM_0_NIC0_DBG_MAX_OFFSET … #define STM_0_NIC0_DBG_SECTION … #define mmCTI_0_NIC0_DBG_BASE … #define CTI_0_NIC0_DBG_MAX_OFFSET … #define CTI_0_NIC0_DBG_SECTION … #define mmETF_0_NIC0_DBG_BASE … #define ETF_0_NIC0_DBG_MAX_OFFSET … #define ETF_0_NIC0_DBG_SECTION … #define mmSPMU_0_NIC0_DBG_BASE … #define SPMU_0_NIC0_DBG_MAX_OFFSET … #define SPMU_0_NIC0_DBG_SECTION … #define mmUSER_CTI_0_NIC0_DBG_BASE … #define USER_CTI_0_NIC0_DBG_MAX_OFFSET … #define USER_CTI_0_NIC0_DBG_SECTION … #define mmSTM_1_NIC0_DBG_BASE … #define STM_1_NIC0_DBG_MAX_OFFSET … #define STM_1_NIC0_DBG_SECTION … #define mmCTI_1_NIC0_DBG_BASE … #define CTI_1_NIC0_DBG_MAX_OFFSET … #define CTI_1_NIC0_DBG_SECTION … #define mmETF_1_NIC0_DBG_BASE … #define ETF_1_NIC0_DBG_MAX_OFFSET … #define ETF_1_NIC0_DBG_SECTION … #define mmSPMU_1_NIC0_DBG_BASE … #define SPMU_1_NIC0_DBG_MAX_OFFSET … #define SPMU_1_NIC0_DBG_SECTION … #define mmBMON_CTI_NIC0_DBG_BASE … #define BMON_CTI_NIC0_DBG_MAX_OFFSET … #define BMON_CTI_NIC0_DBG_SECTION … #define mmUSER_CTI_1_NIC0_DBG_BASE … #define USER_CTI_1_NIC0_DBG_MAX_OFFSET … #define USER_CTI_1_NIC0_DBG_SECTION … #define mmBMON0_NIC0_DBG_BASE … #define BMON0_NIC0_DBG_MAX_OFFSET … #define BMON0_NIC0_DBG_SECTION … #define mmBMON1_NIC0_DBG_BASE … #define BMON1_NIC0_DBG_MAX_OFFSET … #define BMON1_NIC0_DBG_SECTION … #define mmBMON2_NIC0_DBG_BASE … #define BMON2_NIC0_DBG_MAX_OFFSET … #define BMON2_NIC0_DBG_SECTION … #define mmBMON3_NIC0_DBG_BASE … #define BMON3_NIC0_DBG_MAX_OFFSET … #define BMON3_NIC0_DBG_SECTION … #define mmBMON4_NIC0_DBG_BASE … #define BMON4_NIC0_DBG_MAX_OFFSET … #define BMON4_NIC0_DBG_SECTION … #define mmFUNNEL_NIC0_DBG_BASE … #define FUNNEL_NIC0_DBG_MAX_OFFSET … #define FUNNEL_NIC0_DBG_SECTION … #define mmNIC1_ROM_TABLE_BASE … #define NIC1_ROM_TABLE_MAX_OFFSET … #define NIC1_ROM_TABLE_SECTION … #define mmSTM_0_NIC1_DBG_BASE … #define STM_0_NIC1_DBG_MAX_OFFSET … #define STM_0_NIC1_DBG_SECTION … #define mmCTI_0_NIC1_DBG_BASE … #define CTI_0_NIC1_DBG_MAX_OFFSET … #define CTI_0_NIC1_DBG_SECTION … #define mmETF_0_NIC1_DBG_BASE … #define ETF_0_NIC1_DBG_MAX_OFFSET … #define ETF_0_NIC1_DBG_SECTION … #define mmSPMU_0_NIC1_DBG_BASE … #define SPMU_0_NIC1_DBG_MAX_OFFSET … #define SPMU_0_NIC1_DBG_SECTION … #define mmUSER_CTI_0_NIC1_DBG_BASE … #define USER_CTI_0_NIC1_DBG_MAX_OFFSET … #define USER_CTI_0_NIC1_DBG_SECTION … #define mmSTM_1_NIC1_DBG_BASE … #define STM_1_NIC1_DBG_MAX_OFFSET … #define STM_1_NIC1_DBG_SECTION … #define mmCTI_1_NIC1_DBG_BASE … #define CTI_1_NIC1_DBG_MAX_OFFSET … #define CTI_1_NIC1_DBG_SECTION … #define mmETF_1_NIC1_DBG_BASE … #define ETF_1_NIC1_DBG_MAX_OFFSET … #define ETF_1_NIC1_DBG_SECTION … #define mmSPMU_1_NIC1_DBG_BASE … #define SPMU_1_NIC1_DBG_MAX_OFFSET … #define SPMU_1_NIC1_DBG_SECTION … #define mmBMON_CTI_NIC1_DBG_BASE … #define BMON_CTI_NIC1_DBG_MAX_OFFSET … #define BMON_CTI_NIC1_DBG_SECTION … #define mmUSER_CTI_1_NIC1_DBG_BASE … #define USER_CTI_1_NIC1_DBG_MAX_OFFSET … #define USER_CTI_1_NIC1_DBG_SECTION … #define mmBMON0_NIC1_DBG_BASE … #define BMON0_NIC1_DBG_MAX_OFFSET … #define BMON0_NIC1_DBG_SECTION … #define mmBMON1_NIC1_DBG_BASE … #define BMON1_NIC1_DBG_MAX_OFFSET … #define BMON1_NIC1_DBG_SECTION … #define mmBMON2_NIC1_DBG_BASE … #define BMON2_NIC1_DBG_MAX_OFFSET … #define BMON2_NIC1_DBG_SECTION … #define mmBMON3_NIC1_DBG_BASE … #define BMON3_NIC1_DBG_MAX_OFFSET … #define BMON3_NIC1_DBG_SECTION … #define mmBMON4_NIC1_DBG_BASE … #define BMON4_NIC1_DBG_MAX_OFFSET … #define BMON4_NIC1_DBG_SECTION … #define mmFUNNEL_NIC1_DBG_BASE … #define FUNNEL_NIC1_DBG_MAX_OFFSET … #define FUNNEL_NIC1_DBG_SECTION … #define mmNIC2_ROM_TABLE_BASE … #define NIC2_ROM_TABLE_MAX_OFFSET … #define NIC2_ROM_TABLE_SECTION … #define mmSTM_0_NIC2_DBG_BASE … #define STM_0_NIC2_DBG_MAX_OFFSET … #define STM_0_NIC2_DBG_SECTION … #define mmCTI_0_NIC2_DBG_BASE … #define CTI_0_NIC2_DBG_MAX_OFFSET … #define CTI_0_NIC2_DBG_SECTION … #define mmETF_0_NIC2_DBG_BASE … #define ETF_0_NIC2_DBG_MAX_OFFSET … #define ETF_0_NIC2_DBG_SECTION … #define mmSPMU_0_NIC2_DBG_BASE … #define SPMU_0_NIC2_DBG_MAX_OFFSET … #define SPMU_0_NIC2_DBG_SECTION … #define mmUSER_CTI_0_NIC2_DBG_BASE … #define USER_CTI_0_NIC2_DBG_MAX_OFFSET … #define USER_CTI_0_NIC2_DBG_SECTION … #define mmSTM_1_NIC2_DBG_BASE … #define STM_1_NIC2_DBG_MAX_OFFSET … #define STM_1_NIC2_DBG_SECTION … #define mmCTI_1_NIC2_DBG_BASE … #define CTI_1_NIC2_DBG_MAX_OFFSET … #define CTI_1_NIC2_DBG_SECTION … #define mmETF_1_NIC2_DBG_BASE … #define ETF_1_NIC2_DBG_MAX_OFFSET … #define ETF_1_NIC2_DBG_SECTION … #define mmSPMU_1_NIC2_DBG_BASE … #define SPMU_1_NIC2_DBG_MAX_OFFSET … #define SPMU_1_NIC2_DBG_SECTION … #define mmBMON_CTI_NIC2_DBG_BASE … #define BMON_CTI_NIC2_DBG_MAX_OFFSET … #define BMON_CTI_NIC2_DBG_SECTION … #define mmUSER_CTI_1_NIC2_DBG_BASE … #define USER_CTI_1_NIC2_DBG_MAX_OFFSET … #define USER_CTI_1_NIC2_DBG_SECTION … #define mmBMON0_NIC2_DBG_BASE … #define BMON0_NIC2_DBG_MAX_OFFSET … #define BMON0_NIC2_DBG_SECTION … #define mmBMON1_NIC2_DBG_BASE … #define BMON1_NIC2_DBG_MAX_OFFSET … #define BMON1_NIC2_DBG_SECTION … #define mmBMON2_NIC2_DBG_BASE … #define BMON2_NIC2_DBG_MAX_OFFSET … #define BMON2_NIC2_DBG_SECTION … #define mmBMON3_NIC2_DBG_BASE … #define BMON3_NIC2_DBG_MAX_OFFSET … #define BMON3_NIC2_DBG_SECTION … #define mmBMON4_NIC2_DBG_BASE … #define BMON4_NIC2_DBG_MAX_OFFSET … #define BMON4_NIC2_DBG_SECTION … #define mmFUNNEL_NIC2_DBG_BASE … #define FUNNEL_NIC2_DBG_MAX_OFFSET … #define FUNNEL_NIC2_DBG_SECTION … #define mmNIC3_ROM_TABLE_BASE … #define NIC3_ROM_TABLE_MAX_OFFSET … #define NIC3_ROM_TABLE_SECTION … #define mmSTM_0_NIC3_DBG_BASE … #define STM_0_NIC3_DBG_MAX_OFFSET … #define STM_0_NIC3_DBG_SECTION … #define mmCTI_0_NIC3_DBG_BASE … #define CTI_0_NIC3_DBG_MAX_OFFSET … #define CTI_0_NIC3_DBG_SECTION … #define mmETF_0_NIC3_DBG_BASE … #define ETF_0_NIC3_DBG_MAX_OFFSET … #define ETF_0_NIC3_DBG_SECTION … #define mmSPMU_0_NIC3_DBG_BASE … #define SPMU_0_NIC3_DBG_MAX_OFFSET … #define SPMU_0_NIC3_DBG_SECTION … #define mmUSER_CTI_0_NIC3_DBG_BASE … #define USER_CTI_0_NIC3_DBG_MAX_OFFSET … #define USER_CTI_0_NIC3_DBG_SECTION … #define mmSTM_1_NIC3_DBG_BASE … #define STM_1_NIC3_DBG_MAX_OFFSET … #define STM_1_NIC3_DBG_SECTION … #define mmCTI_1_NIC3_DBG_BASE … #define CTI_1_NIC3_DBG_MAX_OFFSET … #define CTI_1_NIC3_DBG_SECTION … #define mmETF_1_NIC3_DBG_BASE … #define ETF_1_NIC3_DBG_MAX_OFFSET … #define ETF_1_NIC3_DBG_SECTION … #define mmSPMU_1_NIC3_DBG_BASE … #define SPMU_1_NIC3_DBG_MAX_OFFSET … #define SPMU_1_NIC3_DBG_SECTION … #define mmBMON_CTI_NIC3_DBG_BASE … #define BMON_CTI_NIC3_DBG_MAX_OFFSET … #define BMON_CTI_NIC3_DBG_SECTION … #define mmUSER_CTI_1_NIC3_DBG_BASE … #define USER_CTI_1_NIC3_DBG_MAX_OFFSET … #define USER_CTI_1_NIC3_DBG_SECTION … #define mmBMON0_NIC3_DBG_BASE … #define BMON0_NIC3_DBG_MAX_OFFSET … #define BMON0_NIC3_DBG_SECTION … #define mmBMON1_NIC3_DBG_BASE … #define BMON1_NIC3_DBG_MAX_OFFSET … #define BMON1_NIC3_DBG_SECTION … #define mmBMON2_NIC3_DBG_BASE … #define BMON2_NIC3_DBG_MAX_OFFSET … #define BMON2_NIC3_DBG_SECTION … #define mmBMON3_NIC3_DBG_BASE … #define BMON3_NIC3_DBG_MAX_OFFSET … #define BMON3_NIC3_DBG_SECTION … #define mmBMON4_NIC3_DBG_BASE … #define BMON4_NIC3_DBG_MAX_OFFSET … #define BMON4_NIC3_DBG_SECTION … #define mmFUNNEL_NIC3_DBG_BASE … #define FUNNEL_NIC3_DBG_MAX_OFFSET … #define FUNNEL_NIC3_DBG_SECTION … #define mmNIC4_ROM_TABLE_BASE … #define NIC4_ROM_TABLE_MAX_OFFSET … #define NIC4_ROM_TABLE_SECTION … #define mmSTM_0_NIC4_DBG_BASE … #define STM_0_NIC4_DBG_MAX_OFFSET … #define STM_0_NIC4_DBG_SECTION … #define mmCTI_0_NIC4_DBG_BASE … #define CTI_0_NIC4_DBG_MAX_OFFSET … #define CTI_0_NIC4_DBG_SECTION … #define mmETF_0_NIC4_DBG_BASE … #define ETF_0_NIC4_DBG_MAX_OFFSET … #define ETF_0_NIC4_DBG_SECTION … #define mmSPMU_0_NIC4_DBG_BASE … #define SPMU_0_NIC4_DBG_MAX_OFFSET … #define SPMU_0_NIC4_DBG_SECTION … #define mmUSER_CTI_0_NIC4_DBG_BASE … #define USER_CTI_0_NIC4_DBG_MAX_OFFSET … #define USER_CTI_0_NIC4_DBG_SECTION … #define mmSTM_1_NIC4_DBG_BASE … #define STM_1_NIC4_DBG_MAX_OFFSET … #define STM_1_NIC4_DBG_SECTION … #define mmCTI_1_NIC4_DBG_BASE … #define CTI_1_NIC4_DBG_MAX_OFFSET … #define CTI_1_NIC4_DBG_SECTION … #define mmETF_1_NIC4_DBG_BASE … #define ETF_1_NIC4_DBG_MAX_OFFSET … #define ETF_1_NIC4_DBG_SECTION … #define mmSPMU_1_NIC4_DBG_BASE … #define SPMU_1_NIC4_DBG_MAX_OFFSET … #define SPMU_1_NIC4_DBG_SECTION … #define mmBMON_CTI_NIC4_DBG_BASE … #define BMON_CTI_NIC4_DBG_MAX_OFFSET … #define BMON_CTI_NIC4_DBG_SECTION … #define mmUSER_CTI_1_NIC4_DBG_BASE … #define USER_CTI_1_NIC4_DBG_MAX_OFFSET … #define USER_CTI_1_NIC4_DBG_SECTION … #define mmBMON0_NIC4_DBG_BASE … #define BMON0_NIC4_DBG_MAX_OFFSET … #define BMON0_NIC4_DBG_SECTION … #define mmBMON1_NIC4_DBG_BASE … #define BMON1_NIC4_DBG_MAX_OFFSET … #define BMON1_NIC4_DBG_SECTION … #define mmBMON2_NIC4_DBG_BASE … #define BMON2_NIC4_DBG_MAX_OFFSET … #define BMON2_NIC4_DBG_SECTION … #define mmBMON3_NIC4_DBG_BASE … #define BMON3_NIC4_DBG_MAX_OFFSET … #define BMON3_NIC4_DBG_SECTION … #define mmBMON4_NIC4_DBG_BASE … #define BMON4_NIC4_DBG_MAX_OFFSET … #define BMON4_NIC4_DBG_SECTION … #define mmFUNNEL_NIC4_DBG_BASE … #define FUNNEL_NIC4_DBG_MAX_OFFSET … #define FUNNEL_NIC4_DBG_SECTION … #define mmTPC0_ROM_TABLE_BASE … #define TPC0_ROM_TABLE_MAX_OFFSET … #define TPC0_ROM_TABLE_SECTION … #define mmTPC0_EML_SPMU_BASE … #define TPC0_EML_SPMU_MAX_OFFSET … #define TPC0_EML_SPMU_SECTION … #define mmTPC0_EML_ETF_BASE … #define TPC0_EML_ETF_MAX_OFFSET … #define TPC0_EML_ETF_SECTION … #define mmTPC0_EML_STM_BASE … #define TPC0_EML_STM_MAX_OFFSET … #define TPC0_EML_STM_SECTION … #define mmTPC0_EML_CTI_BASE … #define TPC0_EML_CTI_MAX_OFFSET … #define TPC0_EML_CTI_SECTION … #define mmTPC0_EML_FUNNEL_BASE … #define TPC0_EML_FUNNEL_MAX_OFFSET … #define TPC0_EML_FUNNEL_SECTION … #define mmTPC0_EML_BUSMON_0_BASE … #define TPC0_EML_BUSMON_0_MAX_OFFSET … #define TPC0_EML_BUSMON_0_SECTION … #define mmTPC0_EML_BUSMON_1_BASE … #define TPC0_EML_BUSMON_1_MAX_OFFSET … #define TPC0_EML_BUSMON_1_SECTION … #define mmTPC0_EML_BUSMON_2_BASE … #define TPC0_EML_BUSMON_2_MAX_OFFSET … #define TPC0_EML_BUSMON_2_SECTION … #define mmTPC0_EML_BUSMON_3_BASE … #define TPC0_EML_BUSMON_3_MAX_OFFSET … #define TPC0_EML_BUSMON_3_SECTION … #define mmTPC0_EML_CFG_BASE … #define TPC0_EML_CFG_MAX_OFFSET … #define TPC0_EML_CFG_SECTION … #define mmTPC0_EML_TPC_CFG_BASE … #define TPC0_EML_TPC_CFG_MAX_OFFSET … #define TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC0_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC0_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC0_EML_TPC_CFG_BASE … #define KERNEL_TPC0_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC0_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC0_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC0_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC0_EML_TPC_CFG_SECTION … #define mmQM_TPC0_EML_TPC_CFG_BASE … #define QM_TPC0_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC0_EML_TPC_CFG_SECTION … #define mmTPC0_EML_TPC_QM_BASE … #define TPC0_EML_TPC_QM_MAX_OFFSET … #define TPC0_EML_TPC_QM_SECTION … #define mmTPC0_EML_CS_BASE … #define TPC0_EML_CS_MAX_OFFSET … #define TPC0_EML_CS_SECTION … #define mmTPC1_ROM_TABLE_BASE … #define TPC1_ROM_TABLE_MAX_OFFSET … #define TPC1_ROM_TABLE_SECTION … #define mmTPC1_EML_SPMU_BASE … #define TPC1_EML_SPMU_MAX_OFFSET … #define TPC1_EML_SPMU_SECTION … #define mmTPC1_EML_ETF_BASE … #define TPC1_EML_ETF_MAX_OFFSET … #define TPC1_EML_ETF_SECTION … #define mmTPC1_EML_STM_BASE … #define TPC1_EML_STM_MAX_OFFSET … #define TPC1_EML_STM_SECTION … #define mmTPC1_EML_CTI_BASE … #define TPC1_EML_CTI_MAX_OFFSET … #define TPC1_EML_CTI_SECTION … #define mmTPC1_EML_FUNNEL_BASE … #define TPC1_EML_FUNNEL_MAX_OFFSET … #define TPC1_EML_FUNNEL_SECTION … #define mmTPC1_EML_BUSMON_0_BASE … #define TPC1_EML_BUSMON_0_MAX_OFFSET … #define TPC1_EML_BUSMON_0_SECTION … #define mmTPC1_EML_BUSMON_1_BASE … #define TPC1_EML_BUSMON_1_MAX_OFFSET … #define TPC1_EML_BUSMON_1_SECTION … #define mmTPC1_EML_BUSMON_2_BASE … #define TPC1_EML_BUSMON_2_MAX_OFFSET … #define TPC1_EML_BUSMON_2_SECTION … #define mmTPC1_EML_BUSMON_3_BASE … #define TPC1_EML_BUSMON_3_MAX_OFFSET … #define TPC1_EML_BUSMON_3_SECTION … #define mmTPC1_EML_CFG_BASE … #define TPC1_EML_CFG_MAX_OFFSET … #define TPC1_EML_CFG_SECTION … #define mmTPC1_EML_TPC_CFG_BASE … #define TPC1_EML_TPC_CFG_MAX_OFFSET … #define TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC1_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC1_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC1_EML_TPC_CFG_BASE … #define KERNEL_TPC1_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC1_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC1_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC1_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC1_EML_TPC_CFG_SECTION … #define mmQM_TPC1_EML_TPC_CFG_BASE … #define QM_TPC1_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC1_EML_TPC_CFG_SECTION … #define mmTPC1_EML_TPC_QM_BASE … #define TPC1_EML_TPC_QM_MAX_OFFSET … #define TPC1_EML_TPC_QM_SECTION … #define mmTPC1_EML_CS_BASE … #define TPC1_EML_CS_MAX_OFFSET … #define TPC1_EML_CS_SECTION … #define mmTPC2_ROM_TABLE_BASE … #define TPC2_ROM_TABLE_MAX_OFFSET … #define TPC2_ROM_TABLE_SECTION … #define mmTPC2_EML_SPMU_BASE … #define TPC2_EML_SPMU_MAX_OFFSET … #define TPC2_EML_SPMU_SECTION … #define mmTPC2_EML_ETF_BASE … #define TPC2_EML_ETF_MAX_OFFSET … #define TPC2_EML_ETF_SECTION … #define mmTPC2_EML_STM_BASE … #define TPC2_EML_STM_MAX_OFFSET … #define TPC2_EML_STM_SECTION … #define mmTPC2_EML_CTI_BASE … #define TPC2_EML_CTI_MAX_OFFSET … #define TPC2_EML_CTI_SECTION … #define mmTPC2_EML_FUNNEL_BASE … #define TPC2_EML_FUNNEL_MAX_OFFSET … #define TPC2_EML_FUNNEL_SECTION … #define mmTPC2_EML_BUSMON_0_BASE … #define TPC2_EML_BUSMON_0_MAX_OFFSET … #define TPC2_EML_BUSMON_0_SECTION … #define mmTPC2_EML_BUSMON_1_BASE … #define TPC2_EML_BUSMON_1_MAX_OFFSET … #define TPC2_EML_BUSMON_1_SECTION … #define mmTPC2_EML_BUSMON_2_BASE … #define TPC2_EML_BUSMON_2_MAX_OFFSET … #define TPC2_EML_BUSMON_2_SECTION … #define mmTPC2_EML_BUSMON_3_BASE … #define TPC2_EML_BUSMON_3_MAX_OFFSET … #define TPC2_EML_BUSMON_3_SECTION … #define mmTPC2_EML_CFG_BASE … #define TPC2_EML_CFG_MAX_OFFSET … #define TPC2_EML_CFG_SECTION … #define mmTPC2_EML_TPC_CFG_BASE … #define TPC2_EML_TPC_CFG_MAX_OFFSET … #define TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC2_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC2_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC2_EML_TPC_CFG_BASE … #define KERNEL_TPC2_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC2_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC2_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC2_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC2_EML_TPC_CFG_SECTION … #define mmQM_TPC2_EML_TPC_CFG_BASE … #define QM_TPC2_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC2_EML_TPC_CFG_SECTION … #define mmTPC2_EML_TPC_QM_BASE … #define TPC2_EML_TPC_QM_MAX_OFFSET … #define TPC2_EML_TPC_QM_SECTION … #define mmTPC2_EML_CS_BASE … #define TPC2_EML_CS_MAX_OFFSET … #define TPC2_EML_CS_SECTION … #define mmTPC3_ROM_TABLE_BASE … #define TPC3_ROM_TABLE_MAX_OFFSET … #define TPC3_ROM_TABLE_SECTION … #define mmTPC3_EML_SPMU_BASE … #define TPC3_EML_SPMU_MAX_OFFSET … #define TPC3_EML_SPMU_SECTION … #define mmTPC3_EML_ETF_BASE … #define TPC3_EML_ETF_MAX_OFFSET … #define TPC3_EML_ETF_SECTION … #define mmTPC3_EML_STM_BASE … #define TPC3_EML_STM_MAX_OFFSET … #define TPC3_EML_STM_SECTION … #define mmTPC3_EML_CTI_BASE … #define TPC3_EML_CTI_MAX_OFFSET … #define TPC3_EML_CTI_SECTION … #define mmTPC3_EML_FUNNEL_BASE … #define TPC3_EML_FUNNEL_MAX_OFFSET … #define TPC3_EML_FUNNEL_SECTION … #define mmTPC3_EML_BUSMON_0_BASE … #define TPC3_EML_BUSMON_0_MAX_OFFSET … #define TPC3_EML_BUSMON_0_SECTION … #define mmTPC3_EML_BUSMON_1_BASE … #define TPC3_EML_BUSMON_1_MAX_OFFSET … #define TPC3_EML_BUSMON_1_SECTION … #define mmTPC3_EML_BUSMON_2_BASE … #define TPC3_EML_BUSMON_2_MAX_OFFSET … #define TPC3_EML_BUSMON_2_SECTION … #define mmTPC3_EML_BUSMON_3_BASE … #define TPC3_EML_BUSMON_3_MAX_OFFSET … #define TPC3_EML_BUSMON_3_SECTION … #define mmTPC3_EML_CFG_BASE … #define TPC3_EML_CFG_MAX_OFFSET … #define TPC3_EML_CFG_SECTION … #define mmTPC3_EML_TPC_CFG_BASE … #define TPC3_EML_TPC_CFG_MAX_OFFSET … #define TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC3_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC3_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC3_EML_TPC_CFG_BASE … #define KERNEL_TPC3_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC3_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC3_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC3_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC3_EML_TPC_CFG_SECTION … #define mmQM_TPC3_EML_TPC_CFG_BASE … #define QM_TPC3_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC3_EML_TPC_CFG_SECTION … #define mmTPC3_EML_TPC_QM_BASE … #define TPC3_EML_TPC_QM_MAX_OFFSET … #define TPC3_EML_TPC_QM_SECTION … #define mmTPC3_EML_CS_BASE … #define TPC3_EML_CS_MAX_OFFSET … #define TPC3_EML_CS_SECTION … #define mmTPC4_ROM_TABLE_BASE … #define TPC4_ROM_TABLE_MAX_OFFSET … #define TPC4_ROM_TABLE_SECTION … #define mmTPC4_EML_SPMU_BASE … #define TPC4_EML_SPMU_MAX_OFFSET … #define TPC4_EML_SPMU_SECTION … #define mmTPC4_EML_ETF_BASE … #define TPC4_EML_ETF_MAX_OFFSET … #define TPC4_EML_ETF_SECTION … #define mmTPC4_EML_STM_BASE … #define TPC4_EML_STM_MAX_OFFSET … #define TPC4_EML_STM_SECTION … #define mmTPC4_EML_CTI_BASE … #define TPC4_EML_CTI_MAX_OFFSET … #define TPC4_EML_CTI_SECTION … #define mmTPC4_EML_FUNNEL_BASE … #define TPC4_EML_FUNNEL_MAX_OFFSET … #define TPC4_EML_FUNNEL_SECTION … #define mmTPC4_EML_BUSMON_0_BASE … #define TPC4_EML_BUSMON_0_MAX_OFFSET … #define TPC4_EML_BUSMON_0_SECTION … #define mmTPC4_EML_BUSMON_1_BASE … #define TPC4_EML_BUSMON_1_MAX_OFFSET … #define TPC4_EML_BUSMON_1_SECTION … #define mmTPC4_EML_BUSMON_2_BASE … #define TPC4_EML_BUSMON_2_MAX_OFFSET … #define TPC4_EML_BUSMON_2_SECTION … #define mmTPC4_EML_BUSMON_3_BASE … #define TPC4_EML_BUSMON_3_MAX_OFFSET … #define TPC4_EML_BUSMON_3_SECTION … #define mmTPC4_EML_CFG_BASE … #define TPC4_EML_CFG_MAX_OFFSET … #define TPC4_EML_CFG_SECTION … #define mmTPC4_EML_TPC_CFG_BASE … #define TPC4_EML_TPC_CFG_MAX_OFFSET … #define TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC4_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC4_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC4_EML_TPC_CFG_BASE … #define KERNEL_TPC4_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC4_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC4_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC4_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC4_EML_TPC_CFG_SECTION … #define mmQM_TPC4_EML_TPC_CFG_BASE … #define QM_TPC4_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC4_EML_TPC_CFG_SECTION … #define mmTPC4_EML_TPC_QM_BASE … #define TPC4_EML_TPC_QM_MAX_OFFSET … #define TPC4_EML_TPC_QM_SECTION … #define mmTPC4_EML_CS_BASE … #define TPC4_EML_CS_MAX_OFFSET … #define TPC4_EML_CS_SECTION … #define mmTPC5_ROM_TABLE_BASE … #define TPC5_ROM_TABLE_MAX_OFFSET … #define TPC5_ROM_TABLE_SECTION … #define mmTPC5_EML_SPMU_BASE … #define TPC5_EML_SPMU_MAX_OFFSET … #define TPC5_EML_SPMU_SECTION … #define mmTPC5_EML_ETF_BASE … #define TPC5_EML_ETF_MAX_OFFSET … #define TPC5_EML_ETF_SECTION … #define mmTPC5_EML_STM_BASE … #define TPC5_EML_STM_MAX_OFFSET … #define TPC5_EML_STM_SECTION … #define mmTPC5_EML_CTI_BASE … #define TPC5_EML_CTI_MAX_OFFSET … #define TPC5_EML_CTI_SECTION … #define mmTPC5_EML_FUNNEL_BASE … #define TPC5_EML_FUNNEL_MAX_OFFSET … #define TPC5_EML_FUNNEL_SECTION … #define mmTPC5_EML_BUSMON_0_BASE … #define TPC5_EML_BUSMON_0_MAX_OFFSET … #define TPC5_EML_BUSMON_0_SECTION … #define mmTPC5_EML_BUSMON_1_BASE … #define TPC5_EML_BUSMON_1_MAX_OFFSET … #define TPC5_EML_BUSMON_1_SECTION … #define mmTPC5_EML_BUSMON_2_BASE … #define TPC5_EML_BUSMON_2_MAX_OFFSET … #define TPC5_EML_BUSMON_2_SECTION … #define mmTPC5_EML_BUSMON_3_BASE … #define TPC5_EML_BUSMON_3_MAX_OFFSET … #define TPC5_EML_BUSMON_3_SECTION … #define mmTPC5_EML_CFG_BASE … #define TPC5_EML_CFG_MAX_OFFSET … #define TPC5_EML_CFG_SECTION … #define mmTPC5_EML_TPC_CFG_BASE … #define TPC5_EML_TPC_CFG_MAX_OFFSET … #define TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC5_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC5_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC5_EML_TPC_CFG_BASE … #define KERNEL_TPC5_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC5_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC5_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC5_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC5_EML_TPC_CFG_SECTION … #define mmQM_TPC5_EML_TPC_CFG_BASE … #define QM_TPC5_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC5_EML_TPC_CFG_SECTION … #define mmTPC5_EML_TPC_QM_BASE … #define TPC5_EML_TPC_QM_MAX_OFFSET … #define TPC5_EML_TPC_QM_SECTION … #define mmTPC5_EML_CS_BASE … #define TPC5_EML_CS_MAX_OFFSET … #define TPC5_EML_CS_SECTION … #define mmTPC6_ROM_TABLE_BASE … #define TPC6_ROM_TABLE_MAX_OFFSET … #define TPC6_ROM_TABLE_SECTION … #define mmTPC6_EML_SPMU_BASE … #define TPC6_EML_SPMU_MAX_OFFSET … #define TPC6_EML_SPMU_SECTION … #define mmTPC6_EML_ETF_BASE … #define TPC6_EML_ETF_MAX_OFFSET … #define TPC6_EML_ETF_SECTION … #define mmTPC6_EML_STM_BASE … #define TPC6_EML_STM_MAX_OFFSET … #define TPC6_EML_STM_SECTION … #define mmTPC6_EML_CTI_BASE … #define TPC6_EML_CTI_MAX_OFFSET … #define TPC6_EML_CTI_SECTION … #define mmTPC6_EML_FUNNEL_BASE … #define TPC6_EML_FUNNEL_MAX_OFFSET … #define TPC6_EML_FUNNEL_SECTION … #define mmTPC6_EML_BUSMON_0_BASE … #define TPC6_EML_BUSMON_0_MAX_OFFSET … #define TPC6_EML_BUSMON_0_SECTION … #define mmTPC6_EML_BUSMON_1_BASE … #define TPC6_EML_BUSMON_1_MAX_OFFSET … #define TPC6_EML_BUSMON_1_SECTION … #define mmTPC6_EML_BUSMON_2_BASE … #define TPC6_EML_BUSMON_2_MAX_OFFSET … #define TPC6_EML_BUSMON_2_SECTION … #define mmTPC6_EML_BUSMON_3_BASE … #define TPC6_EML_BUSMON_3_MAX_OFFSET … #define TPC6_EML_BUSMON_3_SECTION … #define mmTPC6_EML_CFG_BASE … #define TPC6_EML_CFG_MAX_OFFSET … #define TPC6_EML_CFG_SECTION … #define mmTPC6_EML_TPC_CFG_BASE … #define TPC6_EML_TPC_CFG_MAX_OFFSET … #define TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC6_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC6_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC6_EML_TPC_CFG_BASE … #define KERNEL_TPC6_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC6_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC6_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC6_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC6_EML_TPC_CFG_SECTION … #define mmQM_TPC6_EML_TPC_CFG_BASE … #define QM_TPC6_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC6_EML_TPC_CFG_SECTION … #define mmTPC6_EML_TPC_QM_BASE … #define TPC6_EML_TPC_QM_MAX_OFFSET … #define TPC6_EML_TPC_QM_SECTION … #define mmTPC6_EML_CS_BASE … #define TPC6_EML_CS_MAX_OFFSET … #define TPC6_EML_CS_SECTION … #define mmTPC7_ROM_TABLE_BASE … #define TPC7_ROM_TABLE_MAX_OFFSET … #define TPC7_ROM_TABLE_SECTION … #define mmTPC7_EML_SPMU_BASE … #define TPC7_EML_SPMU_MAX_OFFSET … #define TPC7_EML_SPMU_SECTION … #define mmTPC7_EML_ETF_BASE … #define TPC7_EML_ETF_MAX_OFFSET … #define TPC7_EML_ETF_SECTION … #define mmTPC7_EML_STM_BASE … #define TPC7_EML_STM_MAX_OFFSET … #define TPC7_EML_STM_SECTION … #define mmTPC7_EML_CTI_BASE … #define TPC7_EML_CTI_MAX_OFFSET … #define TPC7_EML_CTI_SECTION … #define mmTPC7_EML_FUNNEL_BASE … #define TPC7_EML_FUNNEL_MAX_OFFSET … #define TPC7_EML_FUNNEL_SECTION … #define mmTPC7_EML_BUSMON_0_BASE … #define TPC7_EML_BUSMON_0_MAX_OFFSET … #define TPC7_EML_BUSMON_0_SECTION … #define mmTPC7_EML_BUSMON_1_BASE … #define TPC7_EML_BUSMON_1_MAX_OFFSET … #define TPC7_EML_BUSMON_1_SECTION … #define mmTPC7_EML_BUSMON_2_BASE … #define TPC7_EML_BUSMON_2_MAX_OFFSET … #define TPC7_EML_BUSMON_2_SECTION … #define mmTPC7_EML_BUSMON_3_BASE … #define TPC7_EML_BUSMON_3_MAX_OFFSET … #define TPC7_EML_BUSMON_3_SECTION … #define mmTPC7_EML_CFG_BASE … #define TPC7_EML_CFG_MAX_OFFSET … #define TPC7_EML_CFG_SECTION … #define mmTPC7_EML_TPC_CFG_BASE … #define TPC7_EML_TPC_CFG_MAX_OFFSET … #define TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_0_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_0_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_0_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_1_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_1_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_1_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_2_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_2_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_2_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_3_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_3_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_3_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_4_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_4_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_4_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_5_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_5_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_5_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_6_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_6_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_6_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_7_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_7_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_7_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_8_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_8_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_8_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_9_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_9_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_9_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_10_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_10_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_10_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_11_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_11_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_11_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_12_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_12_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_12_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_13_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_13_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_13_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_14_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_14_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_14_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TENSOR_15_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TENSOR_15_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TENSOR_15_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_SYNC_OBJECT_TPC7_EML_TPC_CFG_BASE … #define KERNEL_SYNC_OBJECT_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_SYNC_OBJECT_TPC7_EML_TPC_CFG_SECTION … #define mmKERNEL_TPC7_EML_TPC_CFG_BASE … #define KERNEL_TPC7_EML_TPC_CFG_MAX_OFFSET … #define KERNEL_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_0_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_0_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_0_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_1_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_1_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_1_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_2_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_2_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_2_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_3_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_3_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_3_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_4_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_4_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_4_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_5_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_5_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_5_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_6_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_6_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_6_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_7_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_7_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_7_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_8_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_8_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_8_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_9_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_9_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_9_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_10_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_10_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_10_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_11_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_11_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_11_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_12_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_12_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_12_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_13_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_13_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_13_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_14_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_14_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_14_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TENSOR_15_TPC7_EML_TPC_CFG_BASE … #define QM_TENSOR_15_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TENSOR_15_TPC7_EML_TPC_CFG_SECTION … #define mmQM_SYNC_OBJECT_TPC7_EML_TPC_CFG_BASE … #define QM_SYNC_OBJECT_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_SYNC_OBJECT_TPC7_EML_TPC_CFG_SECTION … #define mmQM_TPC7_EML_TPC_CFG_BASE … #define QM_TPC7_EML_TPC_CFG_MAX_OFFSET … #define QM_TPC7_EML_TPC_CFG_SECTION … #define mmTPC7_EML_TPC_QM_BASE … #define TPC7_EML_TPC_QM_MAX_OFFSET … #define TPC7_EML_TPC_QM_SECTION … #define mmTPC7_EML_CS_BASE … #define TPC7_EML_CS_MAX_OFFSET … #endif /* GAUDI_BLOCKS_H_ */
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