/* SPDX-License-Identifier: MIT */ /* * Copyright (c) 2020-2023, Intel Corporation. */ #ifndef VPU_BOOT_API_H #define VPU_BOOT_API_H /* * =========== FW API version information beginning ================ * The bellow values will be used to construct the version info this way: * fw_bin_header->api_version[VPU_BOOT_API_VER_ID] = (VPU_BOOT_API_VER_MAJOR << 16) | * VPU_BOOT_API_VER_MINOR; * VPU_BOOT_API_VER_PATCH will be ignored. KMD and compatibility is not affected if this changes * This information is collected by using vpuip_2/application/vpuFirmware/make_std_fw_image.py * If a header is missing this info we ignore the header, if a header is missing or contains * partial info a build error will be generated. */ /* * Major version changes that break backward compatibility. * Major version must start from 1 and can only be incremented. */ #define VPU_BOOT_API_VER_MAJOR … /* * Minor version changes when API backward compatibility is preserved. * Resets to 0 if Major version is incremented. */ #define VPU_BOOT_API_VER_MINOR … /* * API header changed (field names, documentation, formatting) but API itself has not been changed */ #define VPU_BOOT_API_VER_PATCH … /* * Index in the API version table * Must be unique for each API */ #define VPU_BOOT_API_VER_INDEX … /* ------------ FW API version information end ---------------------*/ #pragma pack(push, 4) /* * Firmware image header format */ #define VPU_FW_HEADER_SIZE … #define VPU_FW_HEADER_VERSION … #define VPU_FW_VERSION_SIZE … #define VPU_FW_API_VER_NUM … struct vpu_firmware_header { … }; /* * Firmware boot parameters format */ #define VPU_BOOT_PLL_COUNT … #define VPU_BOOT_PLL_OUT_COUNT … /** Values for boot_type field */ #define VPU_BOOT_TYPE_COLDBOOT … #define VPU_BOOT_TYPE_WARMBOOT … /** Value for magic filed */ #define VPU_BOOT_PARAMS_MAGIC … /** VPU scheduling mode. By default, OS scheduling is used. */ #define VPU_SCHEDULING_MODE_OS … #define VPU_SCHEDULING_MODE_HW … enum VPU_BOOT_L2_CACHE_CFG_TYPE { … }; /** VPU MCA ECC signalling mode. By default, no signalling is used */ enum VPU_BOOT_MCA_ECC_SIGNAL_TYPE { … }; /** * Logging destinations. * * Logging output can be directed to different logging destinations. This enum * defines the list of logging destinations supported by the VPU firmware (NOTE: * a specific VPU FW binary may support only a subset of such output * destinations, depending on the target platform and compile options). */ enum vpu_trace_destination { … }; /* * Processor bit shifts (for loggable HW components). */ #define VPU_TRACE_PROC_BIT_ARM … #define VPU_TRACE_PROC_BIT_LRT … #define VPU_TRACE_PROC_BIT_LNN … #define VPU_TRACE_PROC_BIT_SHV_0 … #define VPU_TRACE_PROC_BIT_SHV_1 … #define VPU_TRACE_PROC_BIT_SHV_2 … #define VPU_TRACE_PROC_BIT_SHV_3 … #define VPU_TRACE_PROC_BIT_SHV_4 … #define VPU_TRACE_PROC_BIT_SHV_5 … #define VPU_TRACE_PROC_BIT_SHV_6 … #define VPU_TRACE_PROC_BIT_SHV_7 … #define VPU_TRACE_PROC_BIT_SHV_8 … #define VPU_TRACE_PROC_BIT_SHV_9 … #define VPU_TRACE_PROC_BIT_SHV_10 … #define VPU_TRACE_PROC_BIT_SHV_11 … #define VPU_TRACE_PROC_BIT_SHV_12 … #define VPU_TRACE_PROC_BIT_SHV_13 … #define VPU_TRACE_PROC_BIT_SHV_14 … #define VPU_TRACE_PROC_BIT_SHV_15 … #define VPU_TRACE_PROC_BIT_ACT_SHV_0 … #define VPU_TRACE_PROC_BIT_ACT_SHV_1 … #define VPU_TRACE_PROC_BIT_ACT_SHV_2 … #define VPU_TRACE_PROC_BIT_ACT_SHV_3 … #define VPU_TRACE_PROC_NO_OF_HW_DEVS … /* VPU 30xx HW component IDs are sequential, so define first and last IDs. */ #define VPU_TRACE_PROC_BIT_30XX_FIRST … #define VPU_TRACE_PROC_BIT_30XX_LAST … #define VPU_TRACE_PROC_BIT_KMB_FIRST … #define VPU_TRACE_PROC_BIT_KMB_LAST … struct vpu_boot_l2_cache_config { … }; struct vpu_warm_boot_section { … }; /* * When HW scheduling mode is enabled, a present period is defined. * It will be used by VPU to swap between normal and focus priorities * to prevent starving of normal priority band (when implemented). * Host must provide a valid value at boot time in * `vpu_focus_present_timer_ms`. If the value provided by the host is not within the * defined range a default value will be used. Here we define the min. and max. * allowed values and the and default value of the present period. Units are milliseconds. */ #define VPU_PRESENT_CALL_PERIOD_MS_DEFAULT … #define VPU_PRESENT_CALL_PERIOD_MS_MIN … #define VPU_PRESENT_CALL_PERIOD_MS_MAX … /** * Macros to enable various power profiles within the NPU. * To be defined as part of 32 bit mask. */ #define POWER_PROFILE_SURVIVABILITY … struct vpu_boot_params { … }; /* * Magic numbers set between host and vpu to detect corruptio of tracing init */ #define VPU_TRACING_BUFFER_CANARY … /* Tracing buffer message format definitions */ #define VPU_TRACING_FORMAT_STRING … #define VPU_TRACING_FORMAT_MIPI … /* * Header of the tracing buffer. * The below defined header will be stored at the beginning of * each allocated tracing buffer, followed by a series of 256b * of ASCII trace message entries. */ struct vpu_tracing_buffer_header { … }; #pragma pack(pop) #endif
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