/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2018 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef ASIC_REG_PSOC_PCI_PLL_REGS_H_ #define ASIC_REG_PSOC_PCI_PLL_REGS_H_ /* ***************************************** * PSOC_PCI_PLL (Prototype: PLL) ***************************************** */ #define mmPSOC_PCI_PLL_NR … #define mmPSOC_PCI_PLL_NF … #define mmPSOC_PCI_PLL_OD … #define mmPSOC_PCI_PLL_NB … #define mmPSOC_PCI_PLL_CFG … #define mmPSOC_PCI_PLL_LOSE_MASK … #define mmPSOC_PCI_PLL_LOCK_INTR … #define mmPSOC_PCI_PLL_LOCK_BYPASS … #define mmPSOC_PCI_PLL_DATA_CHNG … #define mmPSOC_PCI_PLL_RST … #define mmPSOC_PCI_PLL_SLIP_WD_CNTR … #define mmPSOC_PCI_PLL_DIV_FACTOR_0 … #define mmPSOC_PCI_PLL_DIV_FACTOR_1 … #define mmPSOC_PCI_PLL_DIV_FACTOR_2 … #define mmPSOC_PCI_PLL_DIV_FACTOR_3 … #define mmPSOC_PCI_PLL_DIV_FACTOR_CMD_0 … #define mmPSOC_PCI_PLL_DIV_FACTOR_CMD_1 … #define mmPSOC_PCI_PLL_DIV_FACTOR_CMD_2 … #define mmPSOC_PCI_PLL_DIV_FACTOR_CMD_3 … #define mmPSOC_PCI_PLL_DIV_SEL_0 … #define mmPSOC_PCI_PLL_DIV_SEL_1 … #define mmPSOC_PCI_PLL_DIV_SEL_2 … #define mmPSOC_PCI_PLL_DIV_SEL_3 … #define mmPSOC_PCI_PLL_DIV_EN_0 … #define mmPSOC_PCI_PLL_DIV_EN_1 … #define mmPSOC_PCI_PLL_DIV_EN_2 … #define mmPSOC_PCI_PLL_DIV_EN_3 … #define mmPSOC_PCI_PLL_DIV_FACTOR_BUSY_0 … #define mmPSOC_PCI_PLL_DIV_FACTOR_BUSY_1 … #define mmPSOC_PCI_PLL_DIV_FACTOR_BUSY_2 … #define mmPSOC_PCI_PLL_DIV_FACTOR_BUSY_3 … #define mmPSOC_PCI_PLL_CLK_GATER … #define mmPSOC_PCI_PLL_CLK_RLX_0 … #define mmPSOC_PCI_PLL_CLK_RLX_1 … #define mmPSOC_PCI_PLL_CLK_RLX_2 … #define mmPSOC_PCI_PLL_CLK_RLX_3 … #define mmPSOC_PCI_PLL_REF_CNTR_PERIOD … #define mmPSOC_PCI_PLL_REF_LOW_THRESHOLD … #define mmPSOC_PCI_PLL_REF_HIGH_THRESHOLD … #define mmPSOC_PCI_PLL_PLL_NOT_STABLE … #define mmPSOC_PCI_PLL_FREQ_CALC_EN … #endif /* ASIC_REG_PSOC_PCI_PLL_REGS_H_ */
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