/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2018 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef ASIC_REG_TPC5_CFG_REGS_H_ #define ASIC_REG_TPC5_CFG_REGS_H_ /* ***************************************** * TPC5_CFG (Prototype: TPC) ***************************************** */ #define mmTPC5_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_0_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_1_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_1_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_1_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_1_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_1_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_2_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_2_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_2_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_2_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_2_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_3_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_3_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_3_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_3_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_3_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_4_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_4_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_4_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_4_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_4_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_5_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_5_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_5_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_5_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_5_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_6_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_6_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_6_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_6_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_6_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_7_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_7_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_7_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_7_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_7_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_8_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_8_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_8_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_8_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_8_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_9_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_9_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_9_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_9_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_9_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_10_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_10_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_10_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_10_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_10_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_11_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_11_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_11_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_11_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_11_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_12_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_12_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_12_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_12_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_12_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_13_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_13_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_13_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_13_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_13_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_14_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_14_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_14_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_14_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_14_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_15_BASE_ADDR_LOW … #define mmTPC5_CFG_KERNEL_TENSOR_15_BASE_ADDR_HIGH … #define mmTPC5_CFG_KERNEL_TENSOR_15_PADDING_VALUE … #define mmTPC5_CFG_KERNEL_TENSOR_15_TENSOR_CONFIG … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_0_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_0_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_1_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_1_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_2_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_2_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_3_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_3_STRIDE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_4_SIZE … #define mmTPC5_CFG_KERNEL_TENSOR_15_DIM_4_STRIDE … #define mmTPC5_CFG_KERNEL_SYNC_OBJECT_MESSAGE … #define mmTPC5_CFG_KERNEL_SYNC_OBJECT_ADDR … #define mmTPC5_CFG_KERNEL_KERNEL_BASE_ADDRESS_LOW … #define mmTPC5_CFG_KERNEL_KERNEL_BASE_ADDRESS_HIGH … #define mmTPC5_CFG_KERNEL_TID_BASE_DIM_0 … #define mmTPC5_CFG_KERNEL_TID_SIZE_DIM_0 … #define mmTPC5_CFG_KERNEL_TID_BASE_DIM_1 … #define mmTPC5_CFG_KERNEL_TID_SIZE_DIM_1 … #define mmTPC5_CFG_KERNEL_TID_BASE_DIM_2 … #define mmTPC5_CFG_KERNEL_TID_SIZE_DIM_2 … #define mmTPC5_CFG_KERNEL_TID_BASE_DIM_3 … #define mmTPC5_CFG_KERNEL_TID_SIZE_DIM_3 … #define mmTPC5_CFG_KERNEL_TID_BASE_DIM_4 … #define mmTPC5_CFG_KERNEL_TID_SIZE_DIM_4 … #define mmTPC5_CFG_KERNEL_KERNEL_CONFIG … #define mmTPC5_CFG_KERNEL_KERNEL_ID … #define mmTPC5_CFG_KERNEL_SRF_0 … #define mmTPC5_CFG_KERNEL_SRF_1 … #define mmTPC5_CFG_KERNEL_SRF_2 … #define mmTPC5_CFG_KERNEL_SRF_3 … #define mmTPC5_CFG_KERNEL_SRF_4 … #define mmTPC5_CFG_KERNEL_SRF_5 … #define mmTPC5_CFG_KERNEL_SRF_6 … #define mmTPC5_CFG_KERNEL_SRF_7 … #define mmTPC5_CFG_KERNEL_SRF_8 … #define mmTPC5_CFG_KERNEL_SRF_9 … #define mmTPC5_CFG_KERNEL_SRF_10 … #define mmTPC5_CFG_KERNEL_SRF_11 … #define mmTPC5_CFG_KERNEL_SRF_12 … #define mmTPC5_CFG_KERNEL_SRF_13 … #define mmTPC5_CFG_KERNEL_SRF_14 … #define mmTPC5_CFG_KERNEL_SRF_15 … #define mmTPC5_CFG_KERNEL_SRF_16 … #define mmTPC5_CFG_KERNEL_SRF_17 … #define mmTPC5_CFG_KERNEL_SRF_18 … #define mmTPC5_CFG_KERNEL_SRF_19 … #define mmTPC5_CFG_KERNEL_SRF_20 … #define mmTPC5_CFG_KERNEL_SRF_21 … #define mmTPC5_CFG_KERNEL_SRF_22 … #define mmTPC5_CFG_KERNEL_SRF_23 … #define mmTPC5_CFG_KERNEL_SRF_24 … #define mmTPC5_CFG_KERNEL_SRF_25 … #define mmTPC5_CFG_KERNEL_SRF_26 … #define mmTPC5_CFG_KERNEL_SRF_27 … #define mmTPC5_CFG_KERNEL_SRF_28 … #define mmTPC5_CFG_KERNEL_SRF_29 … #define mmTPC5_CFG_KERNEL_SRF_30 … #define mmTPC5_CFG_KERNEL_SRF_31 … #define mmTPC5_CFG_ROUND_CSR … #define mmTPC5_CFG_PROT … #define mmTPC5_CFG_SEMAPHORE … #define mmTPC5_CFG_VFLAGS … #define mmTPC5_CFG_SFLAGS … #define mmTPC5_CFG_LFSR_POLYNOM … #define mmTPC5_CFG_STATUS … #define mmTPC5_CFG_CFG_BASE_ADDRESS_HIGH … #define mmTPC5_CFG_CFG_SUBTRACT_VALUE … #define mmTPC5_CFG_SM_BASE_ADDRESS_HIGH … #define mmTPC5_CFG_TPC_CMD … #define mmTPC5_CFG_TPC_EXECUTE … #define mmTPC5_CFG_TPC_STALL … #define mmTPC5_CFG_ICACHE_BASE_ADDERESS_LOW … #define mmTPC5_CFG_ICACHE_BASE_ADDERESS_HIGH … #define mmTPC5_CFG_RD_RATE_LIMIT … #define mmTPC5_CFG_WR_RATE_LIMIT … #define mmTPC5_CFG_MSS_CONFIG … #define mmTPC5_CFG_TPC_INTR_CAUSE … #define mmTPC5_CFG_TPC_INTR_MASK … #define mmTPC5_CFG_WQ_CREDITS … #define mmTPC5_CFG_ARUSER_LO … #define mmTPC5_CFG_ARUSER_HI … #define mmTPC5_CFG_AWUSER_LO … #define mmTPC5_CFG_AWUSER_HI … #define mmTPC5_CFG_OPCODE_EXEC … #define mmTPC5_CFG_LUT_FUNC32_BASE_ADDR_LO … #define mmTPC5_CFG_LUT_FUNC32_BASE_ADDR_HI … #define mmTPC5_CFG_LUT_FUNC64_BASE_ADDR_LO … #define mmTPC5_CFG_LUT_FUNC64_BASE_ADDR_HI … #define mmTPC5_CFG_LUT_FUNC128_BASE_ADDR_LO … #define mmTPC5_CFG_LUT_FUNC128_BASE_ADDR_HI … #define mmTPC5_CFG_LUT_FUNC256_BASE_ADDR_LO … #define mmTPC5_CFG_LUT_FUNC256_BASE_ADDR_HI … #define mmTPC5_CFG_TSB_CFG_MAX_SIZE … #define mmTPC5_CFG_TSB_CFG … #define mmTPC5_CFG_DBGMEM_ADD … #define mmTPC5_CFG_DBGMEM_DATA_WR … #define mmTPC5_CFG_DBGMEM_DATA_RD … #define mmTPC5_CFG_DBGMEM_CTRL … #define mmTPC5_CFG_DBGMEM_RC … #define mmTPC5_CFG_TSB_INFLIGHT_CNTR … #define mmTPC5_CFG_WQ_INFLIGHT_CNTR … #define mmTPC5_CFG_WQ_LBW_TOTAL_CNTR … #define mmTPC5_CFG_WQ_HBW_TOTAL_CNTR … #define mmTPC5_CFG_IRQ_OCCOUPY_CNTR … #define mmTPC5_CFG_FUNC_MBIST_CNTRL … #define mmTPC5_CFG_FUNC_MBIST_PAT … #define mmTPC5_CFG_FUNC_MBIST_MEM_0 … #define mmTPC5_CFG_FUNC_MBIST_MEM_1 … #define mmTPC5_CFG_FUNC_MBIST_MEM_2 … #define mmTPC5_CFG_FUNC_MBIST_MEM_3 … #define mmTPC5_CFG_FUNC_MBIST_MEM_4 … #define mmTPC5_CFG_FUNC_MBIST_MEM_5 … #define mmTPC5_CFG_FUNC_MBIST_MEM_6 … #define mmTPC5_CFG_FUNC_MBIST_MEM_7 … #define mmTPC5_CFG_FUNC_MBIST_MEM_8 … #define mmTPC5_CFG_FUNC_MBIST_MEM_9 … #define mmTPC5_CFG_QM_TENSOR_0_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_0_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_0_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_0_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_0_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_0_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_1_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_1_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_1_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_1_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_1_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_1_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_2_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_2_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_2_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_2_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_2_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_2_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_3_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_3_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_3_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_3_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_3_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_3_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_4_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_4_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_4_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_4_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_4_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_4_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_5_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_5_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_5_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_5_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_5_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_5_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_6_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_6_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_6_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_6_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_6_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_6_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_7_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_7_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_7_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_7_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_7_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_7_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_8_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_8_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_8_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_8_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_8_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_8_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_9_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_9_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_9_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_9_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_9_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_9_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_10_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_10_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_10_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_10_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_10_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_10_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_11_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_11_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_11_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_11_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_11_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_11_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_12_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_12_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_12_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_12_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_12_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_12_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_13_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_13_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_13_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_13_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_13_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_13_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_14_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_14_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_14_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_14_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_14_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_14_DIM_4_STRIDE … #define mmTPC5_CFG_QM_TENSOR_15_BASE_ADDR_LOW … #define mmTPC5_CFG_QM_TENSOR_15_BASE_ADDR_HIGH … #define mmTPC5_CFG_QM_TENSOR_15_PADDING_VALUE … #define mmTPC5_CFG_QM_TENSOR_15_TENSOR_CONFIG … #define mmTPC5_CFG_QM_TENSOR_15_DIM_0_SIZE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_0_STRIDE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_1_SIZE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_1_STRIDE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_2_SIZE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_2_STRIDE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_3_SIZE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_3_STRIDE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_4_SIZE … #define mmTPC5_CFG_QM_TENSOR_15_DIM_4_STRIDE … #define mmTPC5_CFG_QM_SYNC_OBJECT_MESSAGE … #define mmTPC5_CFG_QM_SYNC_OBJECT_ADDR … #define mmTPC5_CFG_QM_KERNEL_BASE_ADDRESS_LOW … #define mmTPC5_CFG_QM_KERNEL_BASE_ADDRESS_HIGH … #define mmTPC5_CFG_QM_TID_BASE_DIM_0 … #define mmTPC5_CFG_QM_TID_SIZE_DIM_0 … #define mmTPC5_CFG_QM_TID_BASE_DIM_1 … #define mmTPC5_CFG_QM_TID_SIZE_DIM_1 … #define mmTPC5_CFG_QM_TID_BASE_DIM_2 … #define mmTPC5_CFG_QM_TID_SIZE_DIM_2 … #define mmTPC5_CFG_QM_TID_BASE_DIM_3 … #define mmTPC5_CFG_QM_TID_SIZE_DIM_3 … #define mmTPC5_CFG_QM_TID_BASE_DIM_4 … #define mmTPC5_CFG_QM_TID_SIZE_DIM_4 … #define mmTPC5_CFG_QM_KERNEL_CONFIG … #define mmTPC5_CFG_QM_KERNEL_ID … #define mmTPC5_CFG_QM_SRF_0 … #define mmTPC5_CFG_QM_SRF_1 … #define mmTPC5_CFG_QM_SRF_2 … #define mmTPC5_CFG_QM_SRF_3 … #define mmTPC5_CFG_QM_SRF_4 … #define mmTPC5_CFG_QM_SRF_5 … #define mmTPC5_CFG_QM_SRF_6 … #define mmTPC5_CFG_QM_SRF_7 … #define mmTPC5_CFG_QM_SRF_8 … #define mmTPC5_CFG_QM_SRF_9 … #define mmTPC5_CFG_QM_SRF_10 … #define mmTPC5_CFG_QM_SRF_11 … #define mmTPC5_CFG_QM_SRF_12 … #define mmTPC5_CFG_QM_SRF_13 … #define mmTPC5_CFG_QM_SRF_14 … #define mmTPC5_CFG_QM_SRF_15 … #define mmTPC5_CFG_QM_SRF_16 … #define mmTPC5_CFG_QM_SRF_17 … #define mmTPC5_CFG_QM_SRF_18 … #define mmTPC5_CFG_QM_SRF_19 … #define mmTPC5_CFG_QM_SRF_20 … #define mmTPC5_CFG_QM_SRF_21 … #define mmTPC5_CFG_QM_SRF_22 … #define mmTPC5_CFG_QM_SRF_23 … #define mmTPC5_CFG_QM_SRF_24 … #define mmTPC5_CFG_QM_SRF_25 … #define mmTPC5_CFG_QM_SRF_26 … #define mmTPC5_CFG_QM_SRF_27 … #define mmTPC5_CFG_QM_SRF_28 … #define mmTPC5_CFG_QM_SRF_29 … #define mmTPC5_CFG_QM_SRF_30 … #define mmTPC5_CFG_QM_SRF_31 … #endif /* ASIC_REG_TPC5_CFG_REGS_H_ */
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