linux/drivers/accel/habanalabs/include/goya/asic_reg/dma_macro_regs.h

/* SPDX-License-Identifier: GPL-2.0
 *
 * Copyright 2016-2018 HabanaLabs, Ltd.
 * All Rights Reserved.
 *
 */

/************************************
 ** This is an auto-generated file **
 **       DO NOT EDIT BELOW        **
 ************************************/

#ifndef ASIC_REG_DMA_MACRO_REGS_H_
#define ASIC_REG_DMA_MACRO_REGS_H_

/*
 *****************************************
 *   DMA_MACRO (Prototype: DMA_MACRO)
 *****************************************
 */

#define mmDMA_MACRO_LBW_RANGE_HIT_BLOCK

#define mmDMA_MACRO_LBW_RANGE_MASK_0

#define mmDMA_MACRO_LBW_RANGE_MASK_1

#define mmDMA_MACRO_LBW_RANGE_MASK_2

#define mmDMA_MACRO_LBW_RANGE_MASK_3

#define mmDMA_MACRO_LBW_RANGE_MASK_4

#define mmDMA_MACRO_LBW_RANGE_MASK_5

#define mmDMA_MACRO_LBW_RANGE_MASK_6

#define mmDMA_MACRO_LBW_RANGE_MASK_7

#define mmDMA_MACRO_LBW_RANGE_MASK_8

#define mmDMA_MACRO_LBW_RANGE_MASK_9

#define mmDMA_MACRO_LBW_RANGE_MASK_10

#define mmDMA_MACRO_LBW_RANGE_MASK_11

#define mmDMA_MACRO_LBW_RANGE_MASK_12

#define mmDMA_MACRO_LBW_RANGE_MASK_13

#define mmDMA_MACRO_LBW_RANGE_MASK_14

#define mmDMA_MACRO_LBW_RANGE_MASK_15

#define mmDMA_MACRO_LBW_RANGE_BASE_0

#define mmDMA_MACRO_LBW_RANGE_BASE_1

#define mmDMA_MACRO_LBW_RANGE_BASE_2

#define mmDMA_MACRO_LBW_RANGE_BASE_3

#define mmDMA_MACRO_LBW_RANGE_BASE_4

#define mmDMA_MACRO_LBW_RANGE_BASE_5

#define mmDMA_MACRO_LBW_RANGE_BASE_6

#define mmDMA_MACRO_LBW_RANGE_BASE_7

#define mmDMA_MACRO_LBW_RANGE_BASE_8

#define mmDMA_MACRO_LBW_RANGE_BASE_9

#define mmDMA_MACRO_LBW_RANGE_BASE_10

#define mmDMA_MACRO_LBW_RANGE_BASE_11

#define mmDMA_MACRO_LBW_RANGE_BASE_12

#define mmDMA_MACRO_LBW_RANGE_BASE_13

#define mmDMA_MACRO_LBW_RANGE_BASE_14

#define mmDMA_MACRO_LBW_RANGE_BASE_15

#define mmDMA_MACRO_HBW_RANGE_HIT_BLOCK

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_0

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_1

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_2

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_3

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_4

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_5

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_6

#define mmDMA_MACRO_HBW_RANGE_MASK_49_32_7

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_0

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_1

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_2

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_3

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_4

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_5

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_6

#define mmDMA_MACRO_HBW_RANGE_MASK_31_0_7

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_0

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_1

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_2

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_3

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_4

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_5

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_6

#define mmDMA_MACRO_HBW_RANGE_BASE_49_32_7

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_0

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_1

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_2

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_3

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_4

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_5

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_6

#define mmDMA_MACRO_HBW_RANGE_BASE_31_0_7

#define mmDMA_MACRO_WRITE_EN

#define mmDMA_MACRO_WRITE_CREDIT

#define mmDMA_MACRO_READ_EN

#define mmDMA_MACRO_READ_CREDIT

#define mmDMA_MACRO_SRAM_BUSY

#define mmDMA_MACRO_RAZWI_LBW_WT_VLD

#define mmDMA_MACRO_RAZWI_LBW_WT_ID

#define mmDMA_MACRO_RAZWI_LBW_RD_VLD

#define mmDMA_MACRO_RAZWI_LBW_RD_ID

#define mmDMA_MACRO_RAZWI_HBW_WT_VLD

#define mmDMA_MACRO_RAZWI_HBW_WT_ID

#define mmDMA_MACRO_RAZWI_HBW_RD_VLD

#define mmDMA_MACRO_RAZWI_HBW_RD_ID

#endif /* ASIC_REG_DMA_MACRO_REGS_H_ */