#ifndef GOYA_REG_MAP_H_
#define GOYA_REG_MAP_H_
#define mmCPU_PQ_BASE_ADDR_LOW …
#define mmCPU_PQ_BASE_ADDR_HIGH …
#define mmCPU_EQ_BASE_ADDR_LOW …
#define mmCPU_EQ_BASE_ADDR_HIGH …
#define mmCPU_EQ_LENGTH …
#define mmCPU_PQ_LENGTH …
#define mmCPU_EQ_CI …
#define mmCPU_PQ_INIT_STATUS …
#define mmCPU_CQ_BASE_ADDR_LOW …
#define mmCPU_CQ_BASE_ADDR_HIGH …
#define mmCPU_CQ_LENGTH …
#define mmCPU_BOOT_DEV_STS0 …
#define mmCPU_BOOT_DEV_STS1 …
#define mmFUSE_VER_OFFSET …
#define mmCPU_CMD_STATUS_TO_HOST …
#define mmCPU_BOOT_ERR0 …
#define mmCPU_BOOT_ERR1 …
#define mmUPD_STS …
#define mmUPD_CMD …
#define mmPREBOOT_VER_OFFSET …
#define mmUBOOT_VER_OFFSET …
#define mmRDWR_TEST …
#define mmBTL_ID …
#define mmHW_STATE …
#define mmPSOC_GLOBAL_CONF_CPU_BOOT_STATUS …
#define mmPSOC_GLOBAL_CONF_KMD_MSG_TO_CPU …
#define mmUPD_PENDING_STS …
#endif