/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2018 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef ASIC_REG_SIF_RTR_CTRL_0_REGS_H_ #define ASIC_REG_SIF_RTR_CTRL_0_REGS_H_ /* ***************************************** * SIF_RTR_CTRL_0 (Prototype: RTR_CTRL) ***************************************** */ #define mmSIF_RTR_CTRL_0_PERM_SEL … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_0 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_1 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_2 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_3 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_4 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_5 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_6 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_7 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_8 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_9 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_10 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_11 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_12 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_13 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_14 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_15 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_16 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_17 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_18 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_19 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_20 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_21 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_22 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_23 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_24 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_25 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_26 … #define mmSIF_RTR_CTRL_0_HBM_POLY_H3_27 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_0 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_1 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_2 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_3 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_4 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_5 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_6 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_7 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_8 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_9 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_10 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_11 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_12 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_13 … #define mmSIF_RTR_CTRL_0_SRAM_POLY_H3_14 … #define mmSIF_RTR_CTRL_0_SCRAM_SRAM_EN … #define mmSIF_RTR_CTRL_0_RL_HBM_EN … #define mmSIF_RTR_CTRL_0_RL_HBM_SAT … #define mmSIF_RTR_CTRL_0_RL_HBM_RST … #define mmSIF_RTR_CTRL_0_RL_HBM_TIMEOUT … #define mmSIF_RTR_CTRL_0_SCRAM_HBM_EN … #define mmSIF_RTR_CTRL_0_RL_PCI_EN … #define mmSIF_RTR_CTRL_0_RL_PCI_SAT … #define mmSIF_RTR_CTRL_0_RL_PCI_RST … #define mmSIF_RTR_CTRL_0_RL_PCI_TIMEOUT … #define mmSIF_RTR_CTRL_0_RL_SRAM_EN … #define mmSIF_RTR_CTRL_0_RL_SRAM_SAT … #define mmSIF_RTR_CTRL_0_RL_SRAM_RST … #define mmSIF_RTR_CTRL_0_RL_SRAM_TIMEOUT … #define mmSIF_RTR_CTRL_0_RL_SRAM_RED … #define mmSIF_RTR_CTRL_0_E2E_HBM_EN … #define mmSIF_RTR_CTRL_0_E2E_PCI_EN … #define mmSIF_RTR_CTRL_0_E2E_HBM_WR_SIZE … #define mmSIF_RTR_CTRL_0_E2E_PCI_WR_SIZE … #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET_EN … #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_SET … #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_PCI_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET_EN … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM_CTR_SET … #define mmSIF_RTR_CTRL_0_E2E_HBM_RD_SIZE … #define mmSIF_RTR_CTRL_0_E2E_PCI_RD_SIZE … #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET_EN … #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_SET … #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_PCI_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET_EN … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM_CTR_SET … #define mmSIF_RTR_CTRL_0_NL_HBM_SEL_0 … #define mmSIF_RTR_CTRL_0_NL_HBM_SEL_1 … #define mmSIF_RTR_CTRL_0_NON_LIN_EN … #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_0 … #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_1 … #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_2 … #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_3 … #define mmSIF_RTR_CTRL_0_NL_SRAM_BANK_4 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_0 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_1 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_2 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_3 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_4 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_5 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_6 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_7 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_8 … #define mmSIF_RTR_CTRL_0_NL_SRAM_OFFSET_9 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_0 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_1 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_2 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_3 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_4 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_5 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_6 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_7 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_8 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_9 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_10 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_11 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_12 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_13 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_14 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_15 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_16 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_17 … #define mmSIF_RTR_CTRL_0_NL_HBM_OFFSET_18 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AW_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_LOW_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_BASE_HIGH_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_LOW_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_MASK_HIGH_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_LOW_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_BASE_HIGH_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_LOW_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_0 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_1 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_2 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_3 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_4 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_5 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_6 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_7 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_8 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_9 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_10 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_11 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_12 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_13 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_14 … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_MASK_HIGH_AR_15 … #define mmSIF_RTR_CTRL_0_RANGE_SEC_HIT_AW … #define mmSIF_RTR_CTRL_0_RANGE_SEC_HIT_AR … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_HIT_AW … #define mmSIF_RTR_CTRL_0_RANGE_PRIV_HIT_AR … #define mmSIF_RTR_CTRL_0_RGL_CFG … #define mmSIF_RTR_CTRL_0_RGL_SHIFT … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_0 … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_1 … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_2 … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_3 … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_4 … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_5 … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_6 … #define mmSIF_RTR_CTRL_0_RGL_EXPECTED_LAT_7 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_0 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_1 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_2 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_3 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_4 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_5 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_6 … #define mmSIF_RTR_CTRL_0_RGL_TOKEN_7 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_0 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_1 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_2 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_3 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_4 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_5 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_6 … #define mmSIF_RTR_CTRL_0_RGL_BANK_ID_7 … #define mmSIF_RTR_CTRL_0_RGL_WDT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM0_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM1_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM2_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AR_HBM3_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_WRAP … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM0_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM1_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM2_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH0_CTR_CNT … #define mmSIF_RTR_CTRL_0_E2E_AW_HBM3_CH1_CTR_CNT … #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_0 … #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_1 … #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_2 … #define mmSIF_RTR_CTRL_0_NL_HBM_PC_SEL_3 … #endif /* ASIC_REG_SIF_RTR_CTRL_0_REGS_H_ */
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