#ifndef _DT_BINDINGS_CLK_LCC_MSM8960_H
#define _DT_BINDINGS_CLK_LCC_MSM8960_H
#define PLL4 …
#define MI2S_OSR_SRC …
#define MI2S_OSR_CLK …
#define MI2S_DIV_CLK …
#define MI2S_BIT_DIV_CLK …
#define MI2S_BIT_CLK …
#define PCM_SRC …
#define PCM_CLK_OUT …
#define PCM_CLK …
#define SLIMBUS_SRC …
#define AUDIO_SLIMBUS_CLK …
#define SPS_SLIMBUS_CLK …
#define CODEC_I2S_MIC_OSR_SRC …
#define CODEC_I2S_MIC_OSR_CLK …
#define CODEC_I2S_MIC_DIV_CLK …
#define CODEC_I2S_MIC_BIT_DIV_CLK …
#define CODEC_I2S_MIC_BIT_CLK …
#define SPARE_I2S_MIC_OSR_SRC …
#define SPARE_I2S_MIC_OSR_CLK …
#define SPARE_I2S_MIC_DIV_CLK …
#define SPARE_I2S_MIC_BIT_DIV_CLK …
#define SPARE_I2S_MIC_BIT_CLK …
#define CODEC_I2S_SPKR_OSR_SRC …
#define CODEC_I2S_SPKR_OSR_CLK …
#define CODEC_I2S_SPKR_DIV_CLK …
#define CODEC_I2S_SPKR_BIT_DIV_CLK …
#define CODEC_I2S_SPKR_BIT_CLK …
#define SPARE_I2S_SPKR_OSR_SRC …
#define SPARE_I2S_SPKR_OSR_CLK …
#define SPARE_I2S_SPKR_DIV_CLK …
#define SPARE_I2S_SPKR_BIT_DIV_CLK …
#define SPARE_I2S_SPKR_BIT_CLK …
#endif