#ifndef __SOUND_VX_COMMON_H
#define __SOUND_VX_COMMON_H
#include <sound/pcm.h>
#include <sound/hwdep.h>
#include <linux/interrupt.h>
struct firmware;
struct device;
#define VX_DRIVER_VERSION …
#define SIZE_MAX_CMD …
#define SIZE_MAX_STATUS …
struct vx_rmh { … };
pcx_time_t;
#define VX_MAX_PIPES …
#define VX_MAX_PERIODS …
#define VX_MAX_CODECS …
struct vx_ibl_info { … };
struct vx_pipe { … };
struct vx_core;
struct snd_vx_ops { … };
struct snd_vx_hardware { … };
#define SND_VX_HWDEP_ID …
enum { … };
enum { … };
#define VX_ANALOG_OUT_LEVEL_MAX …
struct vx_core { … };
struct vx_core *snd_vx_create(struct snd_card *card,
const struct snd_vx_hardware *hw,
const struct snd_vx_ops *ops, int extra_size);
int snd_vx_setup_firmware(struct vx_core *chip);
int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *dsp);
int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *dsp);
int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp);
void snd_vx_free_firmware(struct vx_core *chip);
irqreturn_t snd_vx_irq_handler(int irq, void *dev);
irqreturn_t snd_vx_threaded_irq_handler(int irq, void *dev);
static inline int vx_test_and_ack(struct vx_core *chip)
{ … }
static inline void vx_validate_irq(struct vx_core *chip, int enable)
{ … }
static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
{ … }
static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
{ … }
static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
{ … }
static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
{ … }
#define vx_inb(chip,reg) …
#define vx_outb(chip,reg,val) …
#define vx_inl(chip,reg) …
#define vx_outl(chip,reg,val) …
static inline void vx_reset_dsp(struct vx_core *chip)
{ … }
int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh);
int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh);
int vx_send_rih(struct vx_core *chip, int cmd);
int vx_send_rih_nolock(struct vx_core *chip, int cmd);
void vx_reset_codec(struct vx_core *chip, int cold_reset);
int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
#define vx_check_isr(chip,mask,bit,time) …
#define vx_wait_isr_bit(chip,bit) …
#define vx_wait_for_rx_full(chip) …
static inline void vx_pseudo_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
struct vx_pipe *pipe, int count)
{ … }
static inline void vx_pseudo_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
struct vx_pipe *pipe, int count)
{ … }
#define VX_ERR_MASK …
#define vx_get_error(err) …
int snd_vx_pcm_new(struct vx_core *chip);
void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);
int snd_vx_mixer_new(struct vx_core *chip);
void vx_toggle_dac_mute(struct vx_core *chip, int mute);
int vx_sync_audio_source(struct vx_core *chip);
int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);
void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
int vx_set_clock(struct vx_core *chip, unsigned int freq);
void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
int vx_change_frequency(struct vx_core *chip);
int snd_vx_suspend(struct vx_core *card);
int snd_vx_resume(struct vx_core *card);
#define vx_has_new_dsp(chip) …
#define vx_is_pcmcia(chip) …
enum { … };
enum { … };
enum { … };
enum { … };
enum { … };
enum { … };
#define ICR_HF1 …
#define ICR_HF0 …
#define ICR_TREQ …
#define ICR_RREQ …
#define CVR_HC …
#define ISR_HF3 …
#define ISR_HF2 …
#define ISR_CHK …
#define ISR_ERR …
#define ISR_TX_READY …
#define ISR_TX_EMPTY …
#define ISR_RX_FULL …
#define VX_DATA_CODEC_MASK …
#define VX_DATA_XICOR_MASK …
#define VX_SUER_FREQ_MASK …
#define VX_SUER_FREQ_32KHz_MASK …
#define VX_SUER_FREQ_44KHz_MASK …
#define VX_SUER_FREQ_48KHz_MASK …
#define VX_SUER_DATA_PRESENT_MASK …
#define VX_SUER_CLOCK_PRESENT_MASK …
#define VX_CUER_HH_BITC_SEL_MASK …
#define VX_CUER_MH_BITC_SEL_MASK …
#define VX_CUER_ML_BITC_SEL_MASK …
#define VX_CUER_LL_BITC_SEL_MASK …
#define XX_UER_CBITS_OFFSET_MASK …
#define VX_AUDIO_INFO_REAL_TIME …
#define VX_AUDIO_INFO_OFFLINE …
#define VX_AUDIO_INFO_MPEG1 …
#define VX_AUDIO_INFO_MPEG2 …
#define VX_AUDIO_INFO_LINEAR_8 …
#define VX_AUDIO_INFO_LINEAR_16 …
#define VX_AUDIO_INFO_LINEAR_24 …
#define VXP_IRQ_OFFSET …
#define IRQ_MESS_WRITE_END …
#define IRQ_MESS_WRITE_NEXT …
#define IRQ_MESS_READ_NEXT …
#define IRQ_MESS_READ_END …
#define IRQ_MESSAGE …
#define IRQ_RESET_CHK …
#define IRQ_CONNECT_STREAM_NEXT …
#define IRQ_CONNECT_STREAM_END …
#define IRQ_PAUSE_START_CONNECT …
#define IRQ_END_CONNECTION …
#define ASYNC_EVENTS_PENDING …
#define HBUFFER_EVENTS_PENDING …
#define NOTIF_EVENTS_PENDING …
#define TIME_CODE_EVENT_PENDING …
#define FREQUENCY_CHANGE_EVENT_PENDING …
#define END_OF_BUFFER_EVENTS_PENDING …
#define FATAL_DSP_ERROR …
#define HEADER_FMT_BASE …
#define HEADER_FMT_MONO …
#define HEADER_FMT_INTEL …
#define HEADER_FMT_16BITS …
#define HEADER_FMT_24BITS …
#define HEADER_FMT_UPTO11 …
#define HEADER_FMT_UPTO32 …
#define XX_CODEC_SELECTOR …
#define XX_CODEC_ADC_CONTROL_REGISTER …
#define XX_CODEC_DAC_CONTROL_REGISTER …
#define XX_CODEC_LEVEL_LEFT_REGISTER …
#define XX_CODEC_LEVEL_RIGHT_REGISTER …
#define XX_CODEC_PORT_MODE_REGISTER …
#define XX_CODEC_STATUS_REPORT_REGISTER …
#define XX_CODEC_CLOCK_CONTROL_REGISTER …
#define CVAL_M110DB …
#define CVAL_M99DB …
#define CVAL_M21DB …
#define CVAL_M18DB …
#define CVAL_M10DB …
#define CVAL_0DB …
#define CVAL_18DB …
#define CVAL_MAX …
#define AUDIO_IO_HAS_MUTE_LEVEL …
#define AUDIO_IO_HAS_MUTE_MONITORING_1 …
#define AUDIO_IO_HAS_MUTE_MONITORING_2 …
#define VALID_AUDIO_IO_DIGITAL_LEVEL …
#define VALID_AUDIO_IO_MONITORING_LEVEL …
#define VALID_AUDIO_IO_MUTE_LEVEL …
#define VALID_AUDIO_IO_MUTE_MONITORING_1 …
#define VALID_AUDIO_IO_MUTE_MONITORING_2 …
#endif