/* SPDX-License-Identifier: GPL-2.0 */ /*************************************************************************** * WT register offsets. * * Wed Oct 22 13:50:20 2003 * Copyright 2003 mjander * [email protected] ****************************************************************************/ #ifndef _AU88X0_WT_H #define _AU88X0_WT_H /* WT channels are grouped in banks. Each bank has 0x20 channels. */ /* Bank register address boundary is 0x8000 */ #define NR_WT_PB … /* WT bank base register (as dword address). */ #define WT_BAR(x) … #define WT_BANK(x) … /* WT Bank registers */ #define WT_CTRL(bank) … #define WT_SRAMP(bank) … #define WT_DSREG(bank) … #define WT_MRAMP(bank) … #define WT_GMODE(bank) … #define WT_ARAMP(bank) … /* WT Voice registers */ #define WT_STEREO(voice) … #define WT_MUTE(voice) … #define WT_RUN(voice) … /* Some kind of parameters. */ /* PARM0, PARM1 : Filter (0xFF000000), SampleRate (0x0000FFFF) */ /* PARM2, PARM3 : Still unknown */ #define WT_PARM(x,y) … #define WT_DELAY(x,y) … /* Numeric indexes used by SetReg() and GetReg() */ #if 0 enum { run = 0, /* 0 W 1:run 0:stop */ parm0, /* 1 W filter, samplerate */ parm1, /* 2 W filter, samplerate */ parm2, /* 3 W */ parm3, /* 4 RW volume. This value is calculated using floating point ops. */ sramp, /* 5 W */ mute, /* 6 W 1:mute, 0:unmute */ gmode, /* 7 RO Looks like only bit0 is used. */ aramp, /* 8 W */ mramp, /* 9 W */ ctrl, /* a W */ delay, /* b W All 4 values are written at once with same value. */ dsreg, /* c (R)W */ } wt_reg; #endif wt_voice_t; #endif /* _AU88X0_WT_H */ /* End of file */
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