linux/sound/pci/au88x0/au8830.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
    Aureal Vortex Soundcard driver.

    IO addr collected from asp4core.vxd:
    function    address
    0005D5A0    13004
    00080674    14004
    00080AFF    12818

 */

#define CHIP_AU8830

#define CARD_NAME
#define CARD_NAME_SHORT

#define NR_ADB
#define NR_SRC
#define NR_A3D
#define NR_MIXIN
#define NR_MIXOUT
#define NR_WT

/* ADBDMA */
#define VORTEX_ADBDMA_STAT
#define POS_MASK
#define POS_SHIFT
#define ADB_SUBBUF_MASK
#define ADB_SUBBUF_SHIFT
#define VORTEX_ADBDMA_CTRL
#define OFFSET_MASK
#define OFFSET_SHIFT
#define IE_MASK
#define IE_SHIFT
#define DIR_MASK
#define DIR_SHIFT
#define FMT_MASK
#define FMT_SHIFT
#define ADB_FIFO_EN_SHIFT
#define ADB_FIFO_EN
// The ADB masks and shift also are valid for the wtdma, except if specified otherwise.
#define VORTEX_ADBDMA_BUFCFG0
#define VORTEX_ADBDMA_BUFCFG1
#define VORTEX_ADBDMA_BUFBASE
#define VORTEX_ADBDMA_START

#define VORTEX_ADBDMA_STATUS
/* Starting at the MSB, each pair of bits seem to be the current DMA page. */
/* This current page bits are consistent (same value) with VORTEX_ADBDMA_STAT) */

/* DMA */
#define VORTEX_ENGINE_CTRL
#define ENGINE_INIT

/* WTDMA */
#define VORTEX_WTDMA_CTRL
#define VORTEX_WTDMA_STAT
#define WT_SUBBUF_MASK
#define WT_SUBBUF_SHIFT
#define VORTEX_WTDMA_BUFBASE
#define VORTEX_WTDMA_BUFCFG0
#define VORTEX_WTDMA_BUFCFG1
#define VORTEX_WTDMA_START

/* ADB */
#define VORTEX_ADB_SR
#define VORTEX_ADB_RTBASE
#define VORTEX_ADB_RTBASE_COUNT
#define VORTEX_ADB_CHNBASE
#define VORTEX_ADB_CHNBASE_COUNT
#define ROUTE_MASK
#define SOURCE_MASK
#define ADB_MASK
#define ADB_SHIFT
/* ADB address */
#define OFFSET_ADBDMA
#define OFFSET_ADBDMAB
#define OFFSET_SRCIN
#define OFFSET_SRCOUT
#define OFFSET_MIXIN
#define OFFSET_MIXOUT
#define OFFSET_CODECIN
#define OFFSET_CODECOUT
#define OFFSET_SPORTIN
#define OFFSET_SPORTOUT
#define OFFSET_SPDIFIN
#define OFFSET_SPDIFOUT
#define OFFSET_AC98IN
#define OFFSET_AC98OUT
#define OFFSET_EQIN
#define OFFSET_EQOUT
#define OFFSET_A3DIN
#define OFFSET_A3DOUT
#define OFFSET_WT0
#define OFFSET_WT1
/* WT sources offset : 0x00-0x1f Direct stream. */
/* WT sources offset : 0x20-0x25 Mixed Output. */
#define OFFSET_XTALKOUT
#define OFFSET_XTALKIN
#define OFFSET_EFXOUT
#define OFFSET_EFXIN

/* ADB route translate helper */
#define ADB_DMA(x)
#define ADB_SRCOUT(x)
#define ADB_SRCIN(x)
#define ADB_MIXOUT(x)
#define ADB_MIXIN(x)
#define ADB_CODECIN(x)
#define ADB_CODECOUT(x)
#define ADB_SPORTIN(x)
#define ADB_SPORTOUT(x)
#define ADB_SPDIFIN(x)
#define ADB_SPDIFOUT(x)
#define ADB_EQIN(x)
#define ADB_EQOUT(x)
#define ADB_A3DOUT(x)
#define ADB_A3DIN(x)
//#define ADB_WTOUT(x) ((x<x20)?(x + OFFSET_WT0):(x + OFFSET_WT1))
#define ADB_WTOUT(x,y)
#define ADB_XTALKIN(x)
#define ADB_XTALKOUT(x)

#define MIX_DEFIGAIN
#define MIX_DEFOGAIN

/* MIXER */
#define VORTEX_MIXER_SR
#define VORTEX_MIXER_CLIP
#define VORTEX_MIXER_CHNBASE
#define VORTEX_MIXER_RTBASE
#define MIXER_RTBASE_SIZE
#define VORTEX_MIX_ENIN
#define VORTEX_MIX_SMP

/* MIX */
#define VORTEX_MIX_INVOL_B
#define VORTEX_MIX_VOL_B
#define VORTEX_MIX_INVOL_A
#define VORTEX_MIX_VOL_A

#define VOL_MIN
#define VOL_MAX

/* SRC */
#define VORTEX_SRC_CHNBASE
#define VORTEX_SRC_RTBASE
#define VORTEX_SRCBLOCK_SR
#define VORTEX_SRC_SOURCE
#define VORTEX_SRC_SOURCESIZE
/* Params
	0x26e00	: 1 U0
	0x26e40	: 2 CR
	0x26e80	: 3 U3
	0x26ec0	: 4 DRIFT1
	0x26f00 : 5 U1
	0x26f40	: 6 DRIFT2
	0x26f80	: 7 U2 : Target rate, direction
*/

#define VORTEX_SRC_CONVRATIO
#define VORTEX_SRC_DRIFT0
#define VORTEX_SRC_DRIFT1
#define VORTEX_SRC_DRIFT2
#define VORTEX_SRC_U0
#define U0_SLOWLOCK
#define VORTEX_SRC_U1
#define VORTEX_SRC_U2
#define VORTEX_SRC_DATA
#define VORTEX_SRC_DATA0

/* FIFO */
#define VORTEX_FIFO_ADBCTRL
#define VORTEX_FIFO_WTCTRL
#define FIFO_RDONLY
#define FIFO_CTRL
#define FIFO_VALID
#define FIFO_EMPTY
#define FIFO_U0
#define FIFO_U1
#define FIFO_SIZE_BITS
#define FIFO_SIZE
#define FIFO_MASK
#define FIFO_BITS
#define VORTEX_FIFO_ADBDATA
#define VORTEX_FIFO_WTDATA

#define VORTEX_FIFO_GIRT
#define GIRT_COUNT

/* CODEC */

#define VORTEX_CODEC_CHN

#define VORTEX_CODEC_CTRL
#define VORTEX_CODEC_IO

#define VORTEX_CODEC_SPORTCTRL

#define VORTEX_CODEC_EN
#define EN_AUDIO0
#define EN_MODEM
#define EN_AUDIO1
#define EN_SPORT
#define EN_SPDIF
#define EN_CODEC

#define VORTEX_SPDIF_SMPRATE

#define VORTEX_SPDIF_FLAGS
#define VORTEX_SPDIF_CFG0
#define VORTEX_SPDIF_CFG1

#define VORTEX_SMP_TIME
#define VORTEX_SMP_TIMER
#define VORTEX_CODEC2_CTRL

#define VORTEX_MODEM_CTRL

/* IRQ */
#define VORTEX_IRQ_SOURCE
#define VORTEX_IRQ_CTRL

//#define VORTEX_IRQ_U0 0x2a008 /* ?? */
#define VORTEX_STAT
#define STAT_IRQ

#define VORTEX_CTRL
#define CTRL_MIDI_EN
#define CTRL_MIDI_PORT
#define CTRL_GAME_EN
#define CTRL_GAME_PORT
#define CTRL_IRQ_ENABLE
#define CTRL_SPDIF
#define CTRL_SPORT
#define CTRL_RST
#define CTRL_UNKNOWN

/* write: Timer period config / read: TIMER IRQ ack. */
#define VORTEX_IRQ_STAT

		     /* MIDI *//* GAME. */
#define VORTEX_MIDI_DATA
#define VORTEX_MIDI_CMD

#define VORTEX_GAME_LEGACY
#define VORTEX_CTRL2
#define CTRL2_GAME_ADCMODE
#define VORTEX_GAME_AXIS
#define AXIS_SIZE
#define AXIS_RANGE