linux/sound/pci/ctxfi/cthw20k1.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
 *
 * @File	cthw20k1.c
 *
 * @Brief
 * This file contains the implementation of hardware access methord for 20k1.
 *
 * @Author	Liu Chun
 * @Date 	Jun 24 2008
 */

#include <linux/types.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/string.h>
#include <linux/spinlock.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include "cthw20k1.h"
#include "ct20k1reg.h"

struct hw20k1 {};

static u32 hw_read_20kx(struct hw *hw, u32 reg);
static void hw_write_20kx(struct hw *hw, u32 reg, u32 data);
static u32 hw_read_pci(struct hw *hw, u32 reg);
static void hw_write_pci(struct hw *hw, u32 reg, u32 data);

/*
 * Type definition block.
 * The layout of control structures can be directly applied on 20k2 chip.
 */

/*
 * SRC control block definitions.
 */

/* SRC resource control block */
#define SRCCTL_STATE
#define SRCCTL_BM
#define SRCCTL_RSR
#define SRCCTL_SF
#define SRCCTL_WR
#define SRCCTL_PM
#define SRCCTL_ROM
#define SRCCTL_VO
#define SRCCTL_ST
#define SRCCTL_IE
#define SRCCTL_ILSZ
#define SRCCTL_BP

#define SRCCCR_CISZ
#define SRCCCR_CWA
#define SRCCCR_D
#define SRCCCR_RS
#define SRCCCR_NAL
#define SRCCCR_RA

#define SRCCA_CA
#define SRCCA_RS
#define SRCCA_NAL

#define SRCSA_SA

#define SRCLA_LA

/* Mixer Parameter Ring ram Low and Hight register.
 * Fixed-point value in 8.24 format for parameter channel */
#define MPRLH_PITCH

/* SRC resource register dirty flags */
src_dirty;

struct src_rsc_ctrl_blk {};

/* SRC manager control block */
src_mgr_dirty;

struct src_mgr_ctrl_blk {};

/* SRCIMP manager control block */
#define SRCAIM_ARC
#define SRCAIM_NXT
#define SRCAIM_SRC

struct srcimap {};

/* SRCIMP manager register dirty flags */
srcimp_mgr_dirty;

struct srcimp_mgr_ctrl_blk {};

/*
 * Function implementation block.
 */

static int src_get_rsc_ctrl_blk(void **rblk)
{}

static int src_put_rsc_ctrl_blk(void *blk)
{}

static int src_set_state(void *blk, unsigned int state)
{}

static int src_set_bm(void *blk, unsigned int bm)
{}

static int src_set_rsr(void *blk, unsigned int rsr)
{}

static int src_set_sf(void *blk, unsigned int sf)
{}

static int src_set_wr(void *blk, unsigned int wr)
{}

static int src_set_pm(void *blk, unsigned int pm)
{}

static int src_set_rom(void *blk, unsigned int rom)
{}

static int src_set_vo(void *blk, unsigned int vo)
{}

static int src_set_st(void *blk, unsigned int st)
{}

static int src_set_ie(void *blk, unsigned int ie)
{}

static int src_set_ilsz(void *blk, unsigned int ilsz)
{}

static int src_set_bp(void *blk, unsigned int bp)
{}

static int src_set_cisz(void *blk, unsigned int cisz)
{}

static int src_set_ca(void *blk, unsigned int ca)
{}

static int src_set_sa(void *blk, unsigned int sa)
{}

static int src_set_la(void *blk, unsigned int la)
{}

static int src_set_pitch(void *blk, unsigned int pitch)
{}

static int src_set_clear_zbufs(void *blk, unsigned int clear)
{}

static int src_set_dirty(void *blk, unsigned int flags)
{}

static int src_set_dirty_all(void *blk)
{}

#define AR_SLOT_SIZE
#define AR_SLOT_BLOCK_SIZE
#define AR_PTS_PITCH
#define AR_PARAM_SRC_OFFSET

static unsigned int src_param_pitch_mixer(unsigned int src_idx)
{}

static int src_commit_write(struct hw *hw, unsigned int idx, void *blk)
{}

static int src_get_ca(struct hw *hw, unsigned int idx, void *blk)
{}

static unsigned int src_get_dirty(void *blk)
{}

static unsigned int src_dirty_conj_mask(void)
{}

static int src_mgr_enbs_src(void *blk, unsigned int idx)
{}

static int src_mgr_enb_src(void *blk, unsigned int idx)
{}

static int src_mgr_dsb_src(void *blk, unsigned int idx)
{}

static int src_mgr_commit_write(struct hw *hw, void *blk)
{}

static int src_mgr_get_ctrl_blk(void **rblk)
{}

static int src_mgr_put_ctrl_blk(void *blk)
{}

static int srcimp_mgr_get_ctrl_blk(void **rblk)
{}

static int srcimp_mgr_put_ctrl_blk(void *blk)
{}

static int srcimp_mgr_set_imaparc(void *blk, unsigned int slot)
{}

static int srcimp_mgr_set_imapuser(void *blk, unsigned int user)
{}

static int srcimp_mgr_set_imapnxt(void *blk, unsigned int next)
{}

static int srcimp_mgr_set_imapaddr(void *blk, unsigned int addr)
{}

static int srcimp_mgr_commit_write(struct hw *hw, void *blk)
{}

/*
 * AMIXER control block definitions.
 */

#define AMOPLO_M
#define AMOPLO_X
#define AMOPLO_Y

#define AMOPHI_SADR
#define AMOPHI_SE

/* AMIXER resource register dirty flags */
amixer_dirty;

/* AMIXER resource control block */
struct amixer_rsc_ctrl_blk {};

static int amixer_set_mode(void *blk, unsigned int mode)
{}

static int amixer_set_iv(void *blk, unsigned int iv)
{}

static int amixer_set_x(void *blk, unsigned int x)
{}

static int amixer_set_y(void *blk, unsigned int y)
{}

static int amixer_set_sadr(void *blk, unsigned int sadr)
{}

static int amixer_set_se(void *blk, unsigned int se)
{}

static int amixer_set_dirty(void *blk, unsigned int flags)
{}

static int amixer_set_dirty_all(void *blk)
{}

static int amixer_commit_write(struct hw *hw, unsigned int idx, void *blk)
{}

static int amixer_get_y(void *blk)
{}

static unsigned int amixer_get_dirty(void *blk)
{}

static int amixer_rsc_get_ctrl_blk(void **rblk)
{}

static int amixer_rsc_put_ctrl_blk(void *blk)
{}

static int amixer_mgr_get_ctrl_blk(void **rblk)
{}

static int amixer_mgr_put_ctrl_blk(void *blk)
{}

/*
 * DAIO control block definitions.
 */

/* Receiver Sample Rate Tracker Control register */
#define SRTCTL_SRCR
#define SRTCTL_SRCL
#define SRTCTL_RSR
#define SRTCTL_DRAT
#define SRTCTL_RLE
#define SRTCTL_RLP
#define SRTCTL_EC
#define SRTCTL_ET

/* DAIO Receiver register dirty flags */
dai_dirty;

/* DAIO Receiver control block */
struct dai_ctrl_blk {};

/* S/PDIF Transmitter register dirty flags */
dao_dirty;

/* S/PDIF Transmitter control block */
struct dao_ctrl_blk {};

/* Audio Input Mapper RAM */
#define AIM_ARC
#define AIM_NXT

struct daoimap {};

/* I2S Transmitter/Receiver Control register */
#define I2SCTL_EA
#define I2SCTL_EI

/* S/PDIF Transmitter Control register */
#define SPOCTL_OE
#define SPOCTL_OS
#define SPOCTL_RIV
#define SPOCTL_LIV
#define SPOCTL_SR

/* S/PDIF Receiver Control register */
#define SPICTL_EN
#define SPICTL_I24
#define SPICTL_IB
#define SPICTL_SM
#define SPICTL_VM

/* DAIO manager register dirty flags */
daio_mgr_dirty;

/* DAIO manager control block */
struct daio_mgr_ctrl_blk {};

static int dai_srt_set_srcr(void *blk, unsigned int src)
{}

static int dai_srt_set_srcl(void *blk, unsigned int src)
{}

static int dai_srt_set_rsr(void *blk, unsigned int rsr)
{}

static int dai_srt_set_drat(void *blk, unsigned int drat)
{}

static int dai_srt_set_ec(void *blk, unsigned int ec)
{}

static int dai_srt_set_et(void *blk, unsigned int et)
{}

static int dai_commit_write(struct hw *hw, unsigned int idx, void *blk)
{}

static int dai_get_ctrl_blk(void **rblk)
{}

static int dai_put_ctrl_blk(void *blk)
{}

static int dao_set_spos(void *blk, unsigned int spos)
{}

static int dao_commit_write(struct hw *hw, unsigned int idx, void *blk)
{}

static int dao_get_spos(void *blk, unsigned int *spos)
{}

static int dao_get_ctrl_blk(void **rblk)
{}

static int dao_put_ctrl_blk(void *blk)
{}

static int daio_mgr_enb_dai(void *blk, unsigned int idx)
{}

static int daio_mgr_dsb_dai(void *blk, unsigned int idx)
{}

static int daio_mgr_enb_dao(void *blk, unsigned int idx)
{}

static int daio_mgr_dsb_dao(void *blk, unsigned int idx)
{}

static int daio_mgr_dao_init(void *blk, unsigned int idx, unsigned int conf)
{}

static int daio_mgr_set_imaparc(void *blk, unsigned int slot)
{}

static int daio_mgr_set_imapnxt(void *blk, unsigned int next)
{}

static int daio_mgr_set_imapaddr(void *blk, unsigned int addr)
{}

static int daio_mgr_commit_write(struct hw *hw, void *blk)
{}

static int daio_mgr_get_ctrl_blk(struct hw *hw, void **rblk)
{}

static int daio_mgr_put_ctrl_blk(void *blk)
{}

/* Timer interrupt */
static int set_timer_irq(struct hw *hw, int enable)
{}

static int set_timer_tick(struct hw *hw, unsigned int ticks)
{}

static unsigned int get_wc(struct hw *hw)
{}

/* Card hardware initialization block */
struct dac_conf {};

struct adc_conf {};

struct daio_conf {};

struct trn_conf {};

static int hw_daio_init(struct hw *hw, const struct daio_conf *info)
{}

/* TRANSPORT operations */
static int hw_trn_init(struct hw *hw, const struct trn_conf *info)
{}

/* Card initialization */
#define GCTL_EAC
#define GCTL_EAI
#define GCTL_BEP
#define GCTL_BES
#define GCTL_DSP
#define GCTL_DBP
#define GCTL_ABP
#define GCTL_TBP
#define GCTL_SBP
#define GCTL_FBP
#define GCTL_XA
#define GCTL_ET
#define GCTL_PR
#define GCTL_MRL
#define GCTL_SDE
#define GCTL_SDI
#define GCTL_SM
#define GCTL_SR
#define GCTL_SD
#define GCTL_SE
#define GCTL_AID

static int hw_pll_init(struct hw *hw, unsigned int rsr)
{}

static int hw_auto_init(struct hw *hw)
{}

static int i2c_unlock(struct hw *hw)
{}

static void i2c_lock(struct hw *hw)
{}

static void i2c_write(struct hw *hw, u32 device, u32 addr, u32 data)
{}

/* DAC operations */

static int hw_reset_dac(struct hw *hw)
{}

static int hw_dac_init(struct hw *hw, const struct dac_conf *info)
{}

/* ADC operations */

static int is_adc_input_selected_SB055x(struct hw *hw, enum ADCSRC type)
{}

static int is_adc_input_selected_SBx(struct hw *hw, enum ADCSRC type)
{}

static int is_adc_input_selected_hendrix(struct hw *hw, enum ADCSRC type)
{}

static int hw_is_adc_input_selected(struct hw *hw, enum ADCSRC type)
{}

static int
adc_input_select_SB055x(struct hw *hw, enum ADCSRC type, unsigned char boost)
{}


static int
adc_input_select_SBx(struct hw *hw, enum ADCSRC type, unsigned char boost)
{}

static int
adc_input_select_hendrix(struct hw *hw, enum ADCSRC type, unsigned char boost)
{}

static int hw_adc_input_select(struct hw *hw, enum ADCSRC type)
{}

static int adc_init_SB055x(struct hw *hw, int input, int mic20db)
{}

static int adc_init_SBx(struct hw *hw, int input, int mic20db)
{}

static int hw_adc_init(struct hw *hw, const struct adc_conf *info)
{}

static struct capabilities hw_capabilities(struct hw *hw)
{}

#define CTLBITS(a, b, c, d)

#define UAA_CFG_PWRSTATUS
#define UAA_CFG_SPACE_FLAG
#define UAA_CORE_CHANGE
static int uaa_to_xfi(struct pci_dev *pci)
{}

static irqreturn_t ct_20k1_interrupt(int irq, void *dev_id)
{}

static int hw_card_start(struct hw *hw)
{}

static int hw_card_stop(struct hw *hw)
{}

static int hw_card_shutdown(struct hw *hw)
{}

static int hw_card_init(struct hw *hw, struct card_conf *info)
{}

#ifdef CONFIG_PM_SLEEP
static int hw_suspend(struct hw *hw)
{}

static int hw_resume(struct hw *hw, struct card_conf *info)
{}
#endif

static u32 hw_read_20kx(struct hw *hw, u32 reg)
{}

static void hw_write_20kx(struct hw *hw, u32 reg, u32 data)
{}

static u32 hw_read_pci(struct hw *hw, u32 reg)
{}

static void hw_write_pci(struct hw *hw, u32 reg, u32 data)
{}

static const struct hw ct20k1_preset =;

int create_20k1_hw_obj(struct hw **rhw)
{}

int destroy_20k1_hw_obj(struct hw *hw)
{}